Expand description
SPI master 0.
Modules
Configuration register.
Enable SPI.
TXD byte sent and RXD byte received.
SPI frequency
Interrupt enable clear register.
Interrupt enable set register.
Peripheral power control.
Pin select for MISO.
Pin select for MOSI.
Pin select for SCK.
RX data.
TX data.
Structs
Configuration register.
Enable SPI.
TXD byte sent and RXD byte received.
SPI frequency
Interrupt enable clear register.
Interrupt enable set register.
Peripheral power control.
Pin select for MISO.
Pin select for MOSI.
Pin select for SCK.
RX data.
Register block
TX data.