[−][src]Crate muscab1_pac
Peripheral access API for MUSCA_B1 microcontrollers (generated using svd2rust v0.16.0)
You can find an overview of the API here.
Modules
| dualtimer | Dual Timer |
| generic | Common register and bit access and modify traits |
| gpio0 | General-purpose I/O 0 |
| gptimer | General-Purpose Timer |
| i_cache | Cache |
| nspctrl | Non-secure Privilege Control Block |
| pwm | PWM_IP6512 |
| qspifctrl | QSPI Flash Controller |
| sau | Security Attribution Unit |
| scc | Serial Communication Controller |
| spctrl | Secure Privilege Control Block |
| sram0mpc | Memory Protection Controller 0 |
| sysinfo | System Information |
| system_control | System Control |
| timer0 | Timer 0 |
| uart0 | UART 0 |
| watchdog | Non-secure Watchdog Timer |
Structs
| CBP | Cache and branch predictor maintenance operations |
| CODE_SRAM_MPC | Code SRAM Memory Protection Controller |
| CPUID | CPUID |
| CorePeripherals | Core peripherals |
| DCB | Debug Control Block |
| DUALTIMER | Dual Timer |
| DUALTIMER_SECURE | Dual Timer (Secure) |
| DWT | Data Watchpoint and Trace unit |
| EFLASH0_MPC | EFlash0 Memory Protection Controller |
| EFLASH1_MPC | EFlash1 Memory Protection Controller |
| FPB | Flash Patch and Breakpoint unit |
| FPU | Floating Point Unit |
| GPIO0 | General-purpose I/O 0 |
| GPIO0_SECURE | General-purpose I/O 0 (Secure) |
| GPTIMER | General-Purpose Timer |
| GPTIMER_SECURE | General-Purpose Timer (Secure) |
| ICACHE | Cache |
| ITM | Instrumentation Trace Macrocell |
| MPU | Memory Protection Unit |
| NSPCTRL | Non-secure Privilege Control Block |
| NVIC | Nested Vector Interrupt Controller |
| PWM | PWM_IP6512 |
| Peripherals | All the peripherals |
| QSPIFCTRL | QSPI Flash Controller |
| QSPIFCTRL_SECURE | QSPI Flash Controller (Secure) |
| QSPI_MPC | QSPI Flash Memory Protection Controller |
| S32KWATCHDOG | S32K Watchdog (Secure) |
| SAU | Security Attribution Unit |
| SCB | System Control Block |
| SCC | Serial Communication Controller |
| SPCTRL | Secure Privilege Control Block |
| SRAM0MPC | Memory Protection Controller 0 |
| SRAM1MPC | SRAM 1 Memory Protection Controller |
| SRAM2MPC | SRAM 2 Memory Protection Controller |
| SRAM3MPC | SRAM 3 Memory Protection Controller |
| SYSINFO | System Information |
| SYSINFO_SECURE | System Information (Secure) |
| SYST | SysTick: System Timer |
| SYSTEMCONTROL | System Control |
| TIMER0 | Timer 0 |
| TIMER0_SECURE | Timer 0 (Secure) |
| TPIU | Trace Port Interface Unit |
| UART0 | UART 0 |
| UART0_SECURE | UART 0 (Secure) |
| WATCHDOG | Non-secure Watchdog Timer |
| WATCHDOG_SECURE | Watchdog (Secure) |
Enums
| Interrupt | Enumeration of all the interrupts |
Constants
| NVIC_PRIO_BITS | Number available in the NVIC for configuring priority |