Module msp432p401r::eusci_b3::ucbx_ctlw1 [−][src]
eUSCI_Bx Control Word Register 1
Structs
R | Register |
UCASTP_R | Field |
UCASTP_W | Field |
UCBXCTLW1_SPEC | eUSCI_Bx Control Word Register 1 |
UCCLTO_R | Field |
UCCLTO_W | Field |
UCETXINT_R | Field |
UCETXINT_W | Field |
UCGLIT_R | Field |
UCGLIT_W | Field |
UCSTPNACK_R | Field |
UCSTPNACK_W | Field |
UCSWACK_R | Field |
UCSWACK_W | Field |
W | Register |
Enums
UCASTP_A | Automatic STOP condition generation |
UCCLTO_A | Clock low timeout select |
UCETXINT_A | Early UCTXIFG0 |
UCGLIT_A | Deglitch time |
UCSTPNACK_A | ACK all master bytes |
UCSWACK_A | SW or HW ACK control |