Module msp432p401r::eusci_b0::ucbx_ctlw0 [−][src]
eUSCI_Bx Control Word Register 0
Structs
| R | Register |
| UCA10_R | Field |
| UCA10_W | Field |
| UCBXCTLW0_SPEC | eUSCI_Bx Control Word Register 0 |
| UCMM_R | Field |
| UCMM_W | Field |
| UCMODE_R | Field |
| UCMODE_W | Field |
| UCMST_R | Field |
| UCMST_W | Field |
| UCSLA10_R | Field |
| UCSLA10_W | Field |
| UCSSEL_R | Field |
| UCSSEL_W | Field |
| UCSWRST_R | Field |
| UCSWRST_W | Field |
| UCSYNC_R | Field |
| UCSYNC_W | Field |
| UCTR_R | Field |
| UCTR_W | Field |
| UCTXACK_R | Field |
| UCTXACK_W | Field |
| UCTXNACK_R | Field |
| UCTXNACK_W | Field |
| UCTXSTP_R | Field |
| UCTXSTP_W | Field |
| UCTXSTT_R | Field |
| UCTXSTT_W | Field |
| W | Register |
Enums
| UCA10_A | Own addressing mode select |
| UCMM_A | Multi-master environment select |
| UCMODE_A | eUSCI_B mode |
| UCMST_A | Master mode select |
| UCSLA10_A | Slave addressing mode select |
| UCSSEL_A | eUSCI_B clock source select |
| UCSWRST_A | Software reset enable |
| UCSYNC_A | Synchronous mode enable |
| UCTR_A | Transmitter/receiver |
| UCTXACK_A | Transmit ACK condition in slave mode |
| UCTXNACK_A | Transmit a NACK |
| UCTXSTP_A | Transmit STOP condition in master mode |
| UCTXSTT_A | Transmit START condition in master mode |