[][src]Crate msp432e4

Peripheral access API for MSP432E401Y microcontrollers (generated using svd2rust v0.15.0)

You can find an overview of the API here.

Modules

adc0

Register map for ADC0 peripheral

aes

Register map for AES peripheral

aes_dma

Register map for AES DMA peripheral

can0

Register map for CAN0 peripheral

ccm0

Register map for CCM0 peripheral

comp

Register map for COMP peripheral

crc

Register map for CRC peripheral

des

Register map for DES peripheral

des_dma

Register map for DES DMA peripheral

eeprom

Register map for EEPROM peripheral

emac0

Register map for EMAC0 peripheral

epi0

Register map for EPI0 peripheral

flash_ctrl

Register map for FLASH_CTRL peripheral

gpioa

Register map for GPIOA peripheral

hib

Register map for HIB peripheral

i2c0

Register map for I2C0 peripheral

pwm0

Register map for PWM0 peripheral

qei0

Register map for QEI0 peripheral

shamd5

Register map for SHAMD5 peripheral

shamd5_dma

Register map for SHAMD5 DMA peripheral

ssi0

Register map for SSI0 peripheral

sysctl

Register map for SYSCTL peripheral

sysexc

Register map for SYSEXC peripheral

timer0

Register map for TIMER0 peripheral

uart0

Register map for UART0 peripheral

udma

Register map for UDMA peripheral

usb0

Register map for USB0 peripheral

watchdog0

Register map for WATCHDOG0 peripheral

Structs

ADC0

Register map for ADC0 peripheral

ADC1

Register map for ADC0 peripheral

AES

Register map for AES peripheral

AES_DMA

Register map for AES DMA peripheral

CAN0

Register map for CAN0 peripheral

CAN1

Register map for CAN0 peripheral

CBP

Cache and branch predictor maintenance operations

CCM0

Register map for CCM0 peripheral

COMP

Register map for COMP peripheral

CPUID

CPUID

CRC

Register map for CRC peripheral

CorePeripherals

Core peripherals

DCB

Debug Control Block

DES

Register map for DES peripheral

DES_DMA

Register map for DES DMA peripheral

DWT

Data Watchpoint and Trace unit

EEPROM

Register map for EEPROM peripheral

EMAC0

Register map for EMAC0 peripheral

EPI0

Register map for EPI0 peripheral

FLASH_CTRL

Register map for FLASH_CTRL peripheral

FPB

Flash Patch and Breakpoint unit

FPU

Floating Point Unit

GPIOA

Register map for GPIOA peripheral

GPIOB

Register map for GPIOA peripheral

GPIOC

Register map for GPIOA peripheral

GPIOD

Register map for GPIOA peripheral

GPIOE

Register map for GPIOA peripheral

GPIOF

Register map for GPIOA peripheral

GPIOG

Register map for GPIOA peripheral

GPIOH

Register map for GPIOA peripheral

GPIOJ

Register map for GPIOA peripheral

GPIOK

Register map for GPIOA peripheral

GPIOL

Register map for GPIOA peripheral

GPIOM

Register map for GPIOA peripheral

GPION

Register map for GPIOA peripheral

GPIOP

Register map for GPIOA peripheral

GPIOQ

Register map for GPIOA peripheral

HIB

Register map for HIB peripheral

I2C0

Register map for I2C0 peripheral

I2C1

Register map for I2C0 peripheral

I2C2

Register map for I2C0 peripheral

I2C3

Register map for I2C0 peripheral

I2C4

Register map for I2C0 peripheral

I2C5

Register map for I2C0 peripheral

I2C6

Register map for I2C0 peripheral

I2C7

Register map for I2C0 peripheral

I2C8

Register map for I2C0 peripheral

I2C9

Register map for I2C0 peripheral

ITM

Instrumentation Trace Macrocell

MPU

Memory Protection Unit

NVIC

Nested Vector Interrupt Controller

PWM0

Register map for PWM0 peripheral

Peripherals

All the peripherals

QEI0

Register map for QEI0 peripheral

SCB

System Control Block

SHAMD5

Register map for SHAMD5 peripheral

SHAMD5_DMA

Register map for SHAMD5 DMA peripheral

SSI0

Register map for SSI0 peripheral

SSI1

Register map for SSI0 peripheral

SSI2

Register map for SSI0 peripheral

SSI3

Register map for SSI0 peripheral

SYSCTL

Register map for SYSCTL peripheral

SYSEXC

Register map for SYSEXC peripheral

SYST

SysTick: System Timer

TIMER0

Register map for TIMER0 peripheral

TIMER1

Register map for TIMER0 peripheral

TIMER2

Register map for TIMER0 peripheral

TIMER3

Register map for TIMER0 peripheral

TIMER4

Register map for TIMER0 peripheral

TIMER5

Register map for TIMER0 peripheral

TIMER6

Register map for TIMER0 peripheral

TIMER7

Register map for TIMER0 peripheral

TPIU

Trace Port Interface Unit

UART0

Register map for UART0 peripheral

UART1

Register map for UART0 peripheral

UART2

Register map for UART0 peripheral

UART3

Register map for UART0 peripheral

UART4

Register map for UART0 peripheral

UART5

Register map for UART0 peripheral

UART6

Register map for UART0 peripheral

UART7

Register map for UART0 peripheral

UDMA

Register map for UDMA peripheral

USB0

Register map for USB0 peripheral

WATCHDOG0

Register map for WATCHDOG0 peripheral

WATCHDOG1

Register map for WATCHDOG0 peripheral

Enums

Interrupt

Enumeration of all the interrupts

Constants

NVIC_PRIO_BITS

Number available in the NVIC for configuring priority