Crate msp430fr6972[−][src]
Peripheral access API for MSP430FR6972 microcontrollers (generated using svd2rust v0.18.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Modules
| adc12 | ADC12 |
| aes_accelerator | AES Accelerator |
| capacitive_touch_io_0 | Capacitive_Touch_IO 0 |
| capacitive_touch_io_1 | Capacitive_Touch_IO 1 |
| comparator_e | Comparator E |
| crc16 | CRC16 |
| crc32 | CRC32 |
| cs | CS Clock System |
| dma | DMA |
| fram | FRAM |
| generic | Common register and bit access and modify traits |
| lcd_c | LCD_C |
| mpu | MPU |
| mpy_16 | MPY 16 Multiplier 16 Bit Mode |
| mpy_32 | MPY 32 Multiplier 32 Bit Mode |
| pmm | PMM Power Management System |
| port_1_2 | Port 1/2 |
| port_3_4 | Port 3/4 |
| port_5_6 | Port 5/6 |
| port_7 | Port 7 |
| port_9 | Port 9 |
| port_j | Port J |
| rc_fram | RC RAM Control Module (FRAM) |
| rtc_c_real_time_clock | RTC_C Real Time Clock |
| sfr | SFR Special Function Registers |
| shared_reference | Shared Reference |
| sys | SYS System Module |
| timer_0_a3 | Timer0_A3 |
| timer_0_b7 | Timer0_B7 |
| timer_1_a3 | Timer1_A3 |
| timer_2_a2 | Timer2_A2 |
| timer_3_a5 | Timer3_A5 |
| usci_a0_spi_mode | USCI_A0 SPI Mode |
| usci_a0_uart_mode | USCI_A0 UART Mode |
| usci_a1_spi_mode | USCI_A1 SPI Mode |
| usci_a1_uart_mode | USCI_A1 UART Mode |
| usci_b0_i2c_mode | USCI_B0 I2C Mode |
| usci_b0_spi_mode | USCI_B0 SPI Mode |
| usci_b1_i2c_mode | USCI_B1 I2C Mode |
| usci_b1_spi_mode | USCI_B1 SPI Mode |
| watchdog_timer | Watchdog Timer |
Structs
| ADC12 | ADC12 |
| AES_ACCELERATOR | AES Accelerator |
| CAPACITIVE_TOUCH_IO_0 | Capacitive_Touch_IO 0 |
| CAPACITIVE_TOUCH_IO_1 | Capacitive_Touch_IO 1 |
| COMPARATOR_E | Comparator E |
| CRC16 | CRC16 |
| CRC32 | CRC32 |
| CS | CS Clock System |
| DMA | DMA |
| FRAM | FRAM |
| LCD_C | LCD_C |
| MPU | MPU |
| MPY_16 | MPY 16 Multiplier 16 Bit Mode |
| MPY_32 | MPY 32 Multiplier 32 Bit Mode |
| PMM | PMM Power Management System |
| PORT_1_2 | Port 1/2 |
| PORT_3_4 | Port 3/4 |
| PORT_5_6 | Port 5/6 |
| PORT_7 | Port 7 |
| PORT_9 | Port 9 |
| PORT_J | Port J |
| Peripherals | All the peripherals |
| RC_FRAM | RC RAM Control Module (FRAM) |
| RTC_C_REAL_TIME_CLOCK | RTC_C Real Time Clock |
| SFR | SFR Special Function Registers |
| SHARED_REFERENCE | Shared Reference |
| SYS | SYS System Module |
| TIMER_0_A3 | Timer0_A3 |
| TIMER_0_B7 | Timer0_B7 |
| TIMER_1_A3 | Timer1_A3 |
| TIMER_2_A2 | Timer2_A2 |
| TIMER_3_A5 | Timer3_A5 |
| USCI_A0_SPI_MODE | USCI_A0 SPI Mode |
| USCI_A0_UART_MODE | USCI_A0 UART Mode |
| USCI_A1_SPI_MODE | USCI_A1 SPI Mode |
| USCI_A1_UART_MODE | USCI_A1 UART Mode |
| USCI_B0_I2C_MODE | USCI_B0 I2C Mode |
| USCI_B0_SPI_MODE | USCI_B0 SPI Mode |
| USCI_B1_I2C_MODE | USCI_B1 I2C Mode |
| USCI_B1_SPI_MODE | USCI_B1 SPI Mode |
| WATCHDOG_TIMER | Watchdog Timer |
Enums
| Interrupt | Enumeration of all the interrupts. This enum is seldom used in application or library crates. It is present primarily for documenting the device’s implemented interrupts. |