[−][src]Module mdio::miim
MII Management (MIIM) Interface.
The IEEE 802.3 MII Management Interface. Allows for upper-layer devices to monitor and control the state of one or more PHYs.
Each of the 8 16-bit registers are indexed via a 5-bit address, preceded by a 5-bit PHY address.
A blanket implementation of the mdio::miim::{Read, Write} traits is provided for types
implementing the mdio::{Read, Write} traits.
Traits
| Read | A trait for reading the standard MIIM protocol. |
| Write | A trait for writing the standard MIIM protocol. |
Functions
| read_ctrl_bits | Given the PHY and register addresses, produce the control bits for an MDIO read operation. |
| write_ctrl_bits | Given the PHY and register addresses, produce the control bits for an MDIO write operation. |