Structs
A set of data that represents the information about a circuit we can glean from the BLIF file. May have multiple circuits per file.
Defines the relation between a circuit and its subcircuits
Traits
This trait lets us introduce some genericity into the parsing process. We can construct boolean and u64 variants of gates. Results in some very similar code, but we need it since the names of gates in an arithmetic context and boolean context are different.
Functions
Returns {context}::{id}
. Double colon syntax is used by the VCD dumper to separate scopes.
Ignores $true
and $false
and rejects $undef
.
Splits up a wire that ends with a bit index (input[3]
) into individual components (("input", 3)
)
Parses single wire pairs of the format parent=child
. Returns (parent, child)
Breaks up wires that contain _PACKED_<width>
into <width>
bits. Uglier than the old .attr
technique, but much easier to develop and debug because the packing is part of the wire name,
whereas with attributes you don’t find out that a wire is packed until after you’ve parsed it.
You end up needing to save a lot of things until after you’ve parsed the next several lines, then
parse them all at once, which gets complicated.