[−][src]Module lpc55s6x_pac::spi0::intenclr

SPI Interrupt Enable Clear. Writing a 1 to any implemented bit position causes the corresponding bit in INTENSET to be cleared.

Structs

MSTIDLE_W

Write proxy for field MSTIDLE

SSAEN_W

Write proxy for field SSAEN

SSDEN_W

Write proxy for field SSDEN

Type Definitions

W

Writer for register INTENCLR