Struct lpc55_hal::drivers::pins::Pin [−][src]
Expand description
Main API to control for controlling pins:w
Implementations
Transition pin to Analog input
Transition pin to CTIMER/PWM output
pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_16, Special<MATCH_OUTPUT3<Ctimer1<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<MATCH_OUTPUT0<Ctimer3<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<MATCH_OUTPUT2<Ctimer3<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_19, Special<MATCH_OUTPUT1<Ctimer3<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_7, Special<MATCH_OUTPUT2<Ctimer2<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_6, Special<MATCH_OUTPUT1<Ctimer2<Enabled>>>>[src]pub fn into_match_output(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_4, Special<MATCH_OUTPUT1<Ctimer2<Enabled>>>>[src]pub fn into_usart3_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_1, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_i2c3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_1, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_spi3_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_1, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_usart3_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_2, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_i2c3_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_2, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_spi3_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_2, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_i2s3_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_2, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_usart3_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_3, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_3, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi3_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_3, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_3, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart4_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi4_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart3_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_i2c3_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_spi3_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_5, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_usart3_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_7, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_i2c3_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_7, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_spi3_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_7, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_usart5_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_8, Special<FC5_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c5_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_8, Special<FC5_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi5_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_8, Special<FC5_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s5_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_8, Special<FC5_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart5_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_9, Special<FC5_TXD_SCL_MISO_WS>>[src]pub fn into_i2c5_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_9, Special<FC5_TXD_SCL_MISO_WS>>[src]pub fn into_spi5_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_9, Special<FC5_TXD_SCL_MISO_WS>>[src]pub fn into_i2s5_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_9, Special<FC5_TXD_SCL_MISO_WS>>[src]pub fn into_usart1_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_10, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_i2c1_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_10, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_spi1_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_10, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_i2s1_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_10, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_usart6_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_11, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c6_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_11, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi6_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_11, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s6_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_11, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart3_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_i2c3_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_spi3_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_i2s3_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC3_TXD_SCL_MISO_WS>>[src]pub fn into_usart6_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2c6_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_spi6_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2s6_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_12, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_usart1_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_CTS_SDA_SSEL0>>[src]pub fn into_i2c1_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_CTS_SDA_SSEL0>>[src]pub fn into_spi1_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_CTS_SDA_SSEL0>>[src]pub fn into_usart1_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi1_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s1_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_13, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart1_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_RTS_SCL_SSEL1>>[src]pub fn into_i2c1_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_RTS_SCL_SSEL1>>[src]pub fn into_spi1_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_RTS_SCL_SSEL1>>[src]pub fn into_usart1_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_spi1_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_i2s1_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_14, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_usart6_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_15, Special<FC6_CTS_SDA_SSEL0>>[src]pub fn into_i2c6_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_15, Special<FC6_CTS_SDA_SSEL0>>[src]pub fn into_spi6_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_15, Special<FC6_CTS_SDA_SSEL0>>[src]pub fn into_usart4_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_16, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_i2c4_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_16, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_spi4_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_16, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_i2s4_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_16, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_usart4_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_18, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_i2c4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_18, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_spi4_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_18, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_usart4_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_i2c4_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_spi4_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_usart7_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_i2c7_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_spi7_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_i2s7_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_19, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_usart3_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_i2c3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_spi3_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC3_CTS_SDA_SSEL0>>[src]pub fn into_usart7_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi7_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi8_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_20, Special<HS_SPI_SSEL0>>[src]pub fn into_usart3_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_21, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_i2c3_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_21, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_spi3_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_21, Special<FC3_RTS_SCL_SSEL1>>[src]pub fn into_usart6_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_22, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2c6_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_22, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_spi6_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_22, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2s6_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_22, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_usart0_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_23, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_23, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_spi0_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_23, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_usart0_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_24, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_24, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi0_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_24, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_24, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart0_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_25, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2c0_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_25, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_spi0_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_25, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2s0_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_25, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_usart2_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_26, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c2_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_26, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi2_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_26, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s2_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_26, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi8_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_26, Special<HS_SPI_MOSI>>[src]pub fn into_usart2_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_i2c2_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_spi2_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_i2s2_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_usart7_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi7_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_27, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart0_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_29, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_29, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi0_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_29, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_29, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart0_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_30, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2c0_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_30, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_spi0_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_30, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2s0_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_30, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_usart0_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_31, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_31, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_spi0_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio0_31, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_usart0_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_0, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_i2c0_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_0, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_spi0_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_0, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_usart3_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_1, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_1, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi3_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_1, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s3_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_1, Special<FC3_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi8_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_1, Special<HS_SPI_SSEL1>>[src]pub fn into_spi8_sck_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_2, Special<HS_SPI_SCK>>[src]pub fn into_spi8_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_3, Special<HS_SPI_MISO>>[src]pub fn into_usart0_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_5, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_5, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi0_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_5, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_5, Special<FC0_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart0_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_6, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2c0_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_6, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_spi0_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_6, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_i2s0_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_6, Special<FC0_TXD_SCL_MISO_WS>>[src]pub fn into_usart0_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_7, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_i2c0_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_7, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_spi0_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_7, Special<FC0_RTS_SCL_SSEL1>>[src]pub fn into_usart0_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_8, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_i2c0_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_8, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_spi0_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_8, Special<FC0_CTS_SDA_SSEL0>>[src]pub fn into_usart4_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_9, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_i2c4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_9, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_spi4_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_9, Special<FC4_CTS_SDA_SSEL0>>[src]pub fn into_usart1_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_10, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c1_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_10, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi1_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_10, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s1_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_10, Special<FC1_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart1_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_11, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_i2c1_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_11, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_spi1_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_11, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_i2s1_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_11, Special<FC1_TXD_SCL_MISO_WS>>[src]pub fn into_spi8_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_12, Special<HS_SPI_SSEL2>>[src]pub fn into_usart6_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_13, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c6_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_13, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi6_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_13, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s6_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_13, Special<FC6_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart5_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_14, Special<FC5_CTS_SDA_SSEL0>>[src]pub fn into_i2c5_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_14, Special<FC5_CTS_SDA_SSEL0>>[src]pub fn into_spi5_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_14, Special<FC5_CTS_SDA_SSEL0>>[src]pub fn into_usart5_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC5_RTS_SCL_SSEL1>>[src]pub fn into_i2c5_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC5_RTS_SCL_SSEL1>>[src]pub fn into_spi5_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC5_RTS_SCL_SSEL1>>[src]pub fn into_usart4_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_i2c4_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_spi4_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_15, Special<FC4_RTS_SCL_SSEL1>>[src]pub fn into_usart6_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_16, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2c6_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_16, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_spi6_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_16, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_i2s6_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_16, Special<FC6_TXD_SCL_MISO_WS>>[src]pub fn into_usart6_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_17, Special<FC6_RTS_SCL_SSEL1>>[src]pub fn into_i2c6_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_17, Special<FC6_RTS_SCL_SSEL1>>[src]pub fn into_spi6_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_17, Special<FC6_RTS_SCL_SSEL1>>[src]pub fn into_usart7_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC7_RTS_SCL_SSEL1>>[src]pub fn into_i2c7_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC7_RTS_SCL_SSEL1>>[src]pub fn into_spi7_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC7_RTS_SCL_SSEL1>>[src]pub fn into_usart4_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_i2c4_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_spi4_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_i2s4_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_20, Special<FC4_TXD_SCL_MISO_WS>>[src]pub fn into_usart7_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC7_CTS_SDA_SSEL0>>[src]pub fn into_i2c7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC7_CTS_SDA_SSEL0>>[src]pub fn into_spi7_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC7_CTS_SDA_SSEL0>>[src]pub fn into_usart4_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi4_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s4_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_21, Special<FC4_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart2_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_24, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c2_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_24, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi2_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_24, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s2_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_24, Special<FC2_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart2_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_25, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_i2c2_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_25, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_spi2_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_25, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_i2s2_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_25, Special<FC2_TXD_SCL_MISO_WS>>[src]pub fn into_usart2_cts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_26, Special<FC2_CTS_SDA_SSEL0>>[src]pub fn into_i2c2_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_26, Special<FC2_CTS_SDA_SSEL0>>[src]pub fn into_spi2_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_26, Special<FC2_CTS_SDA_SSEL0>>[src]pub fn into_spi8_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_26, Special<HS_SPI_SSEL3>>[src]pub fn into_usart2_rts_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_27, Special<FC2_RTS_SCL_SSEL1>>[src]pub fn into_i2c2_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_27, Special<FC2_RTS_SCL_SSEL1>>[src]pub fn into_spi2_cs_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_27, Special<FC2_RTS_SCL_SSEL1>>[src]pub fn into_usart7_rx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_29, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2c7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_29, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_spi7_mosi_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_29, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_i2s7_sda_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_29, Special<FC7_RXD_SDA_MOSI_DATA>>[src]pub fn into_usart7_tx_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_30, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_i2c7_scl_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_30, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_spi7_miso_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_30, Special<FC7_TXD_SCL_MISO_WS>>[src]pub fn into_i2s7_ws_pin(
self,
iocon: &mut Iocon<Enabled>
) -> Pin<Pio1_30, Special<FC7_TXD_SCL_MISO_WS>>[src]Trait Implementations
impl<PIO: PinId> I2cSdaPin<PIO, I2c0<Enabled<()>>> for Pin<PIO, Special<FC0_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c1<Enabled<()>>> for Pin<PIO, Special<FC1_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c2<Enabled<()>>> for Pin<PIO, Special<FC2_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c3<Enabled<()>>> for Pin<PIO, Special<FC3_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c4<Enabled<()>>> for Pin<PIO, Special<FC4_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c5<Enabled<()>>> for Pin<PIO, Special<FC5_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c6<Enabled<()>>> for Pin<PIO, Special<FC6_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2cSdaPin<PIO, I2c7<Enabled<()>>> for Pin<PIO, Special<FC7_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s0<Enabled<()>>> for Pin<PIO, Special<FC0_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s1<Enabled<()>>> for Pin<PIO, Special<FC1_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s2<Enabled<()>>> for Pin<PIO, Special<FC2_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s3<Enabled<()>>> for Pin<PIO, Special<FC3_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s4<Enabled<()>>> for Pin<PIO, Special<FC4_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s5<Enabled<()>>> for Pin<PIO, Special<FC5_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s6<Enabled<()>>> for Pin<PIO, Special<FC6_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> I2sSdaPin<PIO, I2s7<Enabled<()>>> for Pin<PIO, Special<FC7_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi0<Enabled<()>>> for Pin<PIO, Special<FC0_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi1<Enabled<()>>> for Pin<PIO, Special<FC1_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi2<Enabled<()>>> for Pin<PIO, Special<FC2_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi3<Enabled<()>>> for Pin<PIO, Special<FC3_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi4<Enabled<()>>> for Pin<PIO, Special<FC4_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi5<Enabled<()>>> for Pin<PIO, Special<FC5_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi6<Enabled<()>>> for Pin<PIO, Special<FC6_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> SpiMosiPin<PIO, Spi7<Enabled<()>>> for Pin<PIO, Special<FC7_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart0<Enabled<()>>> for Pin<PIO, Special<FC0_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart1<Enabled<()>>> for Pin<PIO, Special<FC1_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart2<Enabled<()>>> for Pin<PIO, Special<FC2_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart3<Enabled<()>>> for Pin<PIO, Special<FC3_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart4<Enabled<()>>> for Pin<PIO, Special<FC4_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart5<Enabled<()>>> for Pin<PIO, Special<FC5_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart6<Enabled<()>>> for Pin<PIO, Special<FC6_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartCtsPin<PIO, Usart7<Enabled<()>>> for Pin<PIO, Special<FC7_CTS_SDA_SSEL0>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart0<Enabled<()>>> for Pin<PIO, Special<FC0_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart1<Enabled<()>>> for Pin<PIO, Special<FC1_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart2<Enabled<()>>> for Pin<PIO, Special<FC2_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart3<Enabled<()>>> for Pin<PIO, Special<FC3_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart4<Enabled<()>>> for Pin<PIO, Special<FC4_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart5<Enabled<()>>> for Pin<PIO, Special<FC5_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart6<Enabled<()>>> for Pin<PIO, Special<FC6_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRtsPin<PIO, Usart7<Enabled<()>>> for Pin<PIO, Special<FC7_RTS_SCL_SSEL1>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart0<Enabled<()>>> for Pin<PIO, Special<FC0_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart1<Enabled<()>>> for Pin<PIO, Special<FC1_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart2<Enabled<()>>> for Pin<PIO, Special<FC2_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart3<Enabled<()>>> for Pin<PIO, Special<FC3_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart4<Enabled<()>>> for Pin<PIO, Special<FC4_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart5<Enabled<()>>> for Pin<PIO, Special<FC5_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart6<Enabled<()>>> for Pin<PIO, Special<FC6_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartRxPin<PIO, Usart7<Enabled<()>>> for Pin<PIO, Special<FC7_RXD_SDA_MOSI_DATA>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart0<Enabled<()>>> for Pin<PIO, Special<FC0_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart1<Enabled<()>>> for Pin<PIO, Special<FC1_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart2<Enabled<()>>> for Pin<PIO, Special<FC2_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart3<Enabled<()>>> for Pin<PIO, Special<FC3_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart4<Enabled<()>>> for Pin<PIO, Special<FC4_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart5<Enabled<()>>> for Pin<PIO, Special<FC5_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart6<Enabled<()>>> for Pin<PIO, Special<FC6_TXD_SCL_MISO_WS>>[src]impl<PIO: PinId> UsartTxPin<PIO, Usart7<Enabled<()>>> for Pin<PIO, Special<FC7_TXD_SCL_MISO_WS>>[src]