Module lpc177x_8x::ethernet

Ethernet

Modules

clrt	Collision window / Retry register.
command	Command register.
flowcontrolcounter	Flow control counter register.
flowcontrolstatus	Flow control status register.
hashfilterh	Hash filter table MSBs register.
hashfilterl	Hash filter table LSBs register.
intclear	Interrupt clear register.
intenable	Interrupt enable register.
intset	Interrupt set register.
intstatus	Interrupt status register.
ipgr	Non Back-to-Back Inter-Packet-Gap register.
ipgt	Back-to-Back Inter-Packet-Gap register.
mac1	MAC configuration register 1.
mac2	MAC configuration register 2.
madr	MII Mgmt Address register.
maxf	Maximum Frame register.
mcfg	MII Mgmt Configuration register.
mcmd	MII Mgmt Command register.
mind	MII Mgmt Indicators register.
mrdd	MII Mgmt Read Data register.
mwtd	MII Mgmt Write Data register.
powerdown	Power-down register.
rsv	Receive status vector register.
rxconsumeindex	Receive consume index register.
rxdescriptor	Receive descriptor base address register.
rxdescriptornumber	Receive number of descriptors register.
rxfilterctrl	Receive filter control register.
rxfilterwolclear	Receive filter WoL clear register.
rxfilterwolstatus	Receive filter WoL status register.
rxproduceindex	Receive produce index register.
rxstatus	Receive status base address register.
sa0	Station Address 0 register.
sa1	Station Address 1 register.
sa2	Station Address 2 register.
status	Status register.
supp	PHY Support register.
test	Test register.
tsv0	Transmit status vector 0 register.
tsv1	Transmit status vector 1 register.
txconsumeindex	Transmit consume index register.
txdescriptor	Transmit descriptor base address register.
txdescriptornumber	Transmit number of descriptors register.
txproduceindex	Transmit produce index register.
txstatus	Transmit status base address register.

Structs

CLRT	Collision window / Retry register.
COMMAND	Command register.
FLOWCONTROLCOUNTER	Flow control counter register.
FLOWCONTROLSTATUS	Flow control status register.
HASHFILTERH	Hash filter table MSBs register.
HASHFILTERL	Hash filter table LSBs register.
INTCLEAR	Interrupt clear register.
INTENABLE	Interrupt enable register.
INTSET	Interrupt set register.
INTSTATUS	Interrupt status register.
IPGR	Non Back-to-Back Inter-Packet-Gap register.
IPGT	Back-to-Back Inter-Packet-Gap register.
MAC1	MAC configuration register 1.
MAC2	MAC configuration register 2.
MADR	MII Mgmt Address register.
MAXF	Maximum Frame register.
MCFG	MII Mgmt Configuration register.
MCMD	MII Mgmt Command register.
MIND	MII Mgmt Indicators register.
MRDD	MII Mgmt Read Data register.
MWTD	MII Mgmt Write Data register.
POWERDOWN	Power-down register.
RSV	Receive status vector register.
RXCONSUMEINDEX	Receive consume index register.
RXDESCRIPTOR	Receive descriptor base address register.
RXDESCRIPTORNUMBER	Receive number of descriptors register.
RXFILTERCTRL	Receive filter control register.
RXFILTERWOLCLEAR	Receive filter WoL clear register.
RXFILTERWOLSTATUS	Receive filter WoL status register.
RXPRODUCEINDEX	Receive produce index register.
RXSTATUS	Receive status base address register.
RegisterBlock	Register block
SA0	Station Address 0 register.
SA1	Station Address 1 register.
SA2	Station Address 2 register.
STATUS	Status register.
SUPP	PHY Support register.
TEST	Test register.
TSV0	Transmit status vector 0 register.
TSV1	Transmit status vector 1 register.
TXCONSUMEINDEX	Transmit consume index register.
TXDESCRIPTOR	Transmit descriptor base address register.
TXDESCRIPTORNUMBER	Transmit number of descriptors register.
TXPRODUCEINDEX	Transmit produce index register.
TXSTATUS	Transmit status base address register.