Module lpc177x_8x::can1[−][src]

CAN1 controller

Modules

btr	Bus Timing. Can only be written when RM in CANMOD is 1.
cmr	Command bits that affect the state of the CAN Controller
ewl	Error Warning Limit. Can only be written when RM in CANMOD is 1.
gsr	Global Controller Status and Error Counters. The error counters can only be written when RM in CANMOD is 1.
icr	Interrupt status, Arbitration Lost Capture, Error Code Capture
ier	Interrupt Enable
mod_	Controls the operating mode of the CAN Controller.
rda	Received data bytes 1-4. Can only be written when RM in CANMOD is 1.
rdb	Received data bytes 5-8. Can only be written when RM in CANMOD is 1.
rfs	Receive frame status. Can only be written when RM in CANMOD is 1.
rid	Received Identifier. Can only be written when RM in CANMOD is 1.
sr	Status Register
tda	Transmit data bytes 1-4 (Tx Buffer)
tdb	Transmit data bytes 5-8 (Tx Buffer )
tfi	Transmit frame info (Tx Buffer )
tid	Transmit Identifier (Tx Buffer)

BTR	Bus Timing. Can only be written when RM in CANMOD is 1.
CMR	Command bits that affect the state of the CAN Controller
EWL	Error Warning Limit. Can only be written when RM in CANMOD is 1.
GSR	Global Controller Status and Error Counters. The error counters can only be written when RM in CANMOD is 1.
ICR	Interrupt status, Arbitration Lost Capture, Error Code Capture
IER	Interrupt Enable
MOD	Controls the operating mode of the CAN Controller.
RDA	Received data bytes 1-4. Can only be written when RM in CANMOD is 1.
RDB	Received data bytes 5-8. Can only be written when RM in CANMOD is 1.
RFS	Receive frame status. Can only be written when RM in CANMOD is 1.
RID	Received Identifier. Can only be written when RM in CANMOD is 1.
RegisterBlock	Register block
SR	Status Register
TDA	Transmit data bytes 1-4 (Tx Buffer)
TDB	Transmit data bytes 5-8 (Tx Buffer )
TFI	Transmit frame info (Tx Buffer )
TID	Transmit Identifier (Tx Buffer)