Module llvmint::hexagon

LLVM intrinsics for the hexagon architecture.

Functions

A2_abs
A2_absp
A2_abssat
A2_add
A2_addh_h16_hh
A2_addh_h16_hl
A2_addh_h16_lh
A2_addh_h16_ll
A2_addh_h16_sat_hh
A2_addh_h16_sat_hl
A2_addh_h16_sat_lh
A2_addh_h16_sat_ll
A2_addh_l16_hl
A2_addh_l16_ll
A2_addh_l16_sat_hl
A2_addh_l16_sat_ll
A2_addi
A2_addp
A2_addpsat
A2_addsat
A2_addsp
A2_and
A2_andir
A2_andp
A2_aslh
A2_asrh
A2_combine_hh
A2_combine_hl
A2_combine_lh
A2_combine_ll
A2_combineii
A2_combinew
A2_max
A2_maxp
A2_maxu
A2_maxup
A2_min
A2_minp
A2_minu
A2_minup
A2_neg
A2_negp
A2_negsat
A2_not
A2_notp
A2_or
A2_orir
A2_orp
A2_roundsat
A2_sat
A2_satb
A2_sath
A2_satub
A2_satuh
A2_sub
A2_subh_h16_hh
A2_subh_h16_hl
A2_subh_h16_lh
A2_subh_h16_ll
A2_subh_h16_sat_hh
A2_subh_h16_sat_hl
A2_subh_h16_sat_lh
A2_subh_h16_sat_ll
A2_subh_l16_hl
A2_subh_l16_ll
A2_subh_l16_sat_hl
A2_subh_l16_sat_ll
A2_subp
A2_subri
A2_subsat
A2_svaddh
A2_svaddhs
A2_svadduhs
A2_svavgh
A2_svavghs
A2_svnavgh
A2_svsubh
A2_svsubhs
A2_svsubuhs
A2_swiz
A2_sxtb
A2_sxth
A2_sxtw
A2_tfr
A2_tfrih
A2_tfril
A2_tfrp
A2_tfrpi
A2_tfrsi
A2_vabsh
A2_vabshsat
A2_vabsw
A2_vabswsat
A2_vaddb_map
A2_vaddh
A2_vaddhs
A2_vaddub
A2_vaddubs
A2_vadduhs
A2_vaddw
A2_vaddws
A2_vavgh
A2_vavghcr
A2_vavghr
A2_vavgub
A2_vavgubr
A2_vavguh
A2_vavguhr
A2_vavguw
A2_vavguwr
A2_vavgw
A2_vavgwcr
A2_vavgwr
A2_vcmpbeq
A2_vcmpbgtu
A2_vcmpheq
A2_vcmphgt
A2_vcmphgtu
A2_vcmpweq
A2_vcmpwgt
A2_vcmpwgtu
A2_vconj
A2_vmaxb
A2_vmaxh
A2_vmaxub
A2_vmaxuh
A2_vmaxuw
A2_vmaxw
A2_vminb
A2_vminh
A2_vminub
A2_vminuh
A2_vminuw
A2_vminw
A2_vnavgh
A2_vnavghcr
A2_vnavghr
A2_vnavgw
A2_vnavgwcr
A2_vnavgwr
A2_vraddub
A2_vraddub_acc
A2_vrsadub
A2_vrsadub_acc
A2_vsubb_map
A2_vsubh
A2_vsubhs
A2_vsubub
A2_vsububs
A2_vsubuhs
A2_vsubw
A2_vsubws
A2_xor
A2_xorp
A2_zxtb
A2_zxth
A4_andn
A4_andnp
A4_bitsplit
A4_bitspliti
A4_boundscheck
A4_cmpbeq
A4_cmpbeqi
A4_cmpbgt
A4_cmpbgti
A4_cmpbgtu
A4_cmpbgtui
A4_cmpheq
A4_cmpheqi
A4_cmphgt
A4_cmphgti
A4_cmphgtu
A4_cmphgtui
A4_combineir
A4_combineri
A4_cround_ri
A4_cround_rr
A4_modwrapu
A4_orn
A4_ornp
A4_rcmpeq
A4_rcmpeqi
A4_rcmpneq
A4_rcmpneqi
A4_round_ri
A4_round_ri_sat
A4_round_rr
A4_round_rr_sat
A4_tlbmatch
A4_vcmpbeq_any
A4_vcmpbeqi
A4_vcmpbgt
A4_vcmpbgti
A4_vcmpbgtui
A4_vcmpheqi
A4_vcmphgti
A4_vcmphgtui
A4_vcmpweqi
A4_vcmpwgti
A4_vcmpwgtui
A4_vrmaxh
A4_vrmaxuh
A4_vrmaxuw
A4_vrmaxw
A4_vrminh
A4_vrminuh
A4_vrminuw
A4_vrminw
A5_vaddhubs
C2_all8
C2_and
C2_andn
C2_any8
C2_bitsclr
C2_bitsclri
C2_bitsset
C2_cmpeq
C2_cmpeqi
C2_cmpeqp
C2_cmpgei
C2_cmpgeui
C2_cmpgt
C2_cmpgti
C2_cmpgtp
C2_cmpgtu
C2_cmpgtui
C2_cmpgtup
C2_cmplt
C2_cmpltu
C2_mask
C2_mux
C2_muxii
C2_muxir
C2_muxri
C2_not
C2_or
C2_orn
C2_pxfer_map
C2_tfrpr
C2_tfrrp
C2_vitpack
C2_vmux
C2_xor
C4_and_and
C4_and_andn
C4_and_or
C4_and_orn
C4_cmplte
C4_cmpltei
C4_cmplteu
C4_cmplteui
C4_cmpneq
C4_cmpneqi
C4_fastcorner9
C4_fastcorner9_not
C4_nbitsclr
C4_nbitsclri
C4_nbitsset
C4_or_and
C4_or_andn
C4_or_or
C4_or_orn
F2_conv_d2df
F2_conv_d2sf
F2_conv_df2d
F2_conv_df2d_chop
F2_conv_df2sf
F2_conv_df2ud
F2_conv_df2ud_chop
F2_conv_df2uw
F2_conv_df2uw_chop
F2_conv_df2w
F2_conv_df2w_chop
F2_conv_sf2d
F2_conv_sf2d_chop
F2_conv_sf2df
F2_conv_sf2ud
F2_conv_sf2ud_chop
F2_conv_sf2uw
F2_conv_sf2uw_chop
F2_conv_sf2w
F2_conv_sf2w_chop
F2_conv_ud2df
F2_conv_ud2sf
F2_conv_uw2df
F2_conv_uw2sf
F2_conv_w2df
F2_conv_w2sf
F2_dfadd
F2_dfclass
F2_dfcmpeq
F2_dfcmpge
F2_dfcmpgt
F2_dfcmpuo
F2_dffixupd
F2_dffixupn
F2_dffixupr
F2_dffma
F2_dffma_lib
F2_dffma_sc
F2_dffms
F2_dffms_lib
F2_dfimm_n
F2_dfimm_p
F2_dfmax
F2_dfmin
F2_dfmpy
F2_dfsub
F2_sfadd
F2_sfclass
F2_sfcmpeq
F2_sfcmpge
F2_sfcmpgt
F2_sfcmpuo
F2_sffixupd
F2_sffixupn
F2_sffixupr
F2_sffma
F2_sffma_lib
F2_sffma_sc
F2_sffms
F2_sffms_lib
F2_sfimm_n
F2_sfimm_p
F2_sfmax
F2_sfmin
F2_sfmpy
F2_sfsub
M2_acci
M2_accii
M2_cmaci_s0
M2_cmacr_s0
M2_cmacs_s0
M2_cmacs_s1
M2_cmacsc_s0
M2_cmacsc_s1
M2_cmpyi_s0
M2_cmpyr_s0
M2_cmpyrs_s0
M2_cmpyrs_s1
M2_cmpyrsc_s0
M2_cmpyrsc_s1
M2_cmpys_s0
M2_cmpys_s1
M2_cmpysc_s0
M2_cmpysc_s1
M2_cnacs_s0
M2_cnacs_s1
M2_cnacsc_s0
M2_cnacsc_s1
M2_dpmpyss_acc_s0
M2_dpmpyss_nac_s0
M2_dpmpyss_rnd_s0
M2_dpmpyss_s0
M2_dpmpyuu_acc_s0
M2_dpmpyuu_nac_s0
M2_dpmpyuu_s0
M2_hmmpyh_rs1
M2_hmmpyh_s1
M2_hmmpyl_rs1
M2_hmmpyl_s1
M2_maci
M2_macsin
M2_macsip
M2_mmachs_rs0
M2_mmachs_rs1
M2_mmachs_s0
M2_mmachs_s1
M2_mmacls_rs0
M2_mmacls_rs1
M2_mmacls_s0
M2_mmacls_s1
M2_mmacuhs_rs0
M2_mmacuhs_rs1
M2_mmacuhs_s0
M2_mmacuhs_s1
M2_mmaculs_rs0
M2_mmaculs_rs1
M2_mmaculs_s0
M2_mmaculs_s1
M2_mmpyh_rs0
M2_mmpyh_rs1
M2_mmpyh_s0
M2_mmpyh_s1
M2_mmpyl_rs0
M2_mmpyl_rs1
M2_mmpyl_s0
M2_mmpyl_s1
M2_mmpyuh_rs0
M2_mmpyuh_rs1
M2_mmpyuh_s0
M2_mmpyuh_s1
M2_mmpyul_rs0
M2_mmpyul_rs1
M2_mmpyul_s0
M2_mmpyul_s1
M2_mpy_acc_hh_s0
M2_mpy_acc_hh_s1
M2_mpy_acc_hl_s0
M2_mpy_acc_hl_s1
M2_mpy_acc_lh_s0
M2_mpy_acc_lh_s1
M2_mpy_acc_ll_s0
M2_mpy_acc_ll_s1
M2_mpy_acc_sat_hh_s0
M2_mpy_acc_sat_hh_s1
M2_mpy_acc_sat_hl_s0
M2_mpy_acc_sat_hl_s1
M2_mpy_acc_sat_lh_s0
M2_mpy_acc_sat_lh_s1
M2_mpy_acc_sat_ll_s0
M2_mpy_acc_sat_ll_s1
M2_mpy_hh_s0
M2_mpy_hh_s1
M2_mpy_hl_s0
M2_mpy_hl_s1
M2_mpy_lh_s0
M2_mpy_lh_s1
M2_mpy_ll_s0
M2_mpy_ll_s1
M2_mpy_nac_hh_s0
M2_mpy_nac_hh_s1
M2_mpy_nac_hl_s0
M2_mpy_nac_hl_s1
M2_mpy_nac_lh_s0
M2_mpy_nac_lh_s1
M2_mpy_nac_ll_s0
M2_mpy_nac_ll_s1
M2_mpy_nac_sat_hh_s0
M2_mpy_nac_sat_hh_s1
M2_mpy_nac_sat_hl_s0
M2_mpy_nac_sat_hl_s1
M2_mpy_nac_sat_lh_s0
M2_mpy_nac_sat_lh_s1
M2_mpy_nac_sat_ll_s0
M2_mpy_nac_sat_ll_s1
M2_mpy_rnd_hh_s0
M2_mpy_rnd_hh_s1
M2_mpy_rnd_hl_s0
M2_mpy_rnd_hl_s1
M2_mpy_rnd_lh_s0
M2_mpy_rnd_lh_s1
M2_mpy_rnd_ll_s0
M2_mpy_rnd_ll_s1
M2_mpy_sat_hh_s0
M2_mpy_sat_hh_s1
M2_mpy_sat_hl_s0
M2_mpy_sat_hl_s1
M2_mpy_sat_lh_s0
M2_mpy_sat_lh_s1
M2_mpy_sat_ll_s0
M2_mpy_sat_ll_s1
M2_mpy_sat_rnd_hh_s0
M2_mpy_sat_rnd_hh_s1
M2_mpy_sat_rnd_hl_s0
M2_mpy_sat_rnd_hl_s1
M2_mpy_sat_rnd_lh_s0
M2_mpy_sat_rnd_lh_s1
M2_mpy_sat_rnd_ll_s0
M2_mpy_sat_rnd_ll_s1
M2_mpy_up
M2_mpy_up_s1
M2_mpy_up_s1_sat
M2_mpyd_acc_hh_s0
M2_mpyd_acc_hh_s1
M2_mpyd_acc_hl_s0
M2_mpyd_acc_hl_s1
M2_mpyd_acc_lh_s0
M2_mpyd_acc_lh_s1
M2_mpyd_acc_ll_s0
M2_mpyd_acc_ll_s1
M2_mpyd_hh_s0
M2_mpyd_hh_s1
M2_mpyd_hl_s0
M2_mpyd_hl_s1
M2_mpyd_lh_s0
M2_mpyd_lh_s1
M2_mpyd_ll_s0
M2_mpyd_ll_s1
M2_mpyd_nac_hh_s0
M2_mpyd_nac_hh_s1
M2_mpyd_nac_hl_s0
M2_mpyd_nac_hl_s1
M2_mpyd_nac_lh_s0
M2_mpyd_nac_lh_s1
M2_mpyd_nac_ll_s0
M2_mpyd_nac_ll_s1
M2_mpyd_rnd_hh_s0
M2_mpyd_rnd_hh_s1
M2_mpyd_rnd_hl_s0
M2_mpyd_rnd_hl_s1
M2_mpyd_rnd_lh_s0
M2_mpyd_rnd_lh_s1
M2_mpyd_rnd_ll_s0
M2_mpyd_rnd_ll_s1
M2_mpyi
M2_mpysmi
M2_mpysu_up
M2_mpyu_acc_hh_s0
M2_mpyu_acc_hh_s1
M2_mpyu_acc_hl_s0
M2_mpyu_acc_hl_s1
M2_mpyu_acc_lh_s0
M2_mpyu_acc_lh_s1
M2_mpyu_acc_ll_s0
M2_mpyu_acc_ll_s1
M2_mpyu_hh_s0
M2_mpyu_hh_s1
M2_mpyu_hl_s0
M2_mpyu_hl_s1
M2_mpyu_lh_s0
M2_mpyu_lh_s1
M2_mpyu_ll_s0
M2_mpyu_ll_s1
M2_mpyu_nac_hh_s0
M2_mpyu_nac_hh_s1
M2_mpyu_nac_hl_s0
M2_mpyu_nac_hl_s1
M2_mpyu_nac_lh_s0
M2_mpyu_nac_lh_s1
M2_mpyu_nac_ll_s0
M2_mpyu_nac_ll_s1
M2_mpyu_up
M2_mpyud_acc_hh_s0
M2_mpyud_acc_hh_s1
M2_mpyud_acc_hl_s0
M2_mpyud_acc_hl_s1
M2_mpyud_acc_lh_s0
M2_mpyud_acc_lh_s1
M2_mpyud_acc_ll_s0
M2_mpyud_acc_ll_s1
M2_mpyud_hh_s0
M2_mpyud_hh_s1
M2_mpyud_hl_s0
M2_mpyud_hl_s1
M2_mpyud_lh_s0
M2_mpyud_lh_s1
M2_mpyud_ll_s0
M2_mpyud_ll_s1
M2_mpyud_nac_hh_s0
M2_mpyud_nac_hh_s1
M2_mpyud_nac_hl_s0
M2_mpyud_nac_hl_s1
M2_mpyud_nac_lh_s0
M2_mpyud_nac_lh_s1
M2_mpyud_nac_ll_s0
M2_mpyud_nac_ll_s1
M2_mpyui
M2_nacci
M2_naccii
M2_subacc
M2_vabsdiffh
M2_vabsdiffw
M2_vcmac_s0_sat_i
M2_vcmac_s0_sat_r
M2_vcmpy_s0_sat_i
M2_vcmpy_s0_sat_r
M2_vcmpy_s1_sat_i
M2_vcmpy_s1_sat_r
M2_vdmacs_s0
M2_vdmacs_s1
M2_vdmpyrs_s0
M2_vdmpyrs_s1
M2_vdmpys_s0
M2_vdmpys_s1
M2_vmac2
M2_vmac2es
M2_vmac2es_s0
M2_vmac2es_s1
M2_vmac2s_s0
M2_vmac2s_s1
M2_vmac2su_s0
M2_vmac2su_s1
M2_vmpy2es_s0
M2_vmpy2es_s1
M2_vmpy2s_s0
M2_vmpy2s_s0pack
M2_vmpy2s_s1
M2_vmpy2s_s1pack
M2_vmpy2su_s0
M2_vmpy2su_s1
M2_vraddh
M2_vradduh
M2_vrcmaci_s0
M2_vrcmaci_s0c
M2_vrcmacr_s0
M2_vrcmacr_s0c
M2_vrcmpyi_s0
M2_vrcmpyi_s0c
M2_vrcmpyr_s0
M2_vrcmpyr_s0c
M2_vrcmpys_acc_s1
M2_vrcmpys_s1
M2_vrcmpys_s1rp
M2_vrmac_s0
M2_vrmpy_s0
M2_xor_xacc
M4_and_and
M4_and_andn
M4_and_or
M4_and_xor
M4_cmpyi_wh
M4_cmpyi_whc
M4_cmpyr_wh
M4_cmpyr_whc
M4_mac_up_s1_sat
M4_mpyri_addi
M4_mpyri_addr
M4_mpyri_addr_u2
M4_mpyrr_addi
M4_mpyrr_addr
M4_nac_up_s1_sat
M4_or_and
M4_or_andn
M4_or_or
M4_or_xor
M4_pmpyw
M4_pmpyw_acc
M4_vpmpyh
M4_vpmpyh_acc
M4_vrmpyeh_acc_s0
M4_vrmpyeh_acc_s1
M4_vrmpyeh_s0
M4_vrmpyeh_s1
M4_vrmpyoh_acc_s0
M4_vrmpyoh_acc_s1
M4_vrmpyoh_s0
M4_vrmpyoh_s1
M4_xor_and
M4_xor_andn
M4_xor_or
M4_xor_xacc
M5_vdmacbsu
M5_vdmpybsu
M5_vmacbsu
M5_vmacbuu
M5_vmpybsu
M5_vmpybuu
M5_vrmacbsu
M5_vrmacbuu
M5_vrmpybsu
M5_vrmpybuu
S2_addasl_rrri
S2_asl_i_p
S2_asl_i_p_acc
S2_asl_i_p_and
S2_asl_i_p_nac
S2_asl_i_p_or
S2_asl_i_p_xacc
S2_asl_i_r
S2_asl_i_r_acc
S2_asl_i_r_and
S2_asl_i_r_nac
S2_asl_i_r_or
S2_asl_i_r_sat
S2_asl_i_r_xacc
S2_asl_i_vh
S2_asl_i_vw
S2_asl_r_p
S2_asl_r_p_acc
S2_asl_r_p_and
S2_asl_r_p_nac
S2_asl_r_p_or
S2_asl_r_p_xor
S2_asl_r_r
S2_asl_r_r_acc
S2_asl_r_r_and
S2_asl_r_r_nac
S2_asl_r_r_or
S2_asl_r_r_sat
S2_asl_r_vh
S2_asl_r_vw
S2_asr_i_p
S2_asr_i_p_acc
S2_asr_i_p_and
S2_asr_i_p_nac
S2_asr_i_p_or
S2_asr_i_p_rnd
S2_asr_i_p_rnd_goodsyntax
S2_asr_i_r
S2_asr_i_r_acc
S2_asr_i_r_and
S2_asr_i_r_nac
S2_asr_i_r_or
S2_asr_i_r_rnd
S2_asr_i_r_rnd_goodsyntax
S2_asr_i_svw_trun
S2_asr_i_vh
S2_asr_i_vw
S2_asr_r_p
S2_asr_r_p_acc
S2_asr_r_p_and
S2_asr_r_p_nac
S2_asr_r_p_or
S2_asr_r_p_xor
S2_asr_r_r
S2_asr_r_r_acc
S2_asr_r_r_and
S2_asr_r_r_nac
S2_asr_r_r_or
S2_asr_r_r_sat
S2_asr_r_svw_trun
S2_asr_r_vh
S2_asr_r_vw
S2_brev
S2_brevp
S2_cl0
S2_cl0p
S2_cl1
S2_cl1p
S2_clb
S2_clbnorm
S2_clbp
S2_clrbit_i
S2_clrbit_r
S2_ct0
S2_ct0p
S2_ct1
S2_ct1p
S2_deinterleave
S2_extractu
S2_extractu_rp
S2_extractup
S2_extractup_rp
S2_insert
S2_insert_rp
S2_insertp
S2_insertp_rp
S2_interleave
S2_lfsp
S2_lsl_r_p
S2_lsl_r_p_acc
S2_lsl_r_p_and
S2_lsl_r_p_nac
S2_lsl_r_p_or
S2_lsl_r_p_xor
S2_lsl_r_r
S2_lsl_r_r_acc
S2_lsl_r_r_and
S2_lsl_r_r_nac
S2_lsl_r_r_or
S2_lsl_r_vh
S2_lsl_r_vw
S2_lsr_i_p
S2_lsr_i_p_acc
S2_lsr_i_p_and
S2_lsr_i_p_nac
S2_lsr_i_p_or
S2_lsr_i_p_xacc
S2_lsr_i_r
S2_lsr_i_r_acc
S2_lsr_i_r_and
S2_lsr_i_r_nac
S2_lsr_i_r_or
S2_lsr_i_r_xacc
S2_lsr_i_vh
S2_lsr_i_vw
S2_lsr_r_p
S2_lsr_r_p_acc
S2_lsr_r_p_and
S2_lsr_r_p_nac
S2_lsr_r_p_or
S2_lsr_r_p_xor
S2_lsr_r_r
S2_lsr_r_r_acc
S2_lsr_r_r_and
S2_lsr_r_r_nac
S2_lsr_r_r_or
S2_lsr_r_vh
S2_lsr_r_vw
S2_packhl
S2_parityp
S2_setbit_i
S2_setbit_r
S2_shuffeb
S2_shuffeh
S2_shuffob
S2_shuffoh
S2_svsathb
S2_svsathub
S2_tableidxb_goodsyntax
S2_tableidxd_goodsyntax
S2_tableidxh_goodsyntax
S2_tableidxw_goodsyntax
S2_togglebit_i
S2_togglebit_r
S2_tstbit_i
S2_tstbit_r
S2_valignib
S2_valignrb
S2_vcnegh
S2_vcrotate
S2_vrcnegh
S2_vrndpackwh
S2_vrndpackwhs
S2_vsathb
S2_vsathb_nopack
S2_vsathub
S2_vsathub_nopack
S2_vsatwh
S2_vsatwh_nopack
S2_vsatwuh
S2_vsatwuh_nopack
S2_vsplatrb
S2_vsplatrh
S2_vspliceib
S2_vsplicerb
S2_vsxtbh
S2_vsxthw
S2_vtrunehb
S2_vtrunewh
S2_vtrunohb
S2_vtrunowh
S2_vzxtbh
S2_vzxthw
S4_addaddi
S4_addi_asl_ri
S4_addi_lsr_ri
S4_andi_asl_ri
S4_andi_lsr_ri
S4_clbaddi
S4_clbpaddi
S4_clbpnorm
S4_extract
S4_extract_rp
S4_extractp
S4_extractp_rp
S4_lsli
S4_ntstbit_i
S4_ntstbit_r
S4_or_andi
S4_or_andix
S4_or_ori
S4_ori_asl_ri
S4_ori_lsr_ri
S4_parity
S4_subaddi
S4_subi_asl_ri
S4_subi_lsr_ri
S4_vrcrotate
S4_vrcrotate_acc
S4_vxaddsubh
S4_vxaddsubhr
S4_vxaddsubw
S4_vxsubaddh
S4_vxsubaddhr
S4_vxsubaddw
S5_asrhub_rnd_sat_goodsyntax
S5_asrhub_sat
S5_popcountp
S5_vasrhrnd_goodsyntax
SI_to_SXTHI_asrh
circ_ldd