Crate libcapstone_sys [] [src]

Structs

Builder

A utlity for configuring the Capstone engine.

Capstone

An instance of Capstone represents an instance of the capstone engine.

Instructions

Instructions represents a number of disassembled instructions.

PointerIter

PointerIter iterates over an array of things that are pointed to by an pointer.

__va_list_tag
arm64_op_mem
arm_op_mem
cs_arm
cs_arm64
cs_arm64_op
cs_arm64_op__bindgen_ty_1
cs_arm_op
cs_arm_op__bindgen_ty_1
cs_detail
cs_insn
cs_mips
cs_mips_op
cs_opt_mem
cs_opt_skipdata
cs_ppc
cs_ppc_op
cs_sparc
cs_sparc_op
cs_sysz
cs_sysz_op
cs_x86
cs_x86_op
cs_xcore
cs_xcore_op
mips_op_mem
ppc_op_crx
ppc_op_mem
sparc_op_mem
sysz_op_mem
x86_op_mem
xcore_op_mem

Constants

ARM64_BARRIER_INVALID
ARM64_BARRIER_ISH
ARM64_BARRIER_ISHLD
ARM64_BARRIER_ISHST
ARM64_BARRIER_LD
ARM64_BARRIER_NSH
ARM64_BARRIER_NSHLD
ARM64_BARRIER_NSHST
ARM64_BARRIER_OSH
ARM64_BARRIER_OSHLD
ARM64_BARRIER_OSHST
ARM64_BARRIER_ST
ARM64_BARRIER_SY
ARM64_CC_AL
ARM64_CC_EQ
ARM64_CC_GE
ARM64_CC_GT
ARM64_CC_HI
ARM64_CC_HS
ARM64_CC_INVALID
ARM64_CC_LE
ARM64_CC_LO
ARM64_CC_LS
ARM64_CC_LT
ARM64_CC_MI
ARM64_CC_NE
ARM64_CC_NV
ARM64_CC_PL
ARM64_CC_VC
ARM64_CC_VS
ARM64_EXT_INVALID
ARM64_EXT_SXTB
ARM64_EXT_SXTH
ARM64_EXT_SXTW
ARM64_EXT_SXTX
ARM64_EXT_UXTB
ARM64_EXT_UXTH
ARM64_EXT_UXTW
ARM64_EXT_UXTX
ARM64_OP_BARRIER
ARM64_OP_CIMM
ARM64_OP_FP
ARM64_OP_IMM
ARM64_OP_INVALID
ARM64_OP_MEM
ARM64_OP_PREFETCH
ARM64_OP_PSTATE
ARM64_OP_REG
ARM64_OP_REG_MRS
ARM64_OP_REG_MSR
ARM64_OP_SYS
ARM64_PRFM_INVALID
ARM64_PRFM_PLDL1KEEP
ARM64_PRFM_PLDL1STRM
ARM64_PRFM_PLDL2KEEP
ARM64_PRFM_PLDL2STRM
ARM64_PRFM_PLDL3KEEP
ARM64_PRFM_PLDL3STRM
ARM64_PRFM_PLIL1KEEP
ARM64_PRFM_PLIL1STRM
ARM64_PRFM_PLIL2KEEP
ARM64_PRFM_PLIL2STRM
ARM64_PRFM_PLIL3KEEP
ARM64_PRFM_PLIL3STRM
ARM64_PRFM_PSTL1KEEP
ARM64_PRFM_PSTL1STRM
ARM64_PRFM_PSTL2KEEP
ARM64_PRFM_PSTL2STRM
ARM64_PRFM_PSTL3KEEP
ARM64_PRFM_PSTL3STRM
ARM64_PSTATE_DAIFCLR
ARM64_PSTATE_DAIFSET
ARM64_PSTATE_INVALID
ARM64_PSTATE_SPSEL
ARM64_SFT_ASR
ARM64_SFT_INVALID
ARM64_SFT_LSL
ARM64_SFT_LSR
ARM64_SFT_MSL
ARM64_SFT_ROR
ARM64_VAS_16B
ARM64_VAS_1D
ARM64_VAS_1Q
ARM64_VAS_2D
ARM64_VAS_2S
ARM64_VAS_4H
ARM64_VAS_4S
ARM64_VAS_8B
ARM64_VAS_8H
ARM64_VAS_INVALID
ARM64_VESS_B
ARM64_VESS_D
ARM64_VESS_H
ARM64_VESS_INVALID
ARM64_VESS_S
ARM_CC_AL
ARM_CC_EQ
ARM_CC_GE
ARM_CC_GT
ARM_CC_HI
ARM_CC_HS
ARM_CC_INVALID
ARM_CC_LE
ARM_CC_LO
ARM_CC_LS
ARM_CC_LT
ARM_CC_MI
ARM_CC_NE
ARM_CC_PL
ARM_CC_VC
ARM_CC_VS
ARM_CPSFLAG_A
ARM_CPSFLAG_F
ARM_CPSFLAG_I
ARM_CPSFLAG_INVALID
ARM_CPSFLAG_NONE
ARM_CPSMODE_ID
ARM_CPSMODE_IE
ARM_CPSMODE_INVALID
ARM_MB_INVALID
ARM_MB_ISH
ARM_MB_ISHLD
ARM_MB_ISHST
ARM_MB_LD
ARM_MB_NSH
ARM_MB_NSHLD
ARM_MB_NSHST
ARM_MB_OSH
ARM_MB_OSHLD
ARM_MB_OSHST
ARM_MB_RESERVED_0
ARM_MB_RESERVED_4
ARM_MB_RESERVED_8
ARM_MB_RESERVED_12
ARM_MB_ST
ARM_MB_SY
ARM_OP_CIMM
ARM_OP_FP
ARM_OP_IMM
ARM_OP_INVALID
ARM_OP_MEM
ARM_OP_PIMM
ARM_OP_REG
ARM_OP_SETEND
ARM_OP_SYSREG
ARM_SETEND_BE
ARM_SETEND_INVALID
ARM_SETEND_LE
ARM_SFT_ASR
ARM_SFT_ASR_REG
ARM_SFT_INVALID
ARM_SFT_LSL
ARM_SFT_LSL_REG
ARM_SFT_LSR
ARM_SFT_LSR_REG
ARM_SFT_ROR
ARM_SFT_ROR_REG
ARM_SFT_RRX
ARM_SFT_RRX_REG
ARM_VECTORDATA_F32
ARM_VECTORDATA_F64
ARM_VECTORDATA_F16F32
ARM_VECTORDATA_F16F64
ARM_VECTORDATA_F32F16
ARM_VECTORDATA_F32F64
ARM_VECTORDATA_F32S16
ARM_VECTORDATA_F32S32
ARM_VECTORDATA_F32U16
ARM_VECTORDATA_F32U32
ARM_VECTORDATA_F64F16
ARM_VECTORDATA_F64F32
ARM_VECTORDATA_F64S16
ARM_VECTORDATA_F64S32
ARM_VECTORDATA_F64U16
ARM_VECTORDATA_F64U32
ARM_VECTORDATA_I8
ARM_VECTORDATA_I16
ARM_VECTORDATA_I32
ARM_VECTORDATA_I64
ARM_VECTORDATA_INVALID
ARM_VECTORDATA_P8
ARM_VECTORDATA_S8
ARM_VECTORDATA_S16
ARM_VECTORDATA_S32
ARM_VECTORDATA_S64
ARM_VECTORDATA_S16F32
ARM_VECTORDATA_S16F64
ARM_VECTORDATA_S32F32
ARM_VECTORDATA_S32F64
ARM_VECTORDATA_U8
ARM_VECTORDATA_U16
ARM_VECTORDATA_U32
ARM_VECTORDATA_U64
ARM_VECTORDATA_U16F32
ARM_VECTORDATA_U16F64
ARM_VECTORDATA_U32F32
ARM_VECTORDATA_U32F64
CS_ARCH_ALL
CS_ARCH_ARM
CS_ARCH_ARM64
CS_ARCH_MAX
CS_ARCH_MIPS
CS_ARCH_PPC
CS_ARCH_SPARC
CS_ARCH_SYSZ
CS_ARCH_X86
CS_ARCH_XCORE
CS_ERR_ARCH
CS_ERR_CSH
CS_ERR_DETAIL
CS_ERR_DIET
CS_ERR_HANDLE
CS_ERR_MEM
CS_ERR_MEMSETUP
CS_ERR_MODE
CS_ERR_OK
CS_ERR_OPTION
CS_ERR_SKIPDATA
CS_ERR_VERSION
CS_ERR_X86_ATT
CS_ERR_X86_INTEL
CS_GRP_CALL
CS_GRP_INT
CS_GRP_INVALID
CS_GRP_IRET
CS_GRP_JUMP
CS_GRP_RET
CS_MODE_16
CS_MODE_32
CS_MODE_64
CS_MODE_ARM
CS_MODE_BIG_ENDIAN
CS_MODE_LITTLE_ENDIAN
CS_MODE_MCLASS
CS_MODE_MICRO
CS_MODE_MIPS3
CS_MODE_MIPS32
CS_MODE_MIPS64
CS_MODE_MIPS32R6
CS_MODE_MIPSGP64
CS_MODE_THUMB
CS_MODE_V8
CS_MODE_V9
CS_OPT_DETAIL
CS_OPT_MEM
CS_OPT_MODE
CS_OPT_OFF
CS_OPT_ON
CS_OPT_SKIPDATA
CS_OPT_SKIPDATA_SETUP
CS_OPT_SYNTAX
CS_OPT_SYNTAX_ATT
CS_OPT_SYNTAX_DEFAULT
CS_OPT_SYNTAX_INTEL
CS_OPT_SYNTAX_NOREGNAME
CS_OP_FP
CS_OP_IMM
CS_OP_INVALID
CS_OP_MEM
CS_OP_REG
MIPS_OP_IMM
MIPS_OP_INVALID
MIPS_OP_MEM
MIPS_OP_REG
PPC_BC_EQ
PPC_BC_GE
PPC_BC_GT
PPC_BC_INVALID
PPC_BC_LE
PPC_BC_LT
PPC_BC_NE
PPC_BC_NS
PPC_BC_NU
PPC_BC_SO
PPC_BC_UN
PPC_BH_INVALID
PPC_BH_MINUS
PPC_BH_PLUS
PPC_OP_CRX
PPC_OP_IMM
PPC_OP_INVALID
PPC_OP_MEM
PPC_OP_REG
SPARC_CC_FCC_A
SPARC_CC_FCC_E
SPARC_CC_FCC_G
SPARC_CC_FCC_GE
SPARC_CC_FCC_L
SPARC_CC_FCC_LE
SPARC_CC_FCC_LG
SPARC_CC_FCC_N
SPARC_CC_FCC_NE
SPARC_CC_FCC_O
SPARC_CC_FCC_U
SPARC_CC_FCC_UE
SPARC_CC_FCC_UG
SPARC_CC_FCC_UGE
SPARC_CC_FCC_UL
SPARC_CC_FCC_ULE
SPARC_CC_ICC_A
SPARC_CC_ICC_CC
SPARC_CC_ICC_CS
SPARC_CC_ICC_E
SPARC_CC_ICC_G
SPARC_CC_ICC_GE
SPARC_CC_ICC_GU
SPARC_CC_ICC_L
SPARC_CC_ICC_LE
SPARC_CC_ICC_LEU
SPARC_CC_ICC_N
SPARC_CC_ICC_NE
SPARC_CC_ICC_NEG
SPARC_CC_ICC_POS
SPARC_CC_ICC_VC
SPARC_CC_ICC_VS
SPARC_CC_INVALID
SPARC_HINT_A
SPARC_HINT_INVALID
SPARC_HINT_PN
SPARC_HINT_PT
SPARC_OP_IMM
SPARC_OP_INVALID
SPARC_OP_MEM
SPARC_OP_REG
SYSZ_CC_E
SYSZ_CC_H
SYSZ_CC_HE
SYSZ_CC_INVALID
SYSZ_CC_L
SYSZ_CC_LE
SYSZ_CC_LH
SYSZ_CC_NE
SYSZ_CC_NH
SYSZ_CC_NHE
SYSZ_CC_NL
SYSZ_CC_NLE
SYSZ_CC_NLH
SYSZ_CC_NO
SYSZ_CC_O
SYSZ_OP_ACREG
SYSZ_OP_IMM
SYSZ_OP_INVALID
SYSZ_OP_MEM
SYSZ_OP_REG
X86_AVX_BCAST_2
X86_AVX_BCAST_4
X86_AVX_BCAST_8
X86_AVX_BCAST_16
X86_AVX_BCAST_INVALID
X86_AVX_CC_EQ
X86_AVX_CC_EQ_OS
X86_AVX_CC_EQ_UQ
X86_AVX_CC_EQ_US
X86_AVX_CC_FALSE
X86_AVX_CC_FALSE_OS
X86_AVX_CC_GE
X86_AVX_CC_GE_OQ
X86_AVX_CC_GT
X86_AVX_CC_GT_OQ
X86_AVX_CC_INVALID
X86_AVX_CC_LE
X86_AVX_CC_LE_OQ
X86_AVX_CC_LT
X86_AVX_CC_LT_OQ
X86_AVX_CC_NEQ
X86_AVX_CC_NEQ_OQ
X86_AVX_CC_NEQ_OS
X86_AVX_CC_NEQ_US
X86_AVX_CC_NGE
X86_AVX_CC_NGE_UQ
X86_AVX_CC_NGT
X86_AVX_CC_NGT_UQ
X86_AVX_CC_NLE
X86_AVX_CC_NLE_UQ
X86_AVX_CC_NLT
X86_AVX_CC_NLT_UQ
X86_AVX_CC_ORD
X86_AVX_CC_ORD_S
X86_AVX_CC_TRUE
X86_AVX_CC_TRUE_US
X86_AVX_CC_UNORD
X86_AVX_CC_UNORD_S
X86_AVX_RM_INVALID
X86_AVX_RM_RD
X86_AVX_RM_RN
X86_AVX_RM_RU
X86_AVX_RM_RZ
X86_OP_FP
X86_OP_IMM
X86_OP_INVALID
X86_OP_MEM
X86_OP_REG
X86_REG_AH
X86_REG_AL
X86_REG_AX
X86_REG_BH
X86_REG_BL
X86_REG_BP
X86_REG_BPL
X86_REG_BX
X86_REG_CH
X86_REG_CL
X86_REG_CR0
X86_REG_CR1
X86_REG_CR2
X86_REG_CR3
X86_REG_CR4
X86_REG_CR5
X86_REG_CR6
X86_REG_CR7
X86_REG_CR8
X86_REG_CR9
X86_REG_CR10
X86_REG_CR11
X86_REG_CR12
X86_REG_CR13
X86_REG_CR14
X86_REG_CR15
X86_REG_CS
X86_REG_CX
X86_REG_DH
X86_REG_DI
X86_REG_DIL
X86_REG_DL
X86_REG_DR0
X86_REG_DR1
X86_REG_DR2
X86_REG_DR3
X86_REG_DR4
X86_REG_DR5
X86_REG_DR6
X86_REG_DR7
X86_REG_DS
X86_REG_DX
X86_REG_EAX
X86_REG_EBP
X86_REG_EBX
X86_REG_ECX
X86_REG_EDI
X86_REG_EDX
X86_REG_EFLAGS
X86_REG_EIP
X86_REG_EIZ
X86_REG_ENDING
X86_REG_ES
X86_REG_ESI
X86_REG_ESP
X86_REG_FP0
X86_REG_FP1
X86_REG_FP2
X86_REG_FP3
X86_REG_FP4
X86_REG_FP5
X86_REG_FP6
X86_REG_FP7
X86_REG_FPSW
X86_REG_FS
X86_REG_GS
X86_REG_INVALID
X86_REG_IP
X86_REG_K0
X86_REG_K1
X86_REG_K2
X86_REG_K3
X86_REG_K4
X86_REG_K5
X86_REG_K6
X86_REG_K7
X86_REG_MM0
X86_REG_MM1
X86_REG_MM2
X86_REG_MM3
X86_REG_MM4
X86_REG_MM5
X86_REG_MM6
X86_REG_MM7
X86_REG_R8
X86_REG_R9
X86_REG_R10
X86_REG_R11
X86_REG_R12
X86_REG_R13
X86_REG_R14
X86_REG_R15
X86_REG_R10B
X86_REG_R10D
X86_REG_R10W
X86_REG_R11B
X86_REG_R11D
X86_REG_R11W
X86_REG_R12B
X86_REG_R12D
X86_REG_R12W
X86_REG_R13B
X86_REG_R13D
X86_REG_R13W
X86_REG_R14B
X86_REG_R14D
X86_REG_R14W
X86_REG_R15B
X86_REG_R15D
X86_REG_R15W
X86_REG_R8B
X86_REG_R8D
X86_REG_R8W
X86_REG_R9B
X86_REG_R9D
X86_REG_R9W
X86_REG_RAX
X86_REG_RBP
X86_REG_RBX
X86_REG_RCX
X86_REG_RDI
X86_REG_RDX
X86_REG_RIP
X86_REG_RIZ
X86_REG_RSI
X86_REG_RSP
X86_REG_SI
X86_REG_SIL
X86_REG_SP
X86_REG_SPL
X86_REG_SS
X86_REG_ST0
X86_REG_ST1
X86_REG_ST2
X86_REG_ST3
X86_REG_ST4
X86_REG_ST5
X86_REG_ST6
X86_REG_ST7
X86_REG_XMM0
X86_REG_XMM1
X86_REG_XMM2
X86_REG_XMM3
X86_REG_XMM4
X86_REG_XMM5
X86_REG_XMM6
X86_REG_XMM7
X86_REG_XMM8
X86_REG_XMM9
X86_REG_XMM10
X86_REG_XMM11
X86_REG_XMM12
X86_REG_XMM13
X86_REG_XMM14
X86_REG_XMM15
X86_REG_XMM16
X86_REG_XMM17
X86_REG_XMM18
X86_REG_XMM19
X86_REG_XMM20
X86_REG_XMM21
X86_REG_XMM22
X86_REG_XMM23
X86_REG_XMM24
X86_REG_XMM25
X86_REG_XMM26
X86_REG_XMM27
X86_REG_XMM28
X86_REG_XMM29
X86_REG_XMM30
X86_REG_XMM31
X86_REG_YMM0
X86_REG_YMM1
X86_REG_YMM2
X86_REG_YMM3
X86_REG_YMM4
X86_REG_YMM5
X86_REG_YMM6
X86_REG_YMM7
X86_REG_YMM8
X86_REG_YMM9
X86_REG_YMM10
X86_REG_YMM11
X86_REG_YMM12
X86_REG_YMM13
X86_REG_YMM14
X86_REG_YMM15
X86_REG_YMM16
X86_REG_YMM17
X86_REG_YMM18
X86_REG_YMM19
X86_REG_YMM20
X86_REG_YMM21
X86_REG_YMM22
X86_REG_YMM23
X86_REG_YMM24
X86_REG_YMM25
X86_REG_YMM26
X86_REG_YMM27
X86_REG_YMM28
X86_REG_YMM29
X86_REG_YMM30
X86_REG_YMM31
X86_REG_ZMM0
X86_REG_ZMM1
X86_REG_ZMM2
X86_REG_ZMM3
X86_REG_ZMM4
X86_REG_ZMM5
X86_REG_ZMM6
X86_REG_ZMM7
X86_REG_ZMM8
X86_REG_ZMM9
X86_REG_ZMM10
X86_REG_ZMM11
X86_REG_ZMM12
X86_REG_ZMM13
X86_REG_ZMM14
X86_REG_ZMM15
X86_REG_ZMM16
X86_REG_ZMM17
X86_REG_ZMM18
X86_REG_ZMM19
X86_REG_ZMM20
X86_REG_ZMM21
X86_REG_ZMM22
X86_REG_ZMM23
X86_REG_ZMM24
X86_REG_ZMM25
X86_REG_ZMM26
X86_REG_ZMM27
X86_REG_ZMM28
X86_REG_ZMM29
X86_REG_ZMM30
X86_REG_ZMM31
X86_SSE_CC_EQ
X86_SSE_CC_EQ_UQ
X86_SSE_CC_FALSE
X86_SSE_CC_GE
X86_SSE_CC_GT
X86_SSE_CC_INVALID
X86_SSE_CC_LE
X86_SSE_CC_LT
X86_SSE_CC_NEQ
X86_SSE_CC_NEQ_OQ
X86_SSE_CC_NGE
X86_SSE_CC_NGT
X86_SSE_CC_NLE
X86_SSE_CC_NLT
X86_SSE_CC_ORD
X86_SSE_CC_TRUE
X86_SSE_CC_UNORD
XCORE_OP_IMM
XCORE_OP_INVALID
XCORE_OP_MEM
XCORE_OP_REG

Functions

cs_close
cs_disasm
cs_disasm_ex
cs_disasm_iter
cs_errno
cs_free
cs_group_name
cs_insn_group
cs_insn_name
cs_malloc
cs_op_count
cs_op_index
cs_open
cs_option
cs_reg_name
cs_reg_read
cs_reg_write
cs_strerror
cs_support
cs_version
support

Returns whether the requested feature is supported. query can be one of the CS_ARCH_* values or CS_ARCH_ALL + 1 to check the diet mode.

version

Returns the major version, minor version and the combined version.

Type Definitions

CsResult

Represents a Result from the capstone engine.

__builtin_va_list
arm64_barrier_op
arm64_cc
arm64_extender
arm64_op_type
arm64_prefetch_op
arm64_pstate
arm64_shifter
arm64_vas
arm64_vess
arm_cc
arm_cpsflag_type
arm_cpsmode_type
arm_mem_barrier
arm_op_type
arm_setend_type
arm_shifter
arm_vectordata_type
cs_arch
cs_calloc_t
cs_err
cs_free_t
cs_group_type
cs_malloc_t
cs_mode
cs_op_type
cs_opt_type
cs_opt_value
cs_realloc_t
cs_skipdata_cb_t
cs_vsnprintf_t
csh
mips_op_type
ppc_bc
ppc_bh
ppc_op_type
sparc_cc
sparc_hint
sparc_op_type
sysz_cc
sysz_op_type
va_list
x86_avx_bcast
x86_avx_cc
x86_avx_rm
x86_op_type
x86_reg
x86_sse_cc
xcore_op_type

Unions

cs_arm64_op__bindgen_ty_2
cs_arm_op__bindgen_ty_2
cs_detail__bindgen_ty_1
cs_mips_op__bindgen_ty_1
cs_ppc_op__bindgen_ty_1
cs_sparc_op__bindgen_ty_1
cs_sysz_op__bindgen_ty_1
cs_x86_op__bindgen_ty_1
cs_xcore_op__bindgen_ty_1