[−][src]Module ksz8863::smi
Serial Management Interface (SMI).
The SMI is the KSZ8863-specific, non-standard MIIM interface that provides access to all available configuration registers.
Each register is indexed via an 8-bit address.
Re-exports
pub use chip_id0::ChipId0; |
pub use chip_id1::ChipId1; |
pub use gc0::Gc0; |
pub use gc1::Gc1; |
pub use gc2::Gc2; |
pub use gc3::Gc3; |
pub use gc4::Gc4; |
pub use gc5::Gc5; |
pub use gc9::Gc9; |
pub use gc10::Gc10; |
pub use gc11::Gc11; |
pub use gc12::Gc12; |
pub use gc13::Gc13; |
pub use port1_ctrl0::Port1Ctrl0; |
pub use port1_ctrl1::Port1Ctrl1; |
pub use port1_ctrl2::Port1Ctrl2; |
pub use port1_ctrl3::Port1Ctrl3; |
pub use port1_ctrl4::Port1Ctrl4; |
pub use port1_ctrl5::Port1Ctrl5; |
pub use port1_q0_ingress_rate_limit::Port1Q0IngressRateLimit; |
pub use port1_q1_ingress_rate_limit::Port1Q1IngressRateLimit; |
pub use port1_q2_ingress_rate_limit::Port1Q2IngressRateLimit; |
pub use port1_q3_ingress_rate_limit::Port1Q3IngressRateLimit; |
pub use port1_phy_special::Port1PhySpecial; |
pub use port1_link_md_result::Port1LinkMdResult; |
pub use port1_ctrl12::Port1Ctrl12; |
pub use port1_ctrl13::Port1Ctrl13; |
pub use port1_status0::Port1Status0; |
pub use port1_status1::Port1Status1; |
pub use port2_ctrl0::Port2Ctrl0; |
pub use port2_ctrl1::Port2Ctrl1; |
pub use port2_ctrl2::Port2Ctrl2; |
pub use port2_ctrl3::Port2Ctrl3; |
pub use port2_ctrl4::Port2Ctrl4; |
pub use port2_ctrl5::Port2Ctrl5; |
pub use port2_q0_ingress_rate_limit::Port2Q0IngressRateLimit; |
pub use port2_q1_ingress_rate_limit::Port2Q1IngressRateLimit; |
pub use port2_q2_ingress_rate_limit::Port2Q2IngressRateLimit; |
pub use port2_q3_ingress_rate_limit::Port2Q3IngressRateLimit; |
pub use port2_phy_special::Port2PhySpecial; |
pub use port2_link_md_result::Port2LinkMdResult; |
pub use port2_ctrl12::Port2Ctrl12; |
pub use port2_ctrl13::Port2Ctrl13; |
pub use port2_status0::Port2Status0; |
pub use port2_status1::Port2Status1; |
pub use port3_ctrl0::Port3Ctrl0; |
pub use port3_ctrl1::Port3Ctrl1; |
pub use port3_ctrl2::Port3Ctrl2; |
pub use port3_ctrl3::Port3Ctrl3; |
pub use port3_ctrl4::Port3Ctrl4; |
pub use port3_ctrl5::Port3Ctrl5; |
pub use port3_q0_ingress_rate_limit::Port3Q0IngressRateLimit; |
pub use port3_q1_ingress_rate_limit::Port3Q1IngressRateLimit; |
pub use port3_q2_ingress_rate_limit::Port3Q2IngressRateLimit; |
pub use port3_q3_ingress_rate_limit::Port3Q3IngressRateLimit; |
pub use port3_status1::Port3Status1; |
pub use reset::Reset; |
pub use tos_priority_ctrl_0::TosPriorityCtrl0; |
pub use tos_priority_ctrl_1::TosPriorityCtrl1; |
pub use tos_priority_ctrl_2::TosPriorityCtrl2; |
pub use tos_priority_ctrl_3::TosPriorityCtrl3; |
pub use tos_priority_ctrl_4::TosPriorityCtrl4; |
pub use tos_priority_ctrl_5::TosPriorityCtrl5; |
pub use tos_priority_ctrl_6::TosPriorityCtrl6; |
pub use tos_priority_ctrl_7::TosPriorityCtrl7; |
pub use tos_priority_ctrl_8::TosPriorityCtrl8; |
pub use tos_priority_ctrl_9::TosPriorityCtrl9; |
pub use tos_priority_ctrl_10::TosPriorityCtrl10; |
pub use tos_priority_ctrl_11::TosPriorityCtrl11; |
pub use tos_priority_ctrl_12::TosPriorityCtrl12; |
pub use tos_priority_ctrl_13::TosPriorityCtrl13; |
pub use tos_priority_ctrl_14::TosPriorityCtrl14; |
pub use tos_priority_ctrl_15::TosPriorityCtrl15; |
pub use mac_addr_0::MacAddr0; |
pub use mac_addr_1::MacAddr1; |
pub use mac_addr_2::MacAddr2; |
pub use mac_addr_3::MacAddr3; |
pub use mac_addr_4::MacAddr4; |
pub use mac_addr_5::MacAddr5; |
pub use user_def1::UserDef1; |
pub use user_def2::UserDef2; |
pub use user_def3::UserDef3; |
pub use indirect_access_ctrl0::IndirectAccessCtrl0; |
pub use indirect_access_ctrl1::IndirectAccessCtrl1; |
pub use indirect_data8::IndirectData8; |
pub use indirect_data7::IndirectData7; |
pub use indirect_data6::IndirectData6; |
pub use indirect_data5::IndirectData5; |
pub use indirect_data4::IndirectData4; |
pub use indirect_data3::IndirectData3; |
pub use indirect_data2::IndirectData2; |
pub use indirect_data1::IndirectData1; |
pub use indirect_data0::IndirectData0; |
pub use station1_mac_addr0::Station1MacAddr0; |
pub use station1_mac_addr1::Station1MacAddr1; |
pub use station1_mac_addr2::Station1MacAddr2; |
pub use station1_mac_addr3::Station1MacAddr3; |
pub use station1_mac_addr4::Station1MacAddr4; |
pub use station1_mac_addr5::Station1MacAddr5; |
pub use station2_mac_addr0::Station2MacAddr0; |
pub use station2_mac_addr1::Station2MacAddr1; |
pub use station2_mac_addr2::Station2MacAddr2; |
pub use station2_mac_addr3::Station2MacAddr3; |
pub use station2_mac_addr4::Station2MacAddr4; |
pub use station2_mac_addr5::Station2MacAddr5; |
pub use mode::Mode; |
pub use high_priority_packet_buffer_q3::HighPriorityPacketBufferQ3; |
pub use high_priority_packet_buffer_q2::HighPriorityPacketBufferQ2; |
pub use high_priority_packet_buffer_q1::HighPriorityPacketBufferQ1; |
pub use high_priority_packet_buffer_q0::HighPriorityPacketBufferQ0; |
pub use pm_usage_flow_ctrl_select_mode_1::PmUsageFlowCtrlSelectMode1; |
pub use pm_usage_flow_ctrl_select_mode_2::PmUsageFlowCtrlSelectMode2; |
pub use pm_usage_flow_ctrl_select_mode_3::PmUsageFlowCtrlSelectMode3; |
pub use pm_usage_flow_ctrl_select_mode_4::PmUsageFlowCtrlSelectMode4; |
pub use port1_txq_split_for_q3::Port1TxqSplitForQ3; |
pub use port1_txq_split_for_q2::Port1TxqSplitForQ2; |
pub use port1_txq_split_for_q1::Port1TxqSplitForQ1; |
pub use port1_txq_split_for_q0::Port1TxqSplitForQ0; |
pub use port2_txq_split_for_q3::Port2TxqSplitForQ3; |
pub use port2_txq_split_for_q2::Port2TxqSplitForQ2; |
pub use port2_txq_split_for_q1::Port2TxqSplitForQ1; |
pub use port2_txq_split_for_q0::Port2TxqSplitForQ0; |
pub use port3_txq_split_for_q3::Port3TxqSplitForQ3; |
pub use port3_txq_split_for_q2::Port3TxqSplitForQ2; |
pub use port3_txq_split_for_q1::Port3TxqSplitForQ1; |
pub use port3_txq_split_for_q0::Port3TxqSplitForQ0; |
pub use interrupt_enable::InterruptEnable; |
pub use link_change_interrupt::LinkChangeInterrupt; |
pub use force_pause_off::ForcePauseOff; |
pub use fiber_signal_threshold::FiberSignalThreshold; |
pub use internal_ldo_ctrl::InternalLdoCtrl; |
pub use insert_src_pvid::InsertSrcPvid; |
pub use pwr_mgmt_and_led_mode::PwrMgmtAndLedMode; |
pub use sleep_mode::SleepMode; |
pub use fwd_invalid_vid_frame_and_host_mode::FwdInvalidVidFrameAndHostMode; |
Modules
Structs
| Map | A map of the state of all registers in the |
| R | A type wrapper that allows to read the individual fields of a register. |
| Reg | A wrapper around an |
| Smi | A higher-level wrapper around an |
| W | A type wrapper that allows to write to the individual fields of a register. |
Enums
| Address | The set of implemented MIIM register addresses on the KSZ8863. |
| State | A dynamic representation of a register's state. |
Traits
| Read | A trait for reading from the KSZ8863's SMI interface. |
| Register | Implemented for all 8-bit SMI registers. |
| Write | A trait for writing to the KSZ8863's SMI interface. |
Functions
| read_ctrl_bits | Given the register address, produce the control bits for an SMI read operation. |
| write_ctrl_bits | Given the register address, produce the control bits for an SMI write operation. |