[][src]Crate imxrt1062_dcp

Modules

capability0

DCP capability 0 register

capability1

DCP capability 1 register

ch0sema

DCP channel 0 semaphore register

ch0stat

DCP channel 0 status register

ch0opts

DCP channel 0 options register

ch0cmdptr

DCP channel 0 command pointer address register

ch0stat_set

DCP channel 0 status register

ch0stat_clr

DCP channel 0 status register

ch0stat_tog

DCP channel 0 status register

ch0opts_set

DCP channel 0 options register

ch0opts_clr

DCP channel 0 options register

ch0opts_tog

DCP channel 0 options register

ch1cmdptr

DCP channel 1 command pointer address register

ch1sema

DCP channel 1 semaphore register

ch1stat

DCP channel 1 status register

ch1stat_set

DCP channel 1 status register

ch1stat_clr

DCP channel 1 status register

ch1stat_tog

DCP channel 1 status register

ch1opts

DCP channel 1 options register

ch1opts_set

DCP channel 1 options register

ch1opts_clr

DCP channel 1 options register

ch1opts_tog

DCP channel 1 options register

ch2cmdptr

DCP channel 2 command pointer address register

ch2sema

DCP channel 2 semaphore register

ch2stat

DCP channel 2 status register

ch2stat_set

DCP channel 2 status register

ch2stat_clr

DCP channel 2 status register

ch2stat_tog

DCP channel 2 status register

ch2opts

DCP channel 2 options register

ch2opts_set

DCP channel 2 options register

ch2opts_clr

DCP channel 2 options register

ch2opts_tog

DCP channel 2 options register

ch3cmdptr

DCP channel 3 command pointer address register

ch3sema

DCP channel 3 semaphore register

ch3stat

DCP channel 3 status register

ch3stat_set

DCP channel 3 status register

ch3stat_clr

DCP channel 3 status register

ch3stat_tog

DCP channel 3 status register

ch3opts

DCP channel 3 options register

ch3opts_set

DCP channel 3 options register

ch3opts_clr

DCP channel 3 options register

ch3opts_tog

DCP channel 3 options register

channelctrl

DCP channel control register

channelctrl_clr

DCP channel control register

channelctrl_set

DCP channel control register

channelctrl_tog

DCP channel control register

context

DCP context buffer pointer

ctrl

DCP control register 0

ctrl_clr

DCP control register 0

ctrl_set

DCP control register 0

ctrl_tog

DCP control register 0

dbgdata

DCP debug data register

dbgselect

DCP debug select register

key

DCP key index

keydata

DCP key data

packet0

DCP work packet 0 status register

packet1

DCP work packet 1 status register

packet2

DCP work packet 2 status register

packet3

DCP work packet 3 status register

packet4

DCP work packet 4 status register

packet5

DCP work packet 5 status register

packet6

DCP work packet 6 status register

pagetable

DCP page table register

stat

DCP status register

stat_clr

DCP status register

stat_set

DCP status register

stat_tog

DCP status register

version

DCP version register

Structs

R

Register/field reader

Reg

This structure provides volatile access to register

RegisterBlock

Register block

W

Register writer

Enums

Variant

Used if enumerated values cover not the whole range

Traits

Readable

This trait shows that register has read method

ResetValue

Reset value of the register

Writable

This trait shows that register has write, write_with_zero and reset method

Type Definitions

CAPABILITY0

DCP capability 0 register

CAPABILITY1

DCP capability 1 register

CH0SEMA

DCP channel 0 semaphore register

CH0STAT

DCP channel 0 status register

CH0OPTS

DCP channel 0 options register

CH0CMDPTR

DCP channel 0 command pointer address register

CH0STAT_SET

DCP channel 0 status register

CH0STAT_CLR

DCP channel 0 status register

CH0STAT_TOG

DCP channel 0 status register

CH0OPTS_SET

DCP channel 0 options register

CH0OPTS_CLR

DCP channel 0 options register

CH0OPTS_TOG

DCP channel 0 options register

CH1CMDPTR

DCP channel 1 command pointer address register

CH1SEMA

DCP channel 1 semaphore register

CH1STAT

DCP channel 1 status register

CH1STAT_SET

DCP channel 1 status register

CH1STAT_CLR

DCP channel 1 status register

CH1STAT_TOG

DCP channel 1 status register

CH1OPTS

DCP channel 1 options register

CH1OPTS_SET

DCP channel 1 options register

CH1OPTS_CLR

DCP channel 1 options register

CH1OPTS_TOG

DCP channel 1 options register

CH2CMDPTR

DCP channel 2 command pointer address register

CH2SEMA

DCP channel 2 semaphore register

CH2STAT

DCP channel 2 status register

CH2STAT_SET

DCP channel 2 status register

CH2STAT_CLR

DCP channel 2 status register

CH2STAT_TOG

DCP channel 2 status register

CH2OPTS

DCP channel 2 options register

CH2OPTS_SET

DCP channel 2 options register

CH2OPTS_CLR

DCP channel 2 options register

CH2OPTS_TOG

DCP channel 2 options register

CH3CMDPTR

DCP channel 3 command pointer address register

CH3SEMA

DCP channel 3 semaphore register

CH3STAT

DCP channel 3 status register

CH3STAT_SET

DCP channel 3 status register

CH3STAT_CLR

DCP channel 3 status register

CH3STAT_TOG

DCP channel 3 status register

CH3OPTS

DCP channel 3 options register

CH3OPTS_SET

DCP channel 3 options register

CH3OPTS_CLR

DCP channel 3 options register

CH3OPTS_TOG

DCP channel 3 options register

CHANNELCTRL

DCP channel control register

CHANNELCTRL_CLR

DCP channel control register

CHANNELCTRL_SET

DCP channel control register

CHANNELCTRL_TOG

DCP channel control register

CONTEXT

DCP context buffer pointer

CTRL

DCP control register 0

CTRL_CLR

DCP control register 0

CTRL_SET

DCP control register 0

CTRL_TOG

DCP control register 0

DBGDATA

DCP debug data register

DBGSELECT

DCP debug select register

KEY

DCP key index

KEYDATA

DCP key data

PACKET0

DCP work packet 0 status register

PACKET1

DCP work packet 1 status register

PACKET2

DCP work packet 2 status register

PACKET3

DCP work packet 3 status register

PACKET4

DCP work packet 4 status register

PACKET5

DCP work packet 5 status register

PACKET6

DCP work packet 6 status register

PAGETABLE

DCP page table register

STAT

DCP status register

STAT_CLR

DCP status register

STAT_SET

DCP status register

STAT_TOG

DCP status register

VERSION

DCP version register