Module imxrt1062_ccm::cscdr2

CCM Serial Clock Divider Register 2

Structs

LCDIF_PRED_W	Write proxy for field LCDIF_PRED
LCDIF_PRE_CLK_SEL_W	Write proxy for field LCDIF_PRE_CLK_SEL
LPI2C_CLK_SEL_W	Write proxy for field LPI2C_CLK_SEL
LPI2C_CLK_PODF_W	Write proxy for field LPI2C_CLK_PODF

Enums

LCDIF_PRED_A	Pre-divider for lcdif clock. Divider should be updated when output clock is gated.
LCDIF_PRE_CLK_SEL_A	Selector for lcdif root clock pre-multiplexer
LPI2C_CLK_SEL_A	Selector for the LPI2C clock multiplexor
LPI2C_CLK_PODF_A	Divider for lpi2c clock podf. Divider should be updated when output clock is gated. The input clock to this divider should be lower than 300Mhz, the predivider can be used to achieve this.

Type Definitions

LCDIF_PRED_R	Reader of field LCDIF_PRED
LCDIF_PRE_CLK_SEL_R	Reader of field LCDIF_PRE_CLK_SEL
LPI2C_CLK_SEL_R	Reader of field LPI2C_CLK_SEL
LPI2C_CLK_PODF_R	Reader of field LPI2C_CLK_PODF
R	Reader of register CSCDR2
W	Writer for register CSCDR2