[−][src]Module gd32vf103_pac::timer1
General-purpose-timers
Modules
car | Counter auto reload register |
ch0cv | Channel 0 capture/compare value register |
ch1cv | Channel 1 capture/compare value register |
ch2cv | Channel 2 capture/compare value register |
ch3cv | Channel 3 capture/compare value register |
chctl0_input | Channel control register 0 (input mode) |
chctl0_output | Channel control register 0 (output mode) |
chctl1_output | Channel control register 1 (output mode) |
chctl1_input | Channel control register 1 (input mode) |
chctl2 | Channel control register 2 |
cnt | Counter register |
ctl0 | control register 0 |
ctl1 | control register 1 |
dmacfg | DMA configuration register |
dmainten | DMA/Interrupt enable register |
dmatb | DMA transfer buffer register |
intf | interrupt flag register |
psc | Prescaler register |
smcfg | slave mode control register |
swevg | event generation register |
Structs
RegisterBlock | Register block |
Type Definitions
CAR | Counter auto reload register |
CH0CV | Channel 0 capture/compare value register |
CH1CV | Channel 1 capture/compare value register |
CH2CV | Channel 2 capture/compare value register |
CH3CV | Channel 3 capture/compare value register |
CHCTL0_INPUT | Channel control register 0 (input mode) |
CHCTL0_OUTPUT | Channel control register 0 (output mode) |
CHCTL1_OUTPUT | Channel control register 1 (output mode) |
CHCTL1_INPUT | Channel control register 1 (input mode) |
CHCTL2 | Channel control register 2 |
CNT | Counter register |
CTL0 | control register 0 |
CTL1 | control register 1 |
DMACFG | DMA configuration register |
DMAINTEN | DMA/Interrupt enable register |
DMATB | DMA transfer buffer register |
INTF | interrupt flag register |
PSC | Prescaler register |
SMCFG | slave mode control register |
SWEVG | event generation register |