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#[doc = "Reader of register DMA_IN_LINK"] pub type R = crate::R<u32, super::DMA_IN_LINK>; #[doc = "Writer for register DMA_IN_LINK"] pub type W = crate::W<u32, super::DMA_IN_LINK>; #[doc = "Register DMA_IN_LINK `reset()`'s with value 0"] impl crate::ResetValue for super::DMA_IN_LINK { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } #[doc = "Reader of field `INLINK_PARK`"] pub type INLINK_PARK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `INLINK_PARK`"] pub struct INLINK_PARK_W<'a> { w: &'a mut W, } impl<'a> INLINK_PARK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } #[doc = "Reader of field `INLINK_RESTART`"] pub type INLINK_RESTART_R = crate::R<bool, bool>; #[doc = "Write proxy for field `INLINK_RESTART`"] pub struct INLINK_RESTART_W<'a> { w: &'a mut W, } impl<'a> INLINK_RESTART_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } #[doc = "Reader of field `INLINK_START`"] pub type INLINK_START_R = crate::R<bool, bool>; #[doc = "Write proxy for field `INLINK_START`"] pub struct INLINK_START_W<'a> { w: &'a mut W, } impl<'a> INLINK_START_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); self.w } } #[doc = "Reader of field `INLINK_STOP`"] pub type INLINK_STOP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `INLINK_STOP`"] pub struct INLINK_STOP_W<'a> { w: &'a mut W, } impl<'a> INLINK_STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); self.w } } #[doc = "Reader of field `INLINK_AUTO_RET`"] pub type INLINK_AUTO_RET_R = crate::R<bool, bool>; #[doc = "Write proxy for field `INLINK_AUTO_RET`"] pub struct INLINK_AUTO_RET_W<'a> { w: &'a mut W, } impl<'a> INLINK_AUTO_RET_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); self.w } } #[doc = "Reader of field `INLINK_ADDR`"] pub type INLINK_ADDR_R = crate::R<u32, u32>; #[doc = "Write proxy for field `INLINK_ADDR`"] pub struct INLINK_ADDR_W<'a> { w: &'a mut W, } impl<'a> INLINK_ADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x000f_ffff) | ((value as u32) & 0x000f_ffff); self.w } } impl R { #[doc = "Bit 31"] #[inline(always)] pub fn inlink_park(&self) -> INLINK_PARK_R { INLINK_PARK_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] pub fn inlink_restart(&self) -> INLINK_RESTART_R { INLINK_RESTART_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] pub fn inlink_start(&self) -> INLINK_START_R { INLINK_START_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] pub fn inlink_stop(&self) -> INLINK_STOP_R { INLINK_STOP_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] pub fn inlink_auto_ret(&self) -> INLINK_AUTO_RET_R { INLINK_AUTO_RET_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 0:19"] #[inline(always)] pub fn inlink_addr(&self) -> INLINK_ADDR_R { INLINK_ADDR_R::new((self.bits & 0x000f_ffff) as u32) } } impl W { #[doc = "Bit 31"] #[inline(always)] pub fn inlink_park(&mut self) -> INLINK_PARK_W { INLINK_PARK_W { w: self } } #[doc = "Bit 30"] #[inline(always)] pub fn inlink_restart(&mut self) -> INLINK_RESTART_W { INLINK_RESTART_W { w: self } } #[doc = "Bit 29"] #[inline(always)] pub fn inlink_start(&mut self) -> INLINK_START_W { INLINK_START_W { w: self } } #[doc = "Bit 28"] #[inline(always)] pub fn inlink_stop(&mut self) -> INLINK_STOP_W { INLINK_STOP_W { w: self } } #[doc = "Bit 20"] #[inline(always)] pub fn inlink_auto_ret(&mut self) -> INLINK_AUTO_RET_W { INLINK_AUTO_RET_W { w: self } } #[doc = "Bits 0:19"] #[inline(always)] pub fn inlink_addr(&mut self) -> INLINK_ADDR_W { INLINK_ADDR_W { w: self } } }