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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - DPORT_PRO_BOOT_REMAP_CTRL"]
    pub pro_boot_remap_ctrl: crate::Reg<pro_boot_remap_ctrl::PRO_BOOT_REMAP_CTRL_SPEC>,
    #[doc = "0x04 - DPORT_APP_BOOT_REMAP_CTRL"]
    pub app_boot_remap_ctrl: crate::Reg<app_boot_remap_ctrl::APP_BOOT_REMAP_CTRL_SPEC>,
    #[doc = "0x08 - DPORT_ACCESS_CHECK"]
    pub access_check: crate::Reg<access_check::ACCESS_CHECK_SPEC>,
    #[doc = "0x0c - DPORT_PRO_DPORT_APB_MASK0"]
    pub pro_dport_apb_mask0: crate::Reg<pro_dport_apb_mask0::PRO_DPORT_APB_MASK0_SPEC>,
    #[doc = "0x10 - DPORT_PRO_DPORT_APB_MASK1"]
    pub pro_dport_apb_mask1: crate::Reg<pro_dport_apb_mask1::PRO_DPORT_APB_MASK1_SPEC>,
    #[doc = "0x14 - DPORT_APP_DPORT_APB_MASK0"]
    pub app_dport_apb_mask0: crate::Reg<app_dport_apb_mask0::APP_DPORT_APB_MASK0_SPEC>,
    #[doc = "0x18 - DPORT_APP_DPORT_APB_MASK1"]
    pub app_dport_apb_mask1: crate::Reg<app_dport_apb_mask1::APP_DPORT_APB_MASK1_SPEC>,
    #[doc = "0x1c - DPORT_PERI_CLK_EN"]
    pub peri_clk_en: crate::Reg<peri_clk_en::PERI_CLK_EN_SPEC>,
    #[doc = "0x20 - DPORT_PERI_RST_EN"]
    pub peri_rst_en: crate::Reg<peri_rst_en::PERI_RST_EN_SPEC>,
    #[doc = "0x24 - DPORT_WIFI_BB_CFG"]
    pub wifi_bb_cfg: crate::Reg<wifi_bb_cfg::WIFI_BB_CFG_SPEC>,
    #[doc = "0x28 - DPORT_WIFI_BB_CFG_2"]
    pub wifi_bb_cfg_2: crate::Reg<wifi_bb_cfg_2::WIFI_BB_CFG_2_SPEC>,
    #[doc = "0x2c - DPORT_APPCPU_CTRL_A"]
    pub appcpu_ctrl_a: crate::Reg<appcpu_ctrl_a::APPCPU_CTRL_A_SPEC>,
    #[doc = "0x30 - DPORT_APPCPU_CTRL_B"]
    pub appcpu_ctrl_b: crate::Reg<appcpu_ctrl_b::APPCPU_CTRL_B_SPEC>,
    #[doc = "0x34 - DPORT_APPCPU_CTRL_C"]
    pub appcpu_ctrl_c: crate::Reg<appcpu_ctrl_c::APPCPU_CTRL_C_SPEC>,
    #[doc = "0x38 - DPORT_APPCPU_CTRL_D"]
    pub appcpu_ctrl_d: crate::Reg<appcpu_ctrl_d::APPCPU_CTRL_D_SPEC>,
    #[doc = "0x3c - DPORT_CPU_PER_CONF"]
    pub cpu_per_conf: crate::Reg<cpu_per_conf::CPU_PER_CONF_SPEC>,
    #[doc = "0x40 - DPORT_PRO_CACHE_CTRL"]
    pub pro_cache_ctrl: crate::Reg<pro_cache_ctrl::PRO_CACHE_CTRL_SPEC>,
    #[doc = "0x44 - DPORT_PRO_CACHE_CTRL1"]
    pub pro_cache_ctrl1: crate::Reg<pro_cache_ctrl1::PRO_CACHE_CTRL1_SPEC>,
    #[doc = "0x48 - DPORT_PRO_CACHE_LOCK_0_ADDR"]
    pub pro_cache_lock_0_addr: crate::Reg<pro_cache_lock_0_addr::PRO_CACHE_LOCK_0_ADDR_SPEC>,
    #[doc = "0x4c - DPORT_PRO_CACHE_LOCK_1_ADDR"]
    pub pro_cache_lock_1_addr: crate::Reg<pro_cache_lock_1_addr::PRO_CACHE_LOCK_1_ADDR_SPEC>,
    #[doc = "0x50 - DPORT_PRO_CACHE_LOCK_2_ADDR"]
    pub pro_cache_lock_2_addr: crate::Reg<pro_cache_lock_2_addr::PRO_CACHE_LOCK_2_ADDR_SPEC>,
    #[doc = "0x54 - DPORT_PRO_CACHE_LOCK_3_ADDR"]
    pub pro_cache_lock_3_addr: crate::Reg<pro_cache_lock_3_addr::PRO_CACHE_LOCK_3_ADDR_SPEC>,
    #[doc = "0x58 - DPORT_APP_CACHE_CTRL"]
    pub app_cache_ctrl: crate::Reg<app_cache_ctrl::APP_CACHE_CTRL_SPEC>,
    #[doc = "0x5c - DPORT_APP_CACHE_CTRL1"]
    pub app_cache_ctrl1: crate::Reg<app_cache_ctrl1::APP_CACHE_CTRL1_SPEC>,
    #[doc = "0x60 - DPORT_APP_CACHE_LOCK_0_ADDR"]
    pub app_cache_lock_0_addr: crate::Reg<app_cache_lock_0_addr::APP_CACHE_LOCK_0_ADDR_SPEC>,
    #[doc = "0x64 - DPORT_APP_CACHE_LOCK_1_ADDR"]
    pub app_cache_lock_1_addr: crate::Reg<app_cache_lock_1_addr::APP_CACHE_LOCK_1_ADDR_SPEC>,
    #[doc = "0x68 - DPORT_APP_CACHE_LOCK_2_ADDR"]
    pub app_cache_lock_2_addr: crate::Reg<app_cache_lock_2_addr::APP_CACHE_LOCK_2_ADDR_SPEC>,
    #[doc = "0x6c - DPORT_APP_CACHE_LOCK_3_ADDR"]
    pub app_cache_lock_3_addr: crate::Reg<app_cache_lock_3_addr::APP_CACHE_LOCK_3_ADDR_SPEC>,
    #[doc = "0x70 - DPORT_TRACEMEM_MUX_MODE"]
    pub tracemem_mux_mode: crate::Reg<tracemem_mux_mode::TRACEMEM_MUX_MODE_SPEC>,
    #[doc = "0x74 - DPORT_PRO_TRACEMEM_ENA"]
    pub pro_tracemem_ena: crate::Reg<pro_tracemem_ena::PRO_TRACEMEM_ENA_SPEC>,
    #[doc = "0x78 - DPORT_APP_TRACEMEM_ENA"]
    pub app_tracemem_ena: crate::Reg<app_tracemem_ena::APP_TRACEMEM_ENA_SPEC>,
    #[doc = "0x7c - DPORT_CACHE_MUX_MODE"]
    pub cache_mux_mode: crate::Reg<cache_mux_mode::CACHE_MUX_MODE_SPEC>,
    #[doc = "0x80 - DPORT_IMMU_PAGE_MODE"]
    pub immu_page_mode: crate::Reg<immu_page_mode::IMMU_PAGE_MODE_SPEC>,
    #[doc = "0x84 - DPORT_DMMU_PAGE_MODE"]
    pub dmmu_page_mode: crate::Reg<dmmu_page_mode::DMMU_PAGE_MODE_SPEC>,
    #[doc = "0x88 - DPORT_ROM_MPU_ENA"]
    pub rom_mpu_ena: crate::Reg<rom_mpu_ena::ROM_MPU_ENA_SPEC>,
    #[doc = "0x8c - DPORT_MEM_PD_MASK"]
    pub mem_pd_mask: crate::Reg<mem_pd_mask::MEM_PD_MASK_SPEC>,
    #[doc = "0x90 - DPORT_ROM_PD_CTRL"]
    pub rom_pd_ctrl: crate::Reg<rom_pd_ctrl::ROM_PD_CTRL_SPEC>,
    #[doc = "0x94 - DPORT_ROM_FO_CTRL"]
    pub rom_fo_ctrl: crate::Reg<rom_fo_ctrl::ROM_FO_CTRL_SPEC>,
    #[doc = "0x98 - DPORT_SRAM_PD_CTRL_0"]
    pub sram_pd_ctrl_0: crate::Reg<sram_pd_ctrl_0::SRAM_PD_CTRL_0_SPEC>,
    #[doc = "0x9c - DPORT_SRAM_PD_CTRL_1"]
    pub sram_pd_ctrl_1: crate::Reg<sram_pd_ctrl_1::SRAM_PD_CTRL_1_SPEC>,
    #[doc = "0xa0 - DPORT_SRAM_FO_CTRL_0"]
    pub sram_fo_ctrl_0: crate::Reg<sram_fo_ctrl_0::SRAM_FO_CTRL_0_SPEC>,
    #[doc = "0xa4 - DPORT_SRAM_FO_CTRL_1"]
    pub sram_fo_ctrl_1: crate::Reg<sram_fo_ctrl_1::SRAM_FO_CTRL_1_SPEC>,
    #[doc = "0xa8 - DPORT_IRAM_DRAM_AHB_SEL"]
    pub iram_dram_ahb_sel: crate::Reg<iram_dram_ahb_sel::IRAM_DRAM_AHB_SEL_SPEC>,
    #[doc = "0xac - DPORT_TAG_FO_CTRL"]
    pub tag_fo_ctrl: crate::Reg<tag_fo_ctrl::TAG_FO_CTRL_SPEC>,
    #[doc = "0xb0 - DPORT_AHB_LITE_MASK"]
    pub ahb_lite_mask: crate::Reg<ahb_lite_mask::AHB_LITE_MASK_SPEC>,
    #[doc = "0xb4 - DPORT_AHB_MPU_TABLE_0"]
    pub ahb_mpu_table_0: crate::Reg<ahb_mpu_table_0::AHB_MPU_TABLE_0_SPEC>,
    #[doc = "0xb8 - DPORT_AHB_MPU_TABLE_1"]
    pub ahb_mpu_table_1: crate::Reg<ahb_mpu_table_1::AHB_MPU_TABLE_1_SPEC>,
    #[doc = "0xbc - DPORT_HOST_INF_SEL"]
    pub host_inf_sel: crate::Reg<host_inf_sel::HOST_INF_SEL_SPEC>,
    #[doc = "0xc0 - DPORT_PERIP_CLK_EN"]
    pub perip_clk_en: crate::Reg<perip_clk_en::PERIP_CLK_EN_SPEC>,
    #[doc = "0xc4 - DPORT_PERIP_RST_EN"]
    pub perip_rst_en: crate::Reg<perip_rst_en::PERIP_RST_EN_SPEC>,
    _reserved50: [u8; 4usize],
    #[doc = "0xcc - DPORT_WIFI_CLK_EN"]
    pub wifi_clk_en: crate::Reg<wifi_clk_en::WIFI_CLK_EN_SPEC>,
    #[doc = "0xd0 - DPORT_CORE_RST_EN"]
    pub core_rst_en: crate::Reg<core_rst_en::CORE_RST_EN_SPEC>,
    #[doc = "0xd4 - DPORT_BT_LPCK_DIV_INT"]
    pub bt_lpck_div_int: crate::Reg<bt_lpck_div_int::BT_LPCK_DIV_INT_SPEC>,
    #[doc = "0xd8 - DPORT_BT_LPCK_DIV_FRAC"]
    pub bt_lpck_div_frac: crate::Reg<bt_lpck_div_frac::BT_LPCK_DIV_FRAC_SPEC>,
    #[doc = "0xdc - DPORT_CPU_INTR_FROM_CPU_0"]
    pub cpu_intr_from_cpu_0: crate::Reg<cpu_intr_from_cpu_0::CPU_INTR_FROM_CPU_0_SPEC>,
    #[doc = "0xe0 - DPORT_CPU_INTR_FROM_CPU_1"]
    pub cpu_intr_from_cpu_1: crate::Reg<cpu_intr_from_cpu_1::CPU_INTR_FROM_CPU_1_SPEC>,
    #[doc = "0xe4 - DPORT_CPU_INTR_FROM_CPU_2"]
    pub cpu_intr_from_cpu_2: crate::Reg<cpu_intr_from_cpu_2::CPU_INTR_FROM_CPU_2_SPEC>,
    #[doc = "0xe8 - DPORT_CPU_INTR_FROM_CPU_3"]
    pub cpu_intr_from_cpu_3: crate::Reg<cpu_intr_from_cpu_3::CPU_INTR_FROM_CPU_3_SPEC>,
    #[doc = "0xec - DPORT_PRO_INTR_STATUS_0"]
    pub pro_intr_status_0: crate::Reg<pro_intr_status_0::PRO_INTR_STATUS_0_SPEC>,
    #[doc = "0xf0 - DPORT_PRO_INTR_STATUS_1"]
    pub pro_intr_status_1: crate::Reg<pro_intr_status_1::PRO_INTR_STATUS_1_SPEC>,
    #[doc = "0xf4 - DPORT_PRO_INTR_STATUS_2"]
    pub pro_intr_status_2: crate::Reg<pro_intr_status_2::PRO_INTR_STATUS_2_SPEC>,
    #[doc = "0xf8 - DPORT_APP_INTR_STATUS_0"]
    pub app_intr_status_0: crate::Reg<app_intr_status_0::APP_INTR_STATUS_0_SPEC>,
    #[doc = "0xfc - DPORT_APP_INTR_STATUS_1"]
    pub app_intr_status_1: crate::Reg<app_intr_status_1::APP_INTR_STATUS_1_SPEC>,
    #[doc = "0x100 - DPORT_APP_INTR_STATUS_2"]
    pub app_intr_status_2: crate::Reg<app_intr_status_2::APP_INTR_STATUS_2_SPEC>,
    #[doc = "0x104 - DPORT_PRO_MAC_INTR_MAP"]
    pub pro_mac_intr_map: crate::Reg<pro_mac_intr_map::PRO_MAC_INTR_MAP_SPEC>,
    #[doc = "0x108 - DPORT_PRO_MAC_NMI_MAP"]
    pub pro_mac_nmi_map: crate::Reg<pro_mac_nmi_map::PRO_MAC_NMI_MAP_SPEC>,
    #[doc = "0x10c - DPORT_PRO_BB_INT_MAP"]
    pub pro_bb_int_map: crate::Reg<pro_bb_int_map::PRO_BB_INT_MAP_SPEC>,
    #[doc = "0x110 - DPORT_PRO_BT_MAC_INT_MAP"]
    pub pro_bt_mac_int_map: crate::Reg<pro_bt_mac_int_map::PRO_BT_MAC_INT_MAP_SPEC>,
    #[doc = "0x114 - DPORT_PRO_BT_BB_INT_MAP"]
    pub pro_bt_bb_int_map: crate::Reg<pro_bt_bb_int_map::PRO_BT_BB_INT_MAP_SPEC>,
    #[doc = "0x118 - DPORT_PRO_BT_BB_NMI_MAP"]
    pub pro_bt_bb_nmi_map: crate::Reg<pro_bt_bb_nmi_map::PRO_BT_BB_NMI_MAP_SPEC>,
    #[doc = "0x11c - DPORT_PRO_RWBT_IRQ_MAP"]
    pub pro_rwbt_irq_map: crate::Reg<pro_rwbt_irq_map::PRO_RWBT_IRQ_MAP_SPEC>,
    #[doc = "0x120 - DPORT_PRO_RWBLE_IRQ_MAP"]
    pub pro_rwble_irq_map: crate::Reg<pro_rwble_irq_map::PRO_RWBLE_IRQ_MAP_SPEC>,
    #[doc = "0x124 - DPORT_PRO_RWBT_NMI_MAP"]
    pub pro_rwbt_nmi_map: crate::Reg<pro_rwbt_nmi_map::PRO_RWBT_NMI_MAP_SPEC>,
    #[doc = "0x128 - DPORT_PRO_RWBLE_NMI_MAP"]
    pub pro_rwble_nmi_map: crate::Reg<pro_rwble_nmi_map::PRO_RWBLE_NMI_MAP_SPEC>,
    #[doc = "0x12c - DPORT_PRO_SLC0_INTR_MAP"]
    pub pro_slc0_intr_map: crate::Reg<pro_slc0_intr_map::PRO_SLC0_INTR_MAP_SPEC>,
    #[doc = "0x130 - DPORT_PRO_SLC1_INTR_MAP"]
    pub pro_slc1_intr_map: crate::Reg<pro_slc1_intr_map::PRO_SLC1_INTR_MAP_SPEC>,
    #[doc = "0x134 - DPORT_PRO_UHCI0_INTR_MAP"]
    pub pro_uhci0_intr_map: crate::Reg<pro_uhci0_intr_map::PRO_UHCI0_INTR_MAP_SPEC>,
    #[doc = "0x138 - DPORT_PRO_UHCI1_INTR_MAP"]
    pub pro_uhci1_intr_map: crate::Reg<pro_uhci1_intr_map::PRO_UHCI1_INTR_MAP_SPEC>,
    #[doc = "0x13c - DPORT_PRO_TG_T0_LEVEL_INT_MAP"]
    pub pro_tg_t0_level_int_map: crate::Reg<pro_tg_t0_level_int_map::PRO_TG_T0_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x140 - DPORT_PRO_TG_T1_LEVEL_INT_MAP"]
    pub pro_tg_t1_level_int_map: crate::Reg<pro_tg_t1_level_int_map::PRO_TG_T1_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x144 - DPORT_PRO_TG_WDT_LEVEL_INT_MAP"]
    pub pro_tg_wdt_level_int_map:
        crate::Reg<pro_tg_wdt_level_int_map::PRO_TG_WDT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x148 - DPORT_PRO_TG_LACT_LEVEL_INT_MAP"]
    pub pro_tg_lact_level_int_map:
        crate::Reg<pro_tg_lact_level_int_map::PRO_TG_LACT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x14c - DPORT_PRO_TG1_T0_LEVEL_INT_MAP"]
    pub pro_tg1_t0_level_int_map:
        crate::Reg<pro_tg1_t0_level_int_map::PRO_TG1_T0_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x150 - DPORT_PRO_TG1_T1_LEVEL_INT_MAP"]
    pub pro_tg1_t1_level_int_map:
        crate::Reg<pro_tg1_t1_level_int_map::PRO_TG1_T1_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x154 - DPORT_PRO_TG1_WDT_LEVEL_INT_MAP"]
    pub pro_tg1_wdt_level_int_map:
        crate::Reg<pro_tg1_wdt_level_int_map::PRO_TG1_WDT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x158 - DPORT_PRO_TG1_LACT_LEVEL_INT_MAP"]
    pub pro_tg1_lact_level_int_map:
        crate::Reg<pro_tg1_lact_level_int_map::PRO_TG1_LACT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x15c - DPORT_PRO_GPIO_INTERRUPT_MAP"]
    pub pro_gpio_interrupt_map: crate::Reg<pro_gpio_interrupt_map::PRO_GPIO_INTERRUPT_MAP_SPEC>,
    #[doc = "0x160 - DPORT_PRO_GPIO_INTERRUPT_NMI_MAP"]
    pub pro_gpio_interrupt_nmi_map:
        crate::Reg<pro_gpio_interrupt_nmi_map::PRO_GPIO_INTERRUPT_NMI_MAP_SPEC>,
    #[doc = "0x164 - DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP"]
    pub pro_cpu_intr_from_cpu_0_map:
        crate::Reg<pro_cpu_intr_from_cpu_0_map::PRO_CPU_INTR_FROM_CPU_0_MAP_SPEC>,
    #[doc = "0x168 - DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP"]
    pub pro_cpu_intr_from_cpu_1_map:
        crate::Reg<pro_cpu_intr_from_cpu_1_map::PRO_CPU_INTR_FROM_CPU_1_MAP_SPEC>,
    #[doc = "0x16c - DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP"]
    pub pro_cpu_intr_from_cpu_2_map:
        crate::Reg<pro_cpu_intr_from_cpu_2_map::PRO_CPU_INTR_FROM_CPU_2_MAP_SPEC>,
    #[doc = "0x170 - DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP"]
    pub pro_cpu_intr_from_cpu_3_map:
        crate::Reg<pro_cpu_intr_from_cpu_3_map::PRO_CPU_INTR_FROM_CPU_3_MAP_SPEC>,
    #[doc = "0x174 - DPORT_PRO_SPI_INTR_0_MAP"]
    pub pro_spi_intr_0_map: crate::Reg<pro_spi_intr_0_map::PRO_SPI_INTR_0_MAP_SPEC>,
    #[doc = "0x178 - DPORT_PRO_SPI_INTR_1_MAP"]
    pub pro_spi_intr_1_map: crate::Reg<pro_spi_intr_1_map::PRO_SPI_INTR_1_MAP_SPEC>,
    #[doc = "0x17c - DPORT_PRO_SPI_INTR_2_MAP"]
    pub pro_spi_intr_2_map: crate::Reg<pro_spi_intr_2_map::PRO_SPI_INTR_2_MAP_SPEC>,
    #[doc = "0x180 - DPORT_PRO_SPI_INTR_3_MAP"]
    pub pro_spi_intr_3_map: crate::Reg<pro_spi_intr_3_map::PRO_SPI_INTR_3_MAP_SPEC>,
    #[doc = "0x184 - DPORT_PRO_I2S0_INT_MAP"]
    pub pro_i2s0_int_map: crate::Reg<pro_i2s0_int_map::PRO_I2S0_INT_MAP_SPEC>,
    #[doc = "0x188 - DPORT_PRO_I2S1_INT_MAP"]
    pub pro_i2s1_int_map: crate::Reg<pro_i2s1_int_map::PRO_I2S1_INT_MAP_SPEC>,
    #[doc = "0x18c - DPORT_PRO_UART_INTR_MAP"]
    pub pro_uart_intr_map: crate::Reg<pro_uart_intr_map::PRO_UART_INTR_MAP_SPEC>,
    #[doc = "0x190 - DPORT_PRO_UART1_INTR_MAP"]
    pub pro_uart1_intr_map: crate::Reg<pro_uart1_intr_map::PRO_UART1_INTR_MAP_SPEC>,
    #[doc = "0x194 - DPORT_PRO_UART2_INTR_MAP"]
    pub pro_uart2_intr_map: crate::Reg<pro_uart2_intr_map::PRO_UART2_INTR_MAP_SPEC>,
    #[doc = "0x198 - DPORT_PRO_SDIO_HOST_INTERRUPT_MAP"]
    pub pro_sdio_host_interrupt_map:
        crate::Reg<pro_sdio_host_interrupt_map::PRO_SDIO_HOST_INTERRUPT_MAP_SPEC>,
    #[doc = "0x19c - DPORT_PRO_EMAC_INT_MAP"]
    pub pro_emac_int_map: crate::Reg<pro_emac_int_map::PRO_EMAC_INT_MAP_SPEC>,
    #[doc = "0x1a0 - DPORT_PRO_PWM0_INTR_MAP"]
    pub pro_pwm0_intr_map: crate::Reg<pro_pwm0_intr_map::PRO_PWM0_INTR_MAP_SPEC>,
    #[doc = "0x1a4 - DPORT_PRO_PWM1_INTR_MAP"]
    pub pro_pwm1_intr_map: crate::Reg<pro_pwm1_intr_map::PRO_PWM1_INTR_MAP_SPEC>,
    #[doc = "0x1a8 - DPORT_PRO_PWM2_INTR_MAP"]
    pub pro_pwm2_intr_map: crate::Reg<pro_pwm2_intr_map::PRO_PWM2_INTR_MAP_SPEC>,
    #[doc = "0x1ac - DPORT_PRO_PWM3_INTR_MAP"]
    pub pro_pwm3_intr_map: crate::Reg<pro_pwm3_intr_map::PRO_PWM3_INTR_MAP_SPEC>,
    #[doc = "0x1b0 - DPORT_PRO_LEDC_INT_MAP"]
    pub pro_ledc_int_map: crate::Reg<pro_ledc_int_map::PRO_LEDC_INT_MAP_SPEC>,
    #[doc = "0x1b4 - DPORT_PRO_EFUSE_INT_MAP"]
    pub pro_efuse_int_map: crate::Reg<pro_efuse_int_map::PRO_EFUSE_INT_MAP_SPEC>,
    #[doc = "0x1b8 - DPORT_PRO_CAN_INT_MAP"]
    pub pro_can_int_map: crate::Reg<pro_can_int_map::PRO_CAN_INT_MAP_SPEC>,
    #[doc = "0x1bc - DPORT_PRO_RTC_CORE_INTR_MAP"]
    pub pro_rtc_core_intr_map: crate::Reg<pro_rtc_core_intr_map::PRO_RTC_CORE_INTR_MAP_SPEC>,
    #[doc = "0x1c0 - DPORT_PRO_RMT_INTR_MAP"]
    pub pro_rmt_intr_map: crate::Reg<pro_rmt_intr_map::PRO_RMT_INTR_MAP_SPEC>,
    #[doc = "0x1c4 - DPORT_PRO_PCNT_INTR_MAP"]
    pub pro_pcnt_intr_map: crate::Reg<pro_pcnt_intr_map::PRO_PCNT_INTR_MAP_SPEC>,
    #[doc = "0x1c8 - DPORT_PRO_I2C_EXT0_INTR_MAP"]
    pub pro_i2c_ext0_intr_map: crate::Reg<pro_i2c_ext0_intr_map::PRO_I2C_EXT0_INTR_MAP_SPEC>,
    #[doc = "0x1cc - DPORT_PRO_I2C_EXT1_INTR_MAP"]
    pub pro_i2c_ext1_intr_map: crate::Reg<pro_i2c_ext1_intr_map::PRO_I2C_EXT1_INTR_MAP_SPEC>,
    #[doc = "0x1d0 - DPORT_PRO_RSA_INTR_MAP"]
    pub pro_rsa_intr_map: crate::Reg<pro_rsa_intr_map::PRO_RSA_INTR_MAP_SPEC>,
    #[doc = "0x1d4 - DPORT_PRO_SPI1_DMA_INT_MAP"]
    pub pro_spi1_dma_int_map: crate::Reg<pro_spi1_dma_int_map::PRO_SPI1_DMA_INT_MAP_SPEC>,
    #[doc = "0x1d8 - DPORT_PRO_SPI2_DMA_INT_MAP"]
    pub pro_spi2_dma_int_map: crate::Reg<pro_spi2_dma_int_map::PRO_SPI2_DMA_INT_MAP_SPEC>,
    #[doc = "0x1dc - DPORT_PRO_SPI3_DMA_INT_MAP"]
    pub pro_spi3_dma_int_map: crate::Reg<pro_spi3_dma_int_map::PRO_SPI3_DMA_INT_MAP_SPEC>,
    #[doc = "0x1e0 - DPORT_PRO_WDG_INT_MAP"]
    pub pro_wdg_int_map: crate::Reg<pro_wdg_int_map::PRO_WDG_INT_MAP_SPEC>,
    #[doc = "0x1e4 - DPORT_PRO_TIMER_INT1_MAP"]
    pub pro_timer_int1_map: crate::Reg<pro_timer_int1_map::PRO_TIMER_INT1_MAP_SPEC>,
    #[doc = "0x1e8 - DPORT_PRO_TIMER_INT2_MAP"]
    pub pro_timer_int2_map: crate::Reg<pro_timer_int2_map::PRO_TIMER_INT2_MAP_SPEC>,
    #[doc = "0x1ec - DPORT_PRO_TG_T0_EDGE_INT_MAP"]
    pub pro_tg_t0_edge_int_map: crate::Reg<pro_tg_t0_edge_int_map::PRO_TG_T0_EDGE_INT_MAP_SPEC>,
    #[doc = "0x1f0 - DPORT_PRO_TG_T1_EDGE_INT_MAP"]
    pub pro_tg_t1_edge_int_map: crate::Reg<pro_tg_t1_edge_int_map::PRO_TG_T1_EDGE_INT_MAP_SPEC>,
    #[doc = "0x1f4 - DPORT_PRO_TG_WDT_EDGE_INT_MAP"]
    pub pro_tg_wdt_edge_int_map: crate::Reg<pro_tg_wdt_edge_int_map::PRO_TG_WDT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x1f8 - DPORT_PRO_TG_LACT_EDGE_INT_MAP"]
    pub pro_tg_lact_edge_int_map:
        crate::Reg<pro_tg_lact_edge_int_map::PRO_TG_LACT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x1fc - DPORT_PRO_TG1_T0_EDGE_INT_MAP"]
    pub pro_tg1_t0_edge_int_map: crate::Reg<pro_tg1_t0_edge_int_map::PRO_TG1_T0_EDGE_INT_MAP_SPEC>,
    #[doc = "0x200 - DPORT_PRO_TG1_T1_EDGE_INT_MAP"]
    pub pro_tg1_t1_edge_int_map: crate::Reg<pro_tg1_t1_edge_int_map::PRO_TG1_T1_EDGE_INT_MAP_SPEC>,
    #[doc = "0x204 - DPORT_PRO_TG1_WDT_EDGE_INT_MAP"]
    pub pro_tg1_wdt_edge_int_map:
        crate::Reg<pro_tg1_wdt_edge_int_map::PRO_TG1_WDT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x208 - DPORT_PRO_TG1_LACT_EDGE_INT_MAP"]
    pub pro_tg1_lact_edge_int_map:
        crate::Reg<pro_tg1_lact_edge_int_map::PRO_TG1_LACT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x20c - DPORT_PRO_MMU_IA_INT_MAP"]
    pub pro_mmu_ia_int_map: crate::Reg<pro_mmu_ia_int_map::PRO_MMU_IA_INT_MAP_SPEC>,
    #[doc = "0x210 - DPORT_PRO_MPU_IA_INT_MAP"]
    pub pro_mpu_ia_int_map: crate::Reg<pro_mpu_ia_int_map::PRO_MPU_IA_INT_MAP_SPEC>,
    #[doc = "0x214 - DPORT_PRO_CACHE_IA_INT_MAP"]
    pub pro_cache_ia_int_map: crate::Reg<pro_cache_ia_int_map::PRO_CACHE_IA_INT_MAP_SPEC>,
    #[doc = "0x218 - DPORT_APP_MAC_INTR_MAP"]
    pub app_mac_intr_map: crate::Reg<app_mac_intr_map::APP_MAC_INTR_MAP_SPEC>,
    #[doc = "0x21c - DPORT_APP_MAC_NMI_MAP"]
    pub app_mac_nmi_map: crate::Reg<app_mac_nmi_map::APP_MAC_NMI_MAP_SPEC>,
    #[doc = "0x220 - DPORT_APP_BB_INT_MAP"]
    pub app_bb_int_map: crate::Reg<app_bb_int_map::APP_BB_INT_MAP_SPEC>,
    #[doc = "0x224 - DPORT_APP_BT_MAC_INT_MAP"]
    pub app_bt_mac_int_map: crate::Reg<app_bt_mac_int_map::APP_BT_MAC_INT_MAP_SPEC>,
    #[doc = "0x228 - DPORT_APP_BT_BB_INT_MAP"]
    pub app_bt_bb_int_map: crate::Reg<app_bt_bb_int_map::APP_BT_BB_INT_MAP_SPEC>,
    #[doc = "0x22c - DPORT_APP_BT_BB_NMI_MAP"]
    pub app_bt_bb_nmi_map: crate::Reg<app_bt_bb_nmi_map::APP_BT_BB_NMI_MAP_SPEC>,
    #[doc = "0x230 - DPORT_APP_RWBT_IRQ_MAP"]
    pub app_rwbt_irq_map: crate::Reg<app_rwbt_irq_map::APP_RWBT_IRQ_MAP_SPEC>,
    #[doc = "0x234 - DPORT_APP_RWBLE_IRQ_MAP"]
    pub app_rwble_irq_map: crate::Reg<app_rwble_irq_map::APP_RWBLE_IRQ_MAP_SPEC>,
    #[doc = "0x238 - DPORT_APP_RWBT_NMI_MAP"]
    pub app_rwbt_nmi_map: crate::Reg<app_rwbt_nmi_map::APP_RWBT_NMI_MAP_SPEC>,
    #[doc = "0x23c - DPORT_APP_RWBLE_NMI_MAP"]
    pub app_rwble_nmi_map: crate::Reg<app_rwble_nmi_map::APP_RWBLE_NMI_MAP_SPEC>,
    #[doc = "0x240 - DPORT_APP_SLC0_INTR_MAP"]
    pub app_slc0_intr_map: crate::Reg<app_slc0_intr_map::APP_SLC0_INTR_MAP_SPEC>,
    #[doc = "0x244 - DPORT_APP_SLC1_INTR_MAP"]
    pub app_slc1_intr_map: crate::Reg<app_slc1_intr_map::APP_SLC1_INTR_MAP_SPEC>,
    #[doc = "0x248 - DPORT_APP_UHCI0_INTR_MAP"]
    pub app_uhci0_intr_map: crate::Reg<app_uhci0_intr_map::APP_UHCI0_INTR_MAP_SPEC>,
    #[doc = "0x24c - DPORT_APP_UHCI1_INTR_MAP"]
    pub app_uhci1_intr_map: crate::Reg<app_uhci1_intr_map::APP_UHCI1_INTR_MAP_SPEC>,
    #[doc = "0x250 - DPORT_APP_TG_T0_LEVEL_INT_MAP"]
    pub app_tg_t0_level_int_map: crate::Reg<app_tg_t0_level_int_map::APP_TG_T0_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x254 - DPORT_APP_TG_T1_LEVEL_INT_MAP"]
    pub app_tg_t1_level_int_map: crate::Reg<app_tg_t1_level_int_map::APP_TG_T1_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x258 - DPORT_APP_TG_WDT_LEVEL_INT_MAP"]
    pub app_tg_wdt_level_int_map:
        crate::Reg<app_tg_wdt_level_int_map::APP_TG_WDT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x25c - DPORT_APP_TG_LACT_LEVEL_INT_MAP"]
    pub app_tg_lact_level_int_map:
        crate::Reg<app_tg_lact_level_int_map::APP_TG_LACT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x260 - DPORT_APP_TG1_T0_LEVEL_INT_MAP"]
    pub app_tg1_t0_level_int_map:
        crate::Reg<app_tg1_t0_level_int_map::APP_TG1_T0_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x264 - DPORT_APP_TG1_T1_LEVEL_INT_MAP"]
    pub app_tg1_t1_level_int_map:
        crate::Reg<app_tg1_t1_level_int_map::APP_TG1_T1_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x268 - DPORT_APP_TG1_WDT_LEVEL_INT_MAP"]
    pub app_tg1_wdt_level_int_map:
        crate::Reg<app_tg1_wdt_level_int_map::APP_TG1_WDT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x26c - DPORT_APP_TG1_LACT_LEVEL_INT_MAP"]
    pub app_tg1_lact_level_int_map:
        crate::Reg<app_tg1_lact_level_int_map::APP_TG1_LACT_LEVEL_INT_MAP_SPEC>,
    #[doc = "0x270 - DPORT_APP_GPIO_INTERRUPT_MAP"]
    pub app_gpio_interrupt_map: crate::Reg<app_gpio_interrupt_map::APP_GPIO_INTERRUPT_MAP_SPEC>,
    #[doc = "0x274 - DPORT_APP_GPIO_INTERRUPT_NMI_MAP"]
    pub app_gpio_interrupt_nmi_map:
        crate::Reg<app_gpio_interrupt_nmi_map::APP_GPIO_INTERRUPT_NMI_MAP_SPEC>,
    #[doc = "0x278 - DPORT_APP_CPU_INTR_FROM_CPU_0_MAP"]
    pub app_cpu_intr_from_cpu_0_map:
        crate::Reg<app_cpu_intr_from_cpu_0_map::APP_CPU_INTR_FROM_CPU_0_MAP_SPEC>,
    #[doc = "0x27c - DPORT_APP_CPU_INTR_FROM_CPU_1_MAP"]
    pub app_cpu_intr_from_cpu_1_map:
        crate::Reg<app_cpu_intr_from_cpu_1_map::APP_CPU_INTR_FROM_CPU_1_MAP_SPEC>,
    #[doc = "0x280 - DPORT_APP_CPU_INTR_FROM_CPU_2_MAP"]
    pub app_cpu_intr_from_cpu_2_map:
        crate::Reg<app_cpu_intr_from_cpu_2_map::APP_CPU_INTR_FROM_CPU_2_MAP_SPEC>,
    #[doc = "0x284 - DPORT_APP_CPU_INTR_FROM_CPU_3_MAP"]
    pub app_cpu_intr_from_cpu_3_map:
        crate::Reg<app_cpu_intr_from_cpu_3_map::APP_CPU_INTR_FROM_CPU_3_MAP_SPEC>,
    #[doc = "0x288 - DPORT_APP_SPI_INTR_0_MAP"]
    pub app_spi_intr_0_map: crate::Reg<app_spi_intr_0_map::APP_SPI_INTR_0_MAP_SPEC>,
    #[doc = "0x28c - DPORT_APP_SPI_INTR_1_MAP"]
    pub app_spi_intr_1_map: crate::Reg<app_spi_intr_1_map::APP_SPI_INTR_1_MAP_SPEC>,
    #[doc = "0x290 - DPORT_APP_SPI_INTR_2_MAP"]
    pub app_spi_intr_2_map: crate::Reg<app_spi_intr_2_map::APP_SPI_INTR_2_MAP_SPEC>,
    #[doc = "0x294 - DPORT_APP_SPI_INTR_3_MAP"]
    pub app_spi_intr_3_map: crate::Reg<app_spi_intr_3_map::APP_SPI_INTR_3_MAP_SPEC>,
    #[doc = "0x298 - DPORT_APP_I2S0_INT_MAP"]
    pub app_i2s0_int_map: crate::Reg<app_i2s0_int_map::APP_I2S0_INT_MAP_SPEC>,
    #[doc = "0x29c - DPORT_APP_I2S1_INT_MAP"]
    pub app_i2s1_int_map: crate::Reg<app_i2s1_int_map::APP_I2S1_INT_MAP_SPEC>,
    #[doc = "0x2a0 - DPORT_APP_UART_INTR_MAP"]
    pub app_uart_intr_map: crate::Reg<app_uart_intr_map::APP_UART_INTR_MAP_SPEC>,
    #[doc = "0x2a4 - DPORT_APP_UART1_INTR_MAP"]
    pub app_uart1_intr_map: crate::Reg<app_uart1_intr_map::APP_UART1_INTR_MAP_SPEC>,
    #[doc = "0x2a8 - DPORT_APP_UART2_INTR_MAP"]
    pub app_uart2_intr_map: crate::Reg<app_uart2_intr_map::APP_UART2_INTR_MAP_SPEC>,
    #[doc = "0x2ac - DPORT_APP_SDIO_HOST_INTERRUPT_MAP"]
    pub app_sdio_host_interrupt_map:
        crate::Reg<app_sdio_host_interrupt_map::APP_SDIO_HOST_INTERRUPT_MAP_SPEC>,
    #[doc = "0x2b0 - DPORT_APP_EMAC_INT_MAP"]
    pub app_emac_int_map: crate::Reg<app_emac_int_map::APP_EMAC_INT_MAP_SPEC>,
    #[doc = "0x2b4 - DPORT_APP_PWM0_INTR_MAP"]
    pub app_pwm0_intr_map: crate::Reg<app_pwm0_intr_map::APP_PWM0_INTR_MAP_SPEC>,
    #[doc = "0x2b8 - DPORT_APP_PWM1_INTR_MAP"]
    pub app_pwm1_intr_map: crate::Reg<app_pwm1_intr_map::APP_PWM1_INTR_MAP_SPEC>,
    #[doc = "0x2bc - DPORT_APP_PWM2_INTR_MAP"]
    pub app_pwm2_intr_map: crate::Reg<app_pwm2_intr_map::APP_PWM2_INTR_MAP_SPEC>,
    #[doc = "0x2c0 - DPORT_APP_PWM3_INTR_MAP"]
    pub app_pwm3_intr_map: crate::Reg<app_pwm3_intr_map::APP_PWM3_INTR_MAP_SPEC>,
    #[doc = "0x2c4 - DPORT_APP_LEDC_INT_MAP"]
    pub app_ledc_int_map: crate::Reg<app_ledc_int_map::APP_LEDC_INT_MAP_SPEC>,
    #[doc = "0x2c8 - DPORT_APP_EFUSE_INT_MAP"]
    pub app_efuse_int_map: crate::Reg<app_efuse_int_map::APP_EFUSE_INT_MAP_SPEC>,
    #[doc = "0x2cc - DPORT_APP_CAN_INT_MAP"]
    pub app_can_int_map: crate::Reg<app_can_int_map::APP_CAN_INT_MAP_SPEC>,
    #[doc = "0x2d0 - DPORT_APP_RTC_CORE_INTR_MAP"]
    pub app_rtc_core_intr_map: crate::Reg<app_rtc_core_intr_map::APP_RTC_CORE_INTR_MAP_SPEC>,
    #[doc = "0x2d4 - DPORT_APP_RMT_INTR_MAP"]
    pub app_rmt_intr_map: crate::Reg<app_rmt_intr_map::APP_RMT_INTR_MAP_SPEC>,
    #[doc = "0x2d8 - DPORT_APP_PCNT_INTR_MAP"]
    pub app_pcnt_intr_map: crate::Reg<app_pcnt_intr_map::APP_PCNT_INTR_MAP_SPEC>,
    #[doc = "0x2dc - DPORT_APP_I2C_EXT0_INTR_MAP"]
    pub app_i2c_ext0_intr_map: crate::Reg<app_i2c_ext0_intr_map::APP_I2C_EXT0_INTR_MAP_SPEC>,
    #[doc = "0x2e0 - DPORT_APP_I2C_EXT1_INTR_MAP"]
    pub app_i2c_ext1_intr_map: crate::Reg<app_i2c_ext1_intr_map::APP_I2C_EXT1_INTR_MAP_SPEC>,
    #[doc = "0x2e4 - DPORT_APP_RSA_INTR_MAP"]
    pub app_rsa_intr_map: crate::Reg<app_rsa_intr_map::APP_RSA_INTR_MAP_SPEC>,
    #[doc = "0x2e8 - DPORT_APP_SPI1_DMA_INT_MAP"]
    pub app_spi1_dma_int_map: crate::Reg<app_spi1_dma_int_map::APP_SPI1_DMA_INT_MAP_SPEC>,
    #[doc = "0x2ec - DPORT_APP_SPI2_DMA_INT_MAP"]
    pub app_spi2_dma_int_map: crate::Reg<app_spi2_dma_int_map::APP_SPI2_DMA_INT_MAP_SPEC>,
    #[doc = "0x2f0 - DPORT_APP_SPI3_DMA_INT_MAP"]
    pub app_spi3_dma_int_map: crate::Reg<app_spi3_dma_int_map::APP_SPI3_DMA_INT_MAP_SPEC>,
    #[doc = "0x2f4 - DPORT_APP_WDG_INT_MAP"]
    pub app_wdg_int_map: crate::Reg<app_wdg_int_map::APP_WDG_INT_MAP_SPEC>,
    #[doc = "0x2f8 - DPORT_APP_TIMER_INT1_MAP"]
    pub app_timer_int1_map: crate::Reg<app_timer_int1_map::APP_TIMER_INT1_MAP_SPEC>,
    #[doc = "0x2fc - DPORT_APP_TIMER_INT2_MAP"]
    pub app_timer_int2_map: crate::Reg<app_timer_int2_map::APP_TIMER_INT2_MAP_SPEC>,
    #[doc = "0x300 - DPORT_APP_TG_T0_EDGE_INT_MAP"]
    pub app_tg_t0_edge_int_map: crate::Reg<app_tg_t0_edge_int_map::APP_TG_T0_EDGE_INT_MAP_SPEC>,
    #[doc = "0x304 - DPORT_APP_TG_T1_EDGE_INT_MAP"]
    pub app_tg_t1_edge_int_map: crate::Reg<app_tg_t1_edge_int_map::APP_TG_T1_EDGE_INT_MAP_SPEC>,
    #[doc = "0x308 - DPORT_APP_TG_WDT_EDGE_INT_MAP"]
    pub app_tg_wdt_edge_int_map: crate::Reg<app_tg_wdt_edge_int_map::APP_TG_WDT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x30c - DPORT_APP_TG_LACT_EDGE_INT_MAP"]
    pub app_tg_lact_edge_int_map:
        crate::Reg<app_tg_lact_edge_int_map::APP_TG_LACT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x310 - DPORT_APP_TG1_T0_EDGE_INT_MAP"]
    pub app_tg1_t0_edge_int_map: crate::Reg<app_tg1_t0_edge_int_map::APP_TG1_T0_EDGE_INT_MAP_SPEC>,
    #[doc = "0x314 - DPORT_APP_TG1_T1_EDGE_INT_MAP"]
    pub app_tg1_t1_edge_int_map: crate::Reg<app_tg1_t1_edge_int_map::APP_TG1_T1_EDGE_INT_MAP_SPEC>,
    #[doc = "0x318 - DPORT_APP_TG1_WDT_EDGE_INT_MAP"]
    pub app_tg1_wdt_edge_int_map:
        crate::Reg<app_tg1_wdt_edge_int_map::APP_TG1_WDT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x31c - DPORT_APP_TG1_LACT_EDGE_INT_MAP"]
    pub app_tg1_lact_edge_int_map:
        crate::Reg<app_tg1_lact_edge_int_map::APP_TG1_LACT_EDGE_INT_MAP_SPEC>,
    #[doc = "0x320 - DPORT_APP_MMU_IA_INT_MAP"]
    pub app_mmu_ia_int_map: crate::Reg<app_mmu_ia_int_map::APP_MMU_IA_INT_MAP_SPEC>,
    #[doc = "0x324 - DPORT_APP_MPU_IA_INT_MAP"]
    pub app_mpu_ia_int_map: crate::Reg<app_mpu_ia_int_map::APP_MPU_IA_INT_MAP_SPEC>,
    #[doc = "0x328 - DPORT_APP_CACHE_IA_INT_MAP"]
    pub app_cache_ia_int_map: crate::Reg<app_cache_ia_int_map::APP_CACHE_IA_INT_MAP_SPEC>,
    #[doc = "0x32c - DPORT_AHBLITE_MPU_TABLE_UART"]
    pub ahblite_mpu_table_uart: crate::Reg<ahblite_mpu_table_uart::AHBLITE_MPU_TABLE_UART_SPEC>,
    #[doc = "0x330 - DPORT_AHBLITE_MPU_TABLE_SPI1"]
    pub ahblite_mpu_table_spi1: crate::Reg<ahblite_mpu_table_spi1::AHBLITE_MPU_TABLE_SPI1_SPEC>,
    #[doc = "0x334 - DPORT_AHBLITE_MPU_TABLE_SPI0"]
    pub ahblite_mpu_table_spi0: crate::Reg<ahblite_mpu_table_spi0::AHBLITE_MPU_TABLE_SPI0_SPEC>,
    #[doc = "0x338 - DPORT_AHBLITE_MPU_TABLE_GPIO"]
    pub ahblite_mpu_table_gpio: crate::Reg<ahblite_mpu_table_gpio::AHBLITE_MPU_TABLE_GPIO_SPEC>,
    #[doc = "0x33c - DPORT_AHBLITE_MPU_TABLE_FE2"]
    pub ahblite_mpu_table_fe2: crate::Reg<ahblite_mpu_table_fe2::AHBLITE_MPU_TABLE_FE2_SPEC>,
    #[doc = "0x340 - DPORT_AHBLITE_MPU_TABLE_FE"]
    pub ahblite_mpu_table_fe: crate::Reg<ahblite_mpu_table_fe::AHBLITE_MPU_TABLE_FE_SPEC>,
    #[doc = "0x344 - DPORT_AHBLITE_MPU_TABLE_TIMER"]
    pub ahblite_mpu_table_timer: crate::Reg<ahblite_mpu_table_timer::AHBLITE_MPU_TABLE_TIMER_SPEC>,
    #[doc = "0x348 - DPORT_AHBLITE_MPU_TABLE_RTC"]
    pub ahblite_mpu_table_rtc: crate::Reg<ahblite_mpu_table_rtc::AHBLITE_MPU_TABLE_RTC_SPEC>,
    #[doc = "0x34c - DPORT_AHBLITE_MPU_TABLE_IO_MUX"]
    pub ahblite_mpu_table_io_mux:
        crate::Reg<ahblite_mpu_table_io_mux::AHBLITE_MPU_TABLE_IO_MUX_SPEC>,
    #[doc = "0x350 - DPORT_AHBLITE_MPU_TABLE_WDG"]
    pub ahblite_mpu_table_wdg: crate::Reg<ahblite_mpu_table_wdg::AHBLITE_MPU_TABLE_WDG_SPEC>,
    #[doc = "0x354 - DPORT_AHBLITE_MPU_TABLE_HINF"]
    pub ahblite_mpu_table_hinf: crate::Reg<ahblite_mpu_table_hinf::AHBLITE_MPU_TABLE_HINF_SPEC>,
    #[doc = "0x358 - DPORT_AHBLITE_MPU_TABLE_UHCI1"]
    pub ahblite_mpu_table_uhci1: crate::Reg<ahblite_mpu_table_uhci1::AHBLITE_MPU_TABLE_UHCI1_SPEC>,
    #[doc = "0x35c - DPORT_AHBLITE_MPU_TABLE_MISC"]
    pub ahblite_mpu_table_misc: crate::Reg<ahblite_mpu_table_misc::AHBLITE_MPU_TABLE_MISC_SPEC>,
    #[doc = "0x360 - DPORT_AHBLITE_MPU_TABLE_I2C"]
    pub ahblite_mpu_table_i2c: crate::Reg<ahblite_mpu_table_i2c::AHBLITE_MPU_TABLE_I2C_SPEC>,
    #[doc = "0x364 - DPORT_AHBLITE_MPU_TABLE_I2S0"]
    pub ahblite_mpu_table_i2s0: crate::Reg<ahblite_mpu_table_i2s0::AHBLITE_MPU_TABLE_I2S0_SPEC>,
    #[doc = "0x368 - DPORT_AHBLITE_MPU_TABLE_UART1"]
    pub ahblite_mpu_table_uart1: crate::Reg<ahblite_mpu_table_uart1::AHBLITE_MPU_TABLE_UART1_SPEC>,
    #[doc = "0x36c - DPORT_AHBLITE_MPU_TABLE_BT"]
    pub ahblite_mpu_table_bt: crate::Reg<ahblite_mpu_table_bt::AHBLITE_MPU_TABLE_BT_SPEC>,
    #[doc = "0x370 - DPORT_AHBLITE_MPU_TABLE_BT_BUFFER"]
    pub ahblite_mpu_table_bt_buffer:
        crate::Reg<ahblite_mpu_table_bt_buffer::AHBLITE_MPU_TABLE_BT_BUFFER_SPEC>,
    #[doc = "0x374 - DPORT_AHBLITE_MPU_TABLE_I2C_EXT0"]
    pub ahblite_mpu_table_i2c_ext0:
        crate::Reg<ahblite_mpu_table_i2c_ext0::AHBLITE_MPU_TABLE_I2C_EXT0_SPEC>,
    #[doc = "0x378 - DPORT_AHBLITE_MPU_TABLE_UHCI0"]
    pub ahblite_mpu_table_uhci0: crate::Reg<ahblite_mpu_table_uhci0::AHBLITE_MPU_TABLE_UHCI0_SPEC>,
    #[doc = "0x37c - DPORT_AHBLITE_MPU_TABLE_SLCHOST"]
    pub ahblite_mpu_table_slchost:
        crate::Reg<ahblite_mpu_table_slchost::AHBLITE_MPU_TABLE_SLCHOST_SPEC>,
    #[doc = "0x380 - DPORT_AHBLITE_MPU_TABLE_RMT"]
    pub ahblite_mpu_table_rmt: crate::Reg<ahblite_mpu_table_rmt::AHBLITE_MPU_TABLE_RMT_SPEC>,
    #[doc = "0x384 - DPORT_AHBLITE_MPU_TABLE_PCNT"]
    pub ahblite_mpu_table_pcnt: crate::Reg<ahblite_mpu_table_pcnt::AHBLITE_MPU_TABLE_PCNT_SPEC>,
    #[doc = "0x388 - DPORT_AHBLITE_MPU_TABLE_SLC"]
    pub ahblite_mpu_table_slc: crate::Reg<ahblite_mpu_table_slc::AHBLITE_MPU_TABLE_SLC_SPEC>,
    #[doc = "0x38c - DPORT_AHBLITE_MPU_TABLE_LEDC"]
    pub ahblite_mpu_table_ledc: crate::Reg<ahblite_mpu_table_ledc::AHBLITE_MPU_TABLE_LEDC_SPEC>,
    #[doc = "0x390 - DPORT_AHBLITE_MPU_TABLE_EFUSE"]
    pub ahblite_mpu_table_efuse: crate::Reg<ahblite_mpu_table_efuse::AHBLITE_MPU_TABLE_EFUSE_SPEC>,
    #[doc = "0x394 - DPORT_AHBLITE_MPU_TABLE_SPI_ENCRYPT"]
    pub ahblite_mpu_table_spi_encrypt:
        crate::Reg<ahblite_mpu_table_spi_encrypt::AHBLITE_MPU_TABLE_SPI_ENCRYPT_SPEC>,
    #[doc = "0x398 - DPORT_AHBLITE_MPU_TABLE_BB"]
    pub ahblite_mpu_table_bb: crate::Reg<ahblite_mpu_table_bb::AHBLITE_MPU_TABLE_BB_SPEC>,
    #[doc = "0x39c - DPORT_AHBLITE_MPU_TABLE_PWM0"]
    pub ahblite_mpu_table_pwm0: crate::Reg<ahblite_mpu_table_pwm0::AHBLITE_MPU_TABLE_PWM0_SPEC>,
    #[doc = "0x3a0 - DPORT_AHBLITE_MPU_TABLE_TIMERGROUP"]
    pub ahblite_mpu_table_timergroup:
        crate::Reg<ahblite_mpu_table_timergroup::AHBLITE_MPU_TABLE_TIMERGROUP_SPEC>,
    #[doc = "0x3a4 - DPORT_AHBLITE_MPU_TABLE_TIMERGROUP1"]
    pub ahblite_mpu_table_timergroup1:
        crate::Reg<ahblite_mpu_table_timergroup1::AHBLITE_MPU_TABLE_TIMERGROUP1_SPEC>,
    #[doc = "0x3a8 - DPORT_AHBLITE_MPU_TABLE_SPI2"]
    pub ahblite_mpu_table_spi2: crate::Reg<ahblite_mpu_table_spi2::AHBLITE_MPU_TABLE_SPI2_SPEC>,
    #[doc = "0x3ac - DPORT_AHBLITE_MPU_TABLE_SPI3"]
    pub ahblite_mpu_table_spi3: crate::Reg<ahblite_mpu_table_spi3::AHBLITE_MPU_TABLE_SPI3_SPEC>,
    #[doc = "0x3b0 - DPORT_AHBLITE_MPU_TABLE_APB_CTRL"]
    pub ahblite_mpu_table_apb_ctrl:
        crate::Reg<ahblite_mpu_table_apb_ctrl::AHBLITE_MPU_TABLE_APB_CTRL_SPEC>,
    #[doc = "0x3b4 - DPORT_AHBLITE_MPU_TABLE_I2C_EXT1"]
    pub ahblite_mpu_table_i2c_ext1:
        crate::Reg<ahblite_mpu_table_i2c_ext1::AHBLITE_MPU_TABLE_I2C_EXT1_SPEC>,
    #[doc = "0x3b8 - DPORT_AHBLITE_MPU_TABLE_SDIO_HOST"]
    pub ahblite_mpu_table_sdio_host:
        crate::Reg<ahblite_mpu_table_sdio_host::AHBLITE_MPU_TABLE_SDIO_HOST_SPEC>,
    #[doc = "0x3bc - DPORT_AHBLITE_MPU_TABLE_EMAC"]
    pub ahblite_mpu_table_emac: crate::Reg<ahblite_mpu_table_emac::AHBLITE_MPU_TABLE_EMAC_SPEC>,
    #[doc = "0x3c0 - DPORT_AHBLITE_MPU_TABLE_CAN"]
    pub ahblite_mpu_table_can: crate::Reg<ahblite_mpu_table_can::AHBLITE_MPU_TABLE_CAN_SPEC>,
    #[doc = "0x3c4 - DPORT_AHBLITE_MPU_TABLE_PWM1"]
    pub ahblite_mpu_table_pwm1: crate::Reg<ahblite_mpu_table_pwm1::AHBLITE_MPU_TABLE_PWM1_SPEC>,
    #[doc = "0x3c8 - DPORT_AHBLITE_MPU_TABLE_I2S1"]
    pub ahblite_mpu_table_i2s1: crate::Reg<ahblite_mpu_table_i2s1::AHBLITE_MPU_TABLE_I2S1_SPEC>,
    #[doc = "0x3cc - DPORT_AHBLITE_MPU_TABLE_UART2"]
    pub ahblite_mpu_table_uart2: crate::Reg<ahblite_mpu_table_uart2::AHBLITE_MPU_TABLE_UART2_SPEC>,
    #[doc = "0x3d0 - DPORT_AHBLITE_MPU_TABLE_PWM2"]
    pub ahblite_mpu_table_pwm2: crate::Reg<ahblite_mpu_table_pwm2::AHBLITE_MPU_TABLE_PWM2_SPEC>,
    #[doc = "0x3d4 - DPORT_AHBLITE_MPU_TABLE_PWM3"]
    pub ahblite_mpu_table_pwm3: crate::Reg<ahblite_mpu_table_pwm3::AHBLITE_MPU_TABLE_PWM3_SPEC>,
    #[doc = "0x3d8 - DPORT_AHBLITE_MPU_TABLE_RWBT"]
    pub ahblite_mpu_table_rwbt: crate::Reg<ahblite_mpu_table_rwbt::AHBLITE_MPU_TABLE_RWBT_SPEC>,
    #[doc = "0x3dc - DPORT_AHBLITE_MPU_TABLE_BTMAC"]
    pub ahblite_mpu_table_btmac: crate::Reg<ahblite_mpu_table_btmac::AHBLITE_MPU_TABLE_BTMAC_SPEC>,
    #[doc = "0x3e0 - DPORT_AHBLITE_MPU_TABLE_WIFIMAC"]
    pub ahblite_mpu_table_wifimac:
        crate::Reg<ahblite_mpu_table_wifimac::AHBLITE_MPU_TABLE_WIFIMAC_SPEC>,
    #[doc = "0x3e4 - DPORT_AHBLITE_MPU_TABLE_PWR"]
    pub ahblite_mpu_table_pwr: crate::Reg<ahblite_mpu_table_pwr::AHBLITE_MPU_TABLE_PWR_SPEC>,
    #[doc = "0x3e8 - DPORT_MEM_ACCESS_DBUG0"]
    pub mem_access_dbug0: crate::Reg<mem_access_dbug0::MEM_ACCESS_DBUG0_SPEC>,
    #[doc = "0x3ec - DPORT_MEM_ACCESS_DBUG1"]
    pub mem_access_dbug1: crate::Reg<mem_access_dbug1::MEM_ACCESS_DBUG1_SPEC>,
    #[doc = "0x3f0 - DPORT_PRO_DCACHE_DBUG0"]
    pub pro_dcache_dbug0: crate::Reg<pro_dcache_dbug0::PRO_DCACHE_DBUG0_SPEC>,
    #[doc = "0x3f4 - DPORT_PRO_DCACHE_DBUG1"]
    pub pro_dcache_dbug1: crate::Reg<pro_dcache_dbug1::PRO_DCACHE_DBUG1_SPEC>,
    #[doc = "0x3f8 - DPORT_PRO_DCACHE_DBUG2"]
    pub pro_dcache_dbug2: crate::Reg<pro_dcache_dbug2::PRO_DCACHE_DBUG2_SPEC>,
    #[doc = "0x3fc - DPORT_PRO_DCACHE_DBUG3"]
    pub pro_dcache_dbug3: crate::Reg<pro_dcache_dbug3::PRO_DCACHE_DBUG3_SPEC>,
    #[doc = "0x400 - DPORT_PRO_DCACHE_DBUG4"]
    pub pro_dcache_dbug4: crate::Reg<pro_dcache_dbug4::PRO_DCACHE_DBUG4_SPEC>,
    #[doc = "0x404 - DPORT_PRO_DCACHE_DBUG5"]
    pub pro_dcache_dbug5: crate::Reg<pro_dcache_dbug5::PRO_DCACHE_DBUG5_SPEC>,
    #[doc = "0x408 - DPORT_PRO_DCACHE_DBUG6"]
    pub pro_dcache_dbug6: crate::Reg<pro_dcache_dbug6::PRO_DCACHE_DBUG6_SPEC>,
    #[doc = "0x40c - DPORT_PRO_DCACHE_DBUG7"]
    pub pro_dcache_dbug7: crate::Reg<pro_dcache_dbug7::PRO_DCACHE_DBUG7_SPEC>,
    #[doc = "0x410 - DPORT_PRO_DCACHE_DBUG8"]
    pub pro_dcache_dbug8: crate::Reg<pro_dcache_dbug8::PRO_DCACHE_DBUG8_SPEC>,
    #[doc = "0x414 - DPORT_PRO_DCACHE_DBUG9"]
    pub pro_dcache_dbug9: crate::Reg<pro_dcache_dbug9::PRO_DCACHE_DBUG9_SPEC>,
    #[doc = "0x418 - DPORT_APP_DCACHE_DBUG0"]
    pub app_dcache_dbug0: crate::Reg<app_dcache_dbug0::APP_DCACHE_DBUG0_SPEC>,
    #[doc = "0x41c - DPORT_APP_DCACHE_DBUG1"]
    pub app_dcache_dbug1: crate::Reg<app_dcache_dbug1::APP_DCACHE_DBUG1_SPEC>,
    #[doc = "0x420 - DPORT_APP_DCACHE_DBUG2"]
    pub app_dcache_dbug2: crate::Reg<app_dcache_dbug2::APP_DCACHE_DBUG2_SPEC>,
    #[doc = "0x424 - DPORT_APP_DCACHE_DBUG3"]
    pub app_dcache_dbug3: crate::Reg<app_dcache_dbug3::APP_DCACHE_DBUG3_SPEC>,
    #[doc = "0x428 - DPORT_APP_DCACHE_DBUG4"]
    pub app_dcache_dbug4: crate::Reg<app_dcache_dbug4::APP_DCACHE_DBUG4_SPEC>,
    #[doc = "0x42c - DPORT_APP_DCACHE_DBUG5"]
    pub app_dcache_dbug5: crate::Reg<app_dcache_dbug5::APP_DCACHE_DBUG5_SPEC>,
    #[doc = "0x430 - DPORT_APP_DCACHE_DBUG6"]
    pub app_dcache_dbug6: crate::Reg<app_dcache_dbug6::APP_DCACHE_DBUG6_SPEC>,
    #[doc = "0x434 - DPORT_APP_DCACHE_DBUG7"]
    pub app_dcache_dbug7: crate::Reg<app_dcache_dbug7::APP_DCACHE_DBUG7_SPEC>,
    #[doc = "0x438 - DPORT_APP_DCACHE_DBUG8"]
    pub app_dcache_dbug8: crate::Reg<app_dcache_dbug8::APP_DCACHE_DBUG8_SPEC>,
    #[doc = "0x43c - DPORT_APP_DCACHE_DBUG9"]
    pub app_dcache_dbug9: crate::Reg<app_dcache_dbug9::APP_DCACHE_DBUG9_SPEC>,
    #[doc = "0x440 - DPORT_PRO_CPU_RECORD_CTRL"]
    pub pro_cpu_record_ctrl: crate::Reg<pro_cpu_record_ctrl::PRO_CPU_RECORD_CTRL_SPEC>,
    #[doc = "0x444 - DPORT_PRO_CPU_RECORD_STATUS"]
    pub pro_cpu_record_status: crate::Reg<pro_cpu_record_status::PRO_CPU_RECORD_STATUS_SPEC>,
    #[doc = "0x448 - DPORT_PRO_CPU_RECORD_PID"]
    pub pro_cpu_record_pid: crate::Reg<pro_cpu_record_pid::PRO_CPU_RECORD_PID_SPEC>,
    #[doc = "0x44c - DPORT_PRO_CPU_RECORD_PDEBUGINST"]
    pub pro_cpu_record_pdebuginst:
        crate::Reg<pro_cpu_record_pdebuginst::PRO_CPU_RECORD_PDEBUGINST_SPEC>,
    #[doc = "0x450 - DPORT_PRO_CPU_RECORD_PDEBUGSTATUS"]
    pub pro_cpu_record_pdebugstatus:
        crate::Reg<pro_cpu_record_pdebugstatus::PRO_CPU_RECORD_PDEBUGSTATUS_SPEC>,
    #[doc = "0x454 - DPORT_PRO_CPU_RECORD_PDEBUGDATA"]
    pub pro_cpu_record_pdebugdata:
        crate::Reg<pro_cpu_record_pdebugdata::PRO_CPU_RECORD_PDEBUGDATA_SPEC>,
    #[doc = "0x458 - DPORT_PRO_CPU_RECORD_PDEBUGPC"]
    pub pro_cpu_record_pdebugpc: crate::Reg<pro_cpu_record_pdebugpc::PRO_CPU_RECORD_PDEBUGPC_SPEC>,
    #[doc = "0x45c - DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT"]
    pub pro_cpu_record_pdebugls0stat:
        crate::Reg<pro_cpu_record_pdebugls0stat::PRO_CPU_RECORD_PDEBUGLS0STAT_SPEC>,
    #[doc = "0x460 - DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR"]
    pub pro_cpu_record_pdebugls0addr:
        crate::Reg<pro_cpu_record_pdebugls0addr::PRO_CPU_RECORD_PDEBUGLS0ADDR_SPEC>,
    #[doc = "0x464 - DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA"]
    pub pro_cpu_record_pdebugls0data:
        crate::Reg<pro_cpu_record_pdebugls0data::PRO_CPU_RECORD_PDEBUGLS0DATA_SPEC>,
    #[doc = "0x468 - DPORT_APP_CPU_RECORD_CTRL"]
    pub app_cpu_record_ctrl: crate::Reg<app_cpu_record_ctrl::APP_CPU_RECORD_CTRL_SPEC>,
    #[doc = "0x46c - DPORT_APP_CPU_RECORD_STATUS"]
    pub app_cpu_record_status: crate::Reg<app_cpu_record_status::APP_CPU_RECORD_STATUS_SPEC>,
    #[doc = "0x470 - DPORT_APP_CPU_RECORD_PID"]
    pub app_cpu_record_pid: crate::Reg<app_cpu_record_pid::APP_CPU_RECORD_PID_SPEC>,
    #[doc = "0x474 - DPORT_APP_CPU_RECORD_PDEBUGINST"]
    pub app_cpu_record_pdebuginst:
        crate::Reg<app_cpu_record_pdebuginst::APP_CPU_RECORD_PDEBUGINST_SPEC>,
    #[doc = "0x478 - DPORT_APP_CPU_RECORD_PDEBUGSTATUS"]
    pub app_cpu_record_pdebugstatus:
        crate::Reg<app_cpu_record_pdebugstatus::APP_CPU_RECORD_PDEBUGSTATUS_SPEC>,
    #[doc = "0x47c - DPORT_APP_CPU_RECORD_PDEBUGDATA"]
    pub app_cpu_record_pdebugdata:
        crate::Reg<app_cpu_record_pdebugdata::APP_CPU_RECORD_PDEBUGDATA_SPEC>,
    #[doc = "0x480 - DPORT_APP_CPU_RECORD_PDEBUGPC"]
    pub app_cpu_record_pdebugpc: crate::Reg<app_cpu_record_pdebugpc::APP_CPU_RECORD_PDEBUGPC_SPEC>,
    #[doc = "0x484 - DPORT_APP_CPU_RECORD_PDEBUGLS0STAT"]
    pub app_cpu_record_pdebugls0stat:
        crate::Reg<app_cpu_record_pdebugls0stat::APP_CPU_RECORD_PDEBUGLS0STAT_SPEC>,
    #[doc = "0x488 - DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR"]
    pub app_cpu_record_pdebugls0addr:
        crate::Reg<app_cpu_record_pdebugls0addr::APP_CPU_RECORD_PDEBUGLS0ADDR_SPEC>,
    #[doc = "0x48c - DPORT_APP_CPU_RECORD_PDEBUGLS0DATA"]
    pub app_cpu_record_pdebugls0data:
        crate::Reg<app_cpu_record_pdebugls0data::APP_CPU_RECORD_PDEBUGLS0DATA_SPEC>,
    #[doc = "0x490 - DPORT_RSA_PD_CTRL"]
    pub rsa_pd_ctrl: crate::Reg<rsa_pd_ctrl::RSA_PD_CTRL_SPEC>,
    #[doc = "0x494 - DPORT_ROM_MPU_TABLE0"]
    pub rom_mpu_table0: crate::Reg<rom_mpu_table0::ROM_MPU_TABLE0_SPEC>,
    #[doc = "0x498 - DPORT_ROM_MPU_TABLE1"]
    pub rom_mpu_table1: crate::Reg<rom_mpu_table1::ROM_MPU_TABLE1_SPEC>,
    #[doc = "0x49c - DPORT_ROM_MPU_TABLE2"]
    pub rom_mpu_table2: crate::Reg<rom_mpu_table2::ROM_MPU_TABLE2_SPEC>,
    #[doc = "0x4a0 - DPORT_ROM_MPU_TABLE3"]
    pub rom_mpu_table3: crate::Reg<rom_mpu_table3::ROM_MPU_TABLE3_SPEC>,
    #[doc = "0x4a4 - DPORT_SHROM_MPU_TABLE0"]
    pub shrom_mpu_table0: crate::Reg<shrom_mpu_table0::SHROM_MPU_TABLE0_SPEC>,
    #[doc = "0x4a8 - DPORT_SHROM_MPU_TABLE1"]
    pub shrom_mpu_table1: crate::Reg<shrom_mpu_table1::SHROM_MPU_TABLE1_SPEC>,
    #[doc = "0x4ac - DPORT_SHROM_MPU_TABLE2"]
    pub shrom_mpu_table2: crate::Reg<shrom_mpu_table2::SHROM_MPU_TABLE2_SPEC>,
    #[doc = "0x4b0 - DPORT_SHROM_MPU_TABLE3"]
    pub shrom_mpu_table3: crate::Reg<shrom_mpu_table3::SHROM_MPU_TABLE3_SPEC>,
    #[doc = "0x4b4 - DPORT_SHROM_MPU_TABLE4"]
    pub shrom_mpu_table4: crate::Reg<shrom_mpu_table4::SHROM_MPU_TABLE4_SPEC>,
    #[doc = "0x4b8 - DPORT_SHROM_MPU_TABLE5"]
    pub shrom_mpu_table5: crate::Reg<shrom_mpu_table5::SHROM_MPU_TABLE5_SPEC>,
    #[doc = "0x4bc - DPORT_SHROM_MPU_TABLE6"]
    pub shrom_mpu_table6: crate::Reg<shrom_mpu_table6::SHROM_MPU_TABLE6_SPEC>,
    #[doc = "0x4c0 - DPORT_SHROM_MPU_TABLE7"]
    pub shrom_mpu_table7: crate::Reg<shrom_mpu_table7::SHROM_MPU_TABLE7_SPEC>,
    #[doc = "0x4c4 - DPORT_SHROM_MPU_TABLE8"]
    pub shrom_mpu_table8: crate::Reg<shrom_mpu_table8::SHROM_MPU_TABLE8_SPEC>,
    #[doc = "0x4c8 - DPORT_SHROM_MPU_TABLE9"]
    pub shrom_mpu_table9: crate::Reg<shrom_mpu_table9::SHROM_MPU_TABLE9_SPEC>,
    #[doc = "0x4cc - DPORT_SHROM_MPU_TABLE10"]
    pub shrom_mpu_table10: crate::Reg<shrom_mpu_table10::SHROM_MPU_TABLE10_SPEC>,
    #[doc = "0x4d0 - DPORT_SHROM_MPU_TABLE11"]
    pub shrom_mpu_table11: crate::Reg<shrom_mpu_table11::SHROM_MPU_TABLE11_SPEC>,
    #[doc = "0x4d4 - DPORT_SHROM_MPU_TABLE12"]
    pub shrom_mpu_table12: crate::Reg<shrom_mpu_table12::SHROM_MPU_TABLE12_SPEC>,
    #[doc = "0x4d8 - DPORT_SHROM_MPU_TABLE13"]
    pub shrom_mpu_table13: crate::Reg<shrom_mpu_table13::SHROM_MPU_TABLE13_SPEC>,
    #[doc = "0x4dc - DPORT_SHROM_MPU_TABLE14"]
    pub shrom_mpu_table14: crate::Reg<shrom_mpu_table14::SHROM_MPU_TABLE14_SPEC>,
    #[doc = "0x4e0 - DPORT_SHROM_MPU_TABLE15"]
    pub shrom_mpu_table15: crate::Reg<shrom_mpu_table15::SHROM_MPU_TABLE15_SPEC>,
    #[doc = "0x4e4 - DPORT_SHROM_MPU_TABLE16"]
    pub shrom_mpu_table16: crate::Reg<shrom_mpu_table16::SHROM_MPU_TABLE16_SPEC>,
    #[doc = "0x4e8 - DPORT_SHROM_MPU_TABLE17"]
    pub shrom_mpu_table17: crate::Reg<shrom_mpu_table17::SHROM_MPU_TABLE17_SPEC>,
    #[doc = "0x4ec - DPORT_SHROM_MPU_TABLE18"]
    pub shrom_mpu_table18: crate::Reg<shrom_mpu_table18::SHROM_MPU_TABLE18_SPEC>,
    #[doc = "0x4f0 - DPORT_SHROM_MPU_TABLE19"]
    pub shrom_mpu_table19: crate::Reg<shrom_mpu_table19::SHROM_MPU_TABLE19_SPEC>,
    #[doc = "0x4f4 - DPORT_SHROM_MPU_TABLE20"]
    pub shrom_mpu_table20: crate::Reg<shrom_mpu_table20::SHROM_MPU_TABLE20_SPEC>,
    #[doc = "0x4f8 - DPORT_SHROM_MPU_TABLE21"]
    pub shrom_mpu_table21: crate::Reg<shrom_mpu_table21::SHROM_MPU_TABLE21_SPEC>,
    #[doc = "0x4fc - DPORT_SHROM_MPU_TABLE22"]
    pub shrom_mpu_table22: crate::Reg<shrom_mpu_table22::SHROM_MPU_TABLE22_SPEC>,
    #[doc = "0x500 - DPORT_SHROM_MPU_TABLE23"]
    pub shrom_mpu_table23: crate::Reg<shrom_mpu_table23::SHROM_MPU_TABLE23_SPEC>,
    #[doc = "0x504 - DPORT_IMMU_TABLE0"]
    pub immu_table0: crate::Reg<immu_table0::IMMU_TABLE0_SPEC>,
    #[doc = "0x508 - DPORT_IMMU_TABLE1"]
    pub immu_table1: crate::Reg<immu_table1::IMMU_TABLE1_SPEC>,
    #[doc = "0x50c - DPORT_IMMU_TABLE2"]
    pub immu_table2: crate::Reg<immu_table2::IMMU_TABLE2_SPEC>,
    #[doc = "0x510 - DPORT_IMMU_TABLE3"]
    pub immu_table3: crate::Reg<immu_table3::IMMU_TABLE3_SPEC>,
    #[doc = "0x514 - DPORT_IMMU_TABLE4"]
    pub immu_table4: crate::Reg<immu_table4::IMMU_TABLE4_SPEC>,
    #[doc = "0x518 - DPORT_IMMU_TABLE5"]
    pub immu_table5: crate::Reg<immu_table5::IMMU_TABLE5_SPEC>,
    #[doc = "0x51c - DPORT_IMMU_TABLE6"]
    pub immu_table6: crate::Reg<immu_table6::IMMU_TABLE6_SPEC>,
    #[doc = "0x520 - DPORT_IMMU_TABLE7"]
    pub immu_table7: crate::Reg<immu_table7::IMMU_TABLE7_SPEC>,
    #[doc = "0x524 - DPORT_IMMU_TABLE8"]
    pub immu_table8: crate::Reg<immu_table8::IMMU_TABLE8_SPEC>,
    #[doc = "0x528 - DPORT_IMMU_TABLE9"]
    pub immu_table9: crate::Reg<immu_table9::IMMU_TABLE9_SPEC>,
    #[doc = "0x52c - DPORT_IMMU_TABLE10"]
    pub immu_table10: crate::Reg<immu_table10::IMMU_TABLE10_SPEC>,
    #[doc = "0x530 - DPORT_IMMU_TABLE11"]
    pub immu_table11: crate::Reg<immu_table11::IMMU_TABLE11_SPEC>,
    #[doc = "0x534 - DPORT_IMMU_TABLE12"]
    pub immu_table12: crate::Reg<immu_table12::IMMU_TABLE12_SPEC>,
    #[doc = "0x538 - DPORT_IMMU_TABLE13"]
    pub immu_table13: crate::Reg<immu_table13::IMMU_TABLE13_SPEC>,
    #[doc = "0x53c - DPORT_IMMU_TABLE14"]
    pub immu_table14: crate::Reg<immu_table14::IMMU_TABLE14_SPEC>,
    #[doc = "0x540 - DPORT_IMMU_TABLE15"]
    pub immu_table15: crate::Reg<immu_table15::IMMU_TABLE15_SPEC>,
    #[doc = "0x544 - DPORT_DMMU_TABLE0"]
    pub dmmu_table0: crate::Reg<dmmu_table0::DMMU_TABLE0_SPEC>,
    #[doc = "0x548 - DPORT_DMMU_TABLE1"]
    pub dmmu_table1: crate::Reg<dmmu_table1::DMMU_TABLE1_SPEC>,
    #[doc = "0x54c - DPORT_DMMU_TABLE2"]
    pub dmmu_table2: crate::Reg<dmmu_table2::DMMU_TABLE2_SPEC>,
    #[doc = "0x550 - DPORT_DMMU_TABLE3"]
    pub dmmu_table3: crate::Reg<dmmu_table3::DMMU_TABLE3_SPEC>,
    #[doc = "0x554 - DPORT_DMMU_TABLE4"]
    pub dmmu_table4: crate::Reg<dmmu_table4::DMMU_TABLE4_SPEC>,
    #[doc = "0x558 - DPORT_DMMU_TABLE5"]
    pub dmmu_table5: crate::Reg<dmmu_table5::DMMU_TABLE5_SPEC>,
    #[doc = "0x55c - DPORT_DMMU_TABLE6"]
    pub dmmu_table6: crate::Reg<dmmu_table6::DMMU_TABLE6_SPEC>,
    #[doc = "0x560 - DPORT_DMMU_TABLE7"]
    pub dmmu_table7: crate::Reg<dmmu_table7::DMMU_TABLE7_SPEC>,
    #[doc = "0x564 - DPORT_DMMU_TABLE8"]
    pub dmmu_table8: crate::Reg<dmmu_table8::DMMU_TABLE8_SPEC>,
    #[doc = "0x568 - DPORT_DMMU_TABLE9"]
    pub dmmu_table9: crate::Reg<dmmu_table9::DMMU_TABLE9_SPEC>,
    #[doc = "0x56c - DPORT_DMMU_TABLE10"]
    pub dmmu_table10: crate::Reg<dmmu_table10::DMMU_TABLE10_SPEC>,
    #[doc = "0x570 - DPORT_DMMU_TABLE11"]
    pub dmmu_table11: crate::Reg<dmmu_table11::DMMU_TABLE11_SPEC>,
    #[doc = "0x574 - DPORT_DMMU_TABLE12"]
    pub dmmu_table12: crate::Reg<dmmu_table12::DMMU_TABLE12_SPEC>,
    #[doc = "0x578 - DPORT_DMMU_TABLE13"]
    pub dmmu_table13: crate::Reg<dmmu_table13::DMMU_TABLE13_SPEC>,
    #[doc = "0x57c - DPORT_DMMU_TABLE14"]
    pub dmmu_table14: crate::Reg<dmmu_table14::DMMU_TABLE14_SPEC>,
    #[doc = "0x580 - DPORT_DMMU_TABLE15"]
    pub dmmu_table15: crate::Reg<dmmu_table15::DMMU_TABLE15_SPEC>,
    #[doc = "0x584 - DPORT_PRO_INTRUSION_CTRL"]
    pub pro_intrusion_ctrl: crate::Reg<pro_intrusion_ctrl::PRO_INTRUSION_CTRL_SPEC>,
    #[doc = "0x588 - DPORT_PRO_INTRUSION_STATUS"]
    pub pro_intrusion_status: crate::Reg<pro_intrusion_status::PRO_INTRUSION_STATUS_SPEC>,
    #[doc = "0x58c - DPORT_APP_INTRUSION_CTRL"]
    pub app_intrusion_ctrl: crate::Reg<app_intrusion_ctrl::APP_INTRUSION_CTRL_SPEC>,
    #[doc = "0x590 - DPORT_APP_INTRUSION_STATUS"]
    pub app_intrusion_status: crate::Reg<app_intrusion_status::APP_INTRUSION_STATUS_SPEC>,
    #[doc = "0x594 - DPORT_FRONT_END_MEM_PD"]
    pub front_end_mem_pd: crate::Reg<front_end_mem_pd::FRONT_END_MEM_PD_SPEC>,
    #[doc = "0x598 - DPORT_MMU_IA_INT_EN"]
    pub mmu_ia_int_en: crate::Reg<mmu_ia_int_en::MMU_IA_INT_EN_SPEC>,
    #[doc = "0x59c - DPORT_MPU_IA_INT_EN"]
    pub mpu_ia_int_en: crate::Reg<mpu_ia_int_en::MPU_IA_INT_EN_SPEC>,
    #[doc = "0x5a0 - DPORT_CACHE_IA_INT_EN"]
    pub cache_ia_int_en: crate::Reg<cache_ia_int_en::CACHE_IA_INT_EN_SPEC>,
    #[doc = "0x5a4 - DPORT_SECURE_BOOT_CTRL"]
    pub secure_boot_ctrl: crate::Reg<secure_boot_ctrl::SECURE_BOOT_CTRL_SPEC>,
    #[doc = "0x5a8 - DPORT_SPI_DMA_CHAN_SEL"]
    pub spi_dma_chan_sel: crate::Reg<spi_dma_chan_sel::SPI_DMA_CHAN_SEL_SPEC>,
    #[doc = "0x5ac - DPORT_PRO_VECBASE_CTRL"]
    pub pro_vecbase_ctrl: crate::Reg<pro_vecbase_ctrl::PRO_VECBASE_CTRL_SPEC>,
    #[doc = "0x5b0 - DPORT_PRO_VECBASE_SET"]
    pub pro_vecbase_set: crate::Reg<pro_vecbase_set::PRO_VECBASE_SET_SPEC>,
    #[doc = "0x5b4 - DPORT_APP_VECBASE_CTRL"]
    pub app_vecbase_ctrl: crate::Reg<app_vecbase_ctrl::APP_VECBASE_CTRL_SPEC>,
    #[doc = "0x5b8 - DPORT_APP_VECBASE_SET"]
    pub app_vecbase_set: crate::Reg<app_vecbase_set::APP_VECBASE_SET_SPEC>,
    _reserved366: [u8; 2624usize],
    #[doc = "0xffc - DPORT_DATE"]
    pub date: crate::Reg<date::DATE_SPEC>,
}
#[doc = "PRO_BOOT_REMAP_CTRL register accessor: an alias for `Reg<PRO_BOOT_REMAP_CTRL_SPEC>`"]
pub type PRO_BOOT_REMAP_CTRL = crate::Reg<pro_boot_remap_ctrl::PRO_BOOT_REMAP_CTRL_SPEC>;
#[doc = "DPORT_PRO_BOOT_REMAP_CTRL"]
pub mod pro_boot_remap_ctrl;
#[doc = "APP_BOOT_REMAP_CTRL register accessor: an alias for `Reg<APP_BOOT_REMAP_CTRL_SPEC>`"]
pub type APP_BOOT_REMAP_CTRL = crate::Reg<app_boot_remap_ctrl::APP_BOOT_REMAP_CTRL_SPEC>;
#[doc = "DPORT_APP_BOOT_REMAP_CTRL"]
pub mod app_boot_remap_ctrl;
#[doc = "ACCESS_CHECK register accessor: an alias for `Reg<ACCESS_CHECK_SPEC>`"]
pub type ACCESS_CHECK = crate::Reg<access_check::ACCESS_CHECK_SPEC>;
#[doc = "DPORT_ACCESS_CHECK"]
pub mod access_check;
#[doc = "PRO_DPORT_APB_MASK0 register accessor: an alias for `Reg<PRO_DPORT_APB_MASK0_SPEC>`"]
pub type PRO_DPORT_APB_MASK0 = crate::Reg<pro_dport_apb_mask0::PRO_DPORT_APB_MASK0_SPEC>;
#[doc = "DPORT_PRO_DPORT_APB_MASK0"]
pub mod pro_dport_apb_mask0;
#[doc = "PRO_DPORT_APB_MASK1 register accessor: an alias for `Reg<PRO_DPORT_APB_MASK1_SPEC>`"]
pub type PRO_DPORT_APB_MASK1 = crate::Reg<pro_dport_apb_mask1::PRO_DPORT_APB_MASK1_SPEC>;
#[doc = "DPORT_PRO_DPORT_APB_MASK1"]
pub mod pro_dport_apb_mask1;
#[doc = "APP_DPORT_APB_MASK0 register accessor: an alias for `Reg<APP_DPORT_APB_MASK0_SPEC>`"]
pub type APP_DPORT_APB_MASK0 = crate::Reg<app_dport_apb_mask0::APP_DPORT_APB_MASK0_SPEC>;
#[doc = "DPORT_APP_DPORT_APB_MASK0"]
pub mod app_dport_apb_mask0;
#[doc = "APP_DPORT_APB_MASK1 register accessor: an alias for `Reg<APP_DPORT_APB_MASK1_SPEC>`"]
pub type APP_DPORT_APB_MASK1 = crate::Reg<app_dport_apb_mask1::APP_DPORT_APB_MASK1_SPEC>;
#[doc = "DPORT_APP_DPORT_APB_MASK1"]
pub mod app_dport_apb_mask1;
#[doc = "PERI_CLK_EN register accessor: an alias for `Reg<PERI_CLK_EN_SPEC>`"]
pub type PERI_CLK_EN = crate::Reg<peri_clk_en::PERI_CLK_EN_SPEC>;
#[doc = "DPORT_PERI_CLK_EN"]
pub mod peri_clk_en;
#[doc = "PERI_RST_EN register accessor: an alias for `Reg<PERI_RST_EN_SPEC>`"]
pub type PERI_RST_EN = crate::Reg<peri_rst_en::PERI_RST_EN_SPEC>;
#[doc = "DPORT_PERI_RST_EN"]
pub mod peri_rst_en;
#[doc = "WIFI_BB_CFG register accessor: an alias for `Reg<WIFI_BB_CFG_SPEC>`"]
pub type WIFI_BB_CFG = crate::Reg<wifi_bb_cfg::WIFI_BB_CFG_SPEC>;
#[doc = "DPORT_WIFI_BB_CFG"]
pub mod wifi_bb_cfg;
#[doc = "WIFI_BB_CFG_2 register accessor: an alias for `Reg<WIFI_BB_CFG_2_SPEC>`"]
pub type WIFI_BB_CFG_2 = crate::Reg<wifi_bb_cfg_2::WIFI_BB_CFG_2_SPEC>;
#[doc = "DPORT_WIFI_BB_CFG_2"]
pub mod wifi_bb_cfg_2;
#[doc = "APPCPU_CTRL_A register accessor: an alias for `Reg<APPCPU_CTRL_A_SPEC>`"]
pub type APPCPU_CTRL_A = crate::Reg<appcpu_ctrl_a::APPCPU_CTRL_A_SPEC>;
#[doc = "DPORT_APPCPU_CTRL_A"]
pub mod appcpu_ctrl_a;
#[doc = "APPCPU_CTRL_B register accessor: an alias for `Reg<APPCPU_CTRL_B_SPEC>`"]
pub type APPCPU_CTRL_B = crate::Reg<appcpu_ctrl_b::APPCPU_CTRL_B_SPEC>;
#[doc = "DPORT_APPCPU_CTRL_B"]
pub mod appcpu_ctrl_b;
#[doc = "APPCPU_CTRL_C register accessor: an alias for `Reg<APPCPU_CTRL_C_SPEC>`"]
pub type APPCPU_CTRL_C = crate::Reg<appcpu_ctrl_c::APPCPU_CTRL_C_SPEC>;
#[doc = "DPORT_APPCPU_CTRL_C"]
pub mod appcpu_ctrl_c;
#[doc = "APPCPU_CTRL_D register accessor: an alias for `Reg<APPCPU_CTRL_D_SPEC>`"]
pub type APPCPU_CTRL_D = crate::Reg<appcpu_ctrl_d::APPCPU_CTRL_D_SPEC>;
#[doc = "DPORT_APPCPU_CTRL_D"]
pub mod appcpu_ctrl_d;
#[doc = "CPU_PER_CONF register accessor: an alias for `Reg<CPU_PER_CONF_SPEC>`"]
pub type CPU_PER_CONF = crate::Reg<cpu_per_conf::CPU_PER_CONF_SPEC>;
#[doc = "DPORT_CPU_PER_CONF"]
pub mod cpu_per_conf;
#[doc = "PRO_CACHE_CTRL register accessor: an alias for `Reg<PRO_CACHE_CTRL_SPEC>`"]
pub type PRO_CACHE_CTRL = crate::Reg<pro_cache_ctrl::PRO_CACHE_CTRL_SPEC>;
#[doc = "DPORT_PRO_CACHE_CTRL"]
pub mod pro_cache_ctrl;
#[doc = "PRO_CACHE_CTRL1 register accessor: an alias for `Reg<PRO_CACHE_CTRL1_SPEC>`"]
pub type PRO_CACHE_CTRL1 = crate::Reg<pro_cache_ctrl1::PRO_CACHE_CTRL1_SPEC>;
#[doc = "DPORT_PRO_CACHE_CTRL1"]
pub mod pro_cache_ctrl1;
#[doc = "PRO_CACHE_LOCK_0_ADDR register accessor: an alias for `Reg<PRO_CACHE_LOCK_0_ADDR_SPEC>`"]
pub type PRO_CACHE_LOCK_0_ADDR = crate::Reg<pro_cache_lock_0_addr::PRO_CACHE_LOCK_0_ADDR_SPEC>;
#[doc = "DPORT_PRO_CACHE_LOCK_0_ADDR"]
pub mod pro_cache_lock_0_addr;
#[doc = "PRO_CACHE_LOCK_1_ADDR register accessor: an alias for `Reg<PRO_CACHE_LOCK_1_ADDR_SPEC>`"]
pub type PRO_CACHE_LOCK_1_ADDR = crate::Reg<pro_cache_lock_1_addr::PRO_CACHE_LOCK_1_ADDR_SPEC>;
#[doc = "DPORT_PRO_CACHE_LOCK_1_ADDR"]
pub mod pro_cache_lock_1_addr;
#[doc = "PRO_CACHE_LOCK_2_ADDR register accessor: an alias for `Reg<PRO_CACHE_LOCK_2_ADDR_SPEC>`"]
pub type PRO_CACHE_LOCK_2_ADDR = crate::Reg<pro_cache_lock_2_addr::PRO_CACHE_LOCK_2_ADDR_SPEC>;
#[doc = "DPORT_PRO_CACHE_LOCK_2_ADDR"]
pub mod pro_cache_lock_2_addr;
#[doc = "PRO_CACHE_LOCK_3_ADDR register accessor: an alias for `Reg<PRO_CACHE_LOCK_3_ADDR_SPEC>`"]
pub type PRO_CACHE_LOCK_3_ADDR = crate::Reg<pro_cache_lock_3_addr::PRO_CACHE_LOCK_3_ADDR_SPEC>;
#[doc = "DPORT_PRO_CACHE_LOCK_3_ADDR"]
pub mod pro_cache_lock_3_addr;
#[doc = "APP_CACHE_CTRL register accessor: an alias for `Reg<APP_CACHE_CTRL_SPEC>`"]
pub type APP_CACHE_CTRL = crate::Reg<app_cache_ctrl::APP_CACHE_CTRL_SPEC>;
#[doc = "DPORT_APP_CACHE_CTRL"]
pub mod app_cache_ctrl;
#[doc = "APP_CACHE_CTRL1 register accessor: an alias for `Reg<APP_CACHE_CTRL1_SPEC>`"]
pub type APP_CACHE_CTRL1 = crate::Reg<app_cache_ctrl1::APP_CACHE_CTRL1_SPEC>;
#[doc = "DPORT_APP_CACHE_CTRL1"]
pub mod app_cache_ctrl1;
#[doc = "APP_CACHE_LOCK_0_ADDR register accessor: an alias for `Reg<APP_CACHE_LOCK_0_ADDR_SPEC>`"]
pub type APP_CACHE_LOCK_0_ADDR = crate::Reg<app_cache_lock_0_addr::APP_CACHE_LOCK_0_ADDR_SPEC>;
#[doc = "DPORT_APP_CACHE_LOCK_0_ADDR"]
pub mod app_cache_lock_0_addr;
#[doc = "APP_CACHE_LOCK_1_ADDR register accessor: an alias for `Reg<APP_CACHE_LOCK_1_ADDR_SPEC>`"]
pub type APP_CACHE_LOCK_1_ADDR = crate::Reg<app_cache_lock_1_addr::APP_CACHE_LOCK_1_ADDR_SPEC>;
#[doc = "DPORT_APP_CACHE_LOCK_1_ADDR"]
pub mod app_cache_lock_1_addr;
#[doc = "APP_CACHE_LOCK_2_ADDR register accessor: an alias for `Reg<APP_CACHE_LOCK_2_ADDR_SPEC>`"]
pub type APP_CACHE_LOCK_2_ADDR = crate::Reg<app_cache_lock_2_addr::APP_CACHE_LOCK_2_ADDR_SPEC>;
#[doc = "DPORT_APP_CACHE_LOCK_2_ADDR"]
pub mod app_cache_lock_2_addr;
#[doc = "APP_CACHE_LOCK_3_ADDR register accessor: an alias for `Reg<APP_CACHE_LOCK_3_ADDR_SPEC>`"]
pub type APP_CACHE_LOCK_3_ADDR = crate::Reg<app_cache_lock_3_addr::APP_CACHE_LOCK_3_ADDR_SPEC>;
#[doc = "DPORT_APP_CACHE_LOCK_3_ADDR"]
pub mod app_cache_lock_3_addr;
#[doc = "TRACEMEM_MUX_MODE register accessor: an alias for `Reg<TRACEMEM_MUX_MODE_SPEC>`"]
pub type TRACEMEM_MUX_MODE = crate::Reg<tracemem_mux_mode::TRACEMEM_MUX_MODE_SPEC>;
#[doc = "DPORT_TRACEMEM_MUX_MODE"]
pub mod tracemem_mux_mode;
#[doc = "PRO_TRACEMEM_ENA register accessor: an alias for `Reg<PRO_TRACEMEM_ENA_SPEC>`"]
pub type PRO_TRACEMEM_ENA = crate::Reg<pro_tracemem_ena::PRO_TRACEMEM_ENA_SPEC>;
#[doc = "DPORT_PRO_TRACEMEM_ENA"]
pub mod pro_tracemem_ena;
#[doc = "APP_TRACEMEM_ENA register accessor: an alias for `Reg<APP_TRACEMEM_ENA_SPEC>`"]
pub type APP_TRACEMEM_ENA = crate::Reg<app_tracemem_ena::APP_TRACEMEM_ENA_SPEC>;
#[doc = "DPORT_APP_TRACEMEM_ENA"]
pub mod app_tracemem_ena;
#[doc = "CACHE_MUX_MODE register accessor: an alias for `Reg<CACHE_MUX_MODE_SPEC>`"]
pub type CACHE_MUX_MODE = crate::Reg<cache_mux_mode::CACHE_MUX_MODE_SPEC>;
#[doc = "DPORT_CACHE_MUX_MODE"]
pub mod cache_mux_mode;
#[doc = "IMMU_PAGE_MODE register accessor: an alias for `Reg<IMMU_PAGE_MODE_SPEC>`"]
pub type IMMU_PAGE_MODE = crate::Reg<immu_page_mode::IMMU_PAGE_MODE_SPEC>;
#[doc = "DPORT_IMMU_PAGE_MODE"]
pub mod immu_page_mode;
#[doc = "DMMU_PAGE_MODE register accessor: an alias for `Reg<DMMU_PAGE_MODE_SPEC>`"]
pub type DMMU_PAGE_MODE = crate::Reg<dmmu_page_mode::DMMU_PAGE_MODE_SPEC>;
#[doc = "DPORT_DMMU_PAGE_MODE"]
pub mod dmmu_page_mode;
#[doc = "ROM_MPU_ENA register accessor: an alias for `Reg<ROM_MPU_ENA_SPEC>`"]
pub type ROM_MPU_ENA = crate::Reg<rom_mpu_ena::ROM_MPU_ENA_SPEC>;
#[doc = "DPORT_ROM_MPU_ENA"]
pub mod rom_mpu_ena;
#[doc = "MEM_PD_MASK register accessor: an alias for `Reg<MEM_PD_MASK_SPEC>`"]
pub type MEM_PD_MASK = crate::Reg<mem_pd_mask::MEM_PD_MASK_SPEC>;
#[doc = "DPORT_MEM_PD_MASK"]
pub mod mem_pd_mask;
#[doc = "ROM_PD_CTRL register accessor: an alias for `Reg<ROM_PD_CTRL_SPEC>`"]
pub type ROM_PD_CTRL = crate::Reg<rom_pd_ctrl::ROM_PD_CTRL_SPEC>;
#[doc = "DPORT_ROM_PD_CTRL"]
pub mod rom_pd_ctrl;
#[doc = "ROM_FO_CTRL register accessor: an alias for `Reg<ROM_FO_CTRL_SPEC>`"]
pub type ROM_FO_CTRL = crate::Reg<rom_fo_ctrl::ROM_FO_CTRL_SPEC>;
#[doc = "DPORT_ROM_FO_CTRL"]
pub mod rom_fo_ctrl;
#[doc = "SRAM_PD_CTRL_0 register accessor: an alias for `Reg<SRAM_PD_CTRL_0_SPEC>`"]
pub type SRAM_PD_CTRL_0 = crate::Reg<sram_pd_ctrl_0::SRAM_PD_CTRL_0_SPEC>;
#[doc = "DPORT_SRAM_PD_CTRL_0"]
pub mod sram_pd_ctrl_0;
#[doc = "SRAM_PD_CTRL_1 register accessor: an alias for `Reg<SRAM_PD_CTRL_1_SPEC>`"]
pub type SRAM_PD_CTRL_1 = crate::Reg<sram_pd_ctrl_1::SRAM_PD_CTRL_1_SPEC>;
#[doc = "DPORT_SRAM_PD_CTRL_1"]
pub mod sram_pd_ctrl_1;
#[doc = "SRAM_FO_CTRL_0 register accessor: an alias for `Reg<SRAM_FO_CTRL_0_SPEC>`"]
pub type SRAM_FO_CTRL_0 = crate::Reg<sram_fo_ctrl_0::SRAM_FO_CTRL_0_SPEC>;
#[doc = "DPORT_SRAM_FO_CTRL_0"]
pub mod sram_fo_ctrl_0;
#[doc = "SRAM_FO_CTRL_1 register accessor: an alias for `Reg<SRAM_FO_CTRL_1_SPEC>`"]
pub type SRAM_FO_CTRL_1 = crate::Reg<sram_fo_ctrl_1::SRAM_FO_CTRL_1_SPEC>;
#[doc = "DPORT_SRAM_FO_CTRL_1"]
pub mod sram_fo_ctrl_1;
#[doc = "IRAM_DRAM_AHB_SEL register accessor: an alias for `Reg<IRAM_DRAM_AHB_SEL_SPEC>`"]
pub type IRAM_DRAM_AHB_SEL = crate::Reg<iram_dram_ahb_sel::IRAM_DRAM_AHB_SEL_SPEC>;
#[doc = "DPORT_IRAM_DRAM_AHB_SEL"]
pub mod iram_dram_ahb_sel;
#[doc = "TAG_FO_CTRL register accessor: an alias for `Reg<TAG_FO_CTRL_SPEC>`"]
pub type TAG_FO_CTRL = crate::Reg<tag_fo_ctrl::TAG_FO_CTRL_SPEC>;
#[doc = "DPORT_TAG_FO_CTRL"]
pub mod tag_fo_ctrl;
#[doc = "AHB_LITE_MASK register accessor: an alias for `Reg<AHB_LITE_MASK_SPEC>`"]
pub type AHB_LITE_MASK = crate::Reg<ahb_lite_mask::AHB_LITE_MASK_SPEC>;
#[doc = "DPORT_AHB_LITE_MASK"]
pub mod ahb_lite_mask;
#[doc = "AHB_MPU_TABLE_0 register accessor: an alias for `Reg<AHB_MPU_TABLE_0_SPEC>`"]
pub type AHB_MPU_TABLE_0 = crate::Reg<ahb_mpu_table_0::AHB_MPU_TABLE_0_SPEC>;
#[doc = "DPORT_AHB_MPU_TABLE_0"]
pub mod ahb_mpu_table_0;
#[doc = "AHB_MPU_TABLE_1 register accessor: an alias for `Reg<AHB_MPU_TABLE_1_SPEC>`"]
pub type AHB_MPU_TABLE_1 = crate::Reg<ahb_mpu_table_1::AHB_MPU_TABLE_1_SPEC>;
#[doc = "DPORT_AHB_MPU_TABLE_1"]
pub mod ahb_mpu_table_1;
#[doc = "HOST_INF_SEL register accessor: an alias for `Reg<HOST_INF_SEL_SPEC>`"]
pub type HOST_INF_SEL = crate::Reg<host_inf_sel::HOST_INF_SEL_SPEC>;
#[doc = "DPORT_HOST_INF_SEL"]
pub mod host_inf_sel;
#[doc = "PERIP_CLK_EN register accessor: an alias for `Reg<PERIP_CLK_EN_SPEC>`"]
pub type PERIP_CLK_EN = crate::Reg<perip_clk_en::PERIP_CLK_EN_SPEC>;
#[doc = "DPORT_PERIP_CLK_EN"]
pub mod perip_clk_en;
#[doc = "PERIP_RST_EN register accessor: an alias for `Reg<PERIP_RST_EN_SPEC>`"]
pub type PERIP_RST_EN = crate::Reg<perip_rst_en::PERIP_RST_EN_SPEC>;
#[doc = "DPORT_PERIP_RST_EN"]
pub mod perip_rst_en;
#[doc = "WIFI_CLK_EN register accessor: an alias for `Reg<WIFI_CLK_EN_SPEC>`"]
pub type WIFI_CLK_EN = crate::Reg<wifi_clk_en::WIFI_CLK_EN_SPEC>;
#[doc = "DPORT_WIFI_CLK_EN"]
pub mod wifi_clk_en;
#[doc = "CORE_RST_EN register accessor: an alias for `Reg<CORE_RST_EN_SPEC>`"]
pub type CORE_RST_EN = crate::Reg<core_rst_en::CORE_RST_EN_SPEC>;
#[doc = "DPORT_CORE_RST_EN"]
pub mod core_rst_en;
#[doc = "BT_LPCK_DIV_INT register accessor: an alias for `Reg<BT_LPCK_DIV_INT_SPEC>`"]
pub type BT_LPCK_DIV_INT = crate::Reg<bt_lpck_div_int::BT_LPCK_DIV_INT_SPEC>;
#[doc = "DPORT_BT_LPCK_DIV_INT"]
pub mod bt_lpck_div_int;
#[doc = "BT_LPCK_DIV_FRAC register accessor: an alias for `Reg<BT_LPCK_DIV_FRAC_SPEC>`"]
pub type BT_LPCK_DIV_FRAC = crate::Reg<bt_lpck_div_frac::BT_LPCK_DIV_FRAC_SPEC>;
#[doc = "DPORT_BT_LPCK_DIV_FRAC"]
pub mod bt_lpck_div_frac;
#[doc = "CPU_INTR_FROM_CPU_0 register accessor: an alias for `Reg<CPU_INTR_FROM_CPU_0_SPEC>`"]
pub type CPU_INTR_FROM_CPU_0 = crate::Reg<cpu_intr_from_cpu_0::CPU_INTR_FROM_CPU_0_SPEC>;
#[doc = "DPORT_CPU_INTR_FROM_CPU_0"]
pub mod cpu_intr_from_cpu_0;
#[doc = "CPU_INTR_FROM_CPU_1 register accessor: an alias for `Reg<CPU_INTR_FROM_CPU_1_SPEC>`"]
pub type CPU_INTR_FROM_CPU_1 = crate::Reg<cpu_intr_from_cpu_1::CPU_INTR_FROM_CPU_1_SPEC>;
#[doc = "DPORT_CPU_INTR_FROM_CPU_1"]
pub mod cpu_intr_from_cpu_1;
#[doc = "CPU_INTR_FROM_CPU_2 register accessor: an alias for `Reg<CPU_INTR_FROM_CPU_2_SPEC>`"]
pub type CPU_INTR_FROM_CPU_2 = crate::Reg<cpu_intr_from_cpu_2::CPU_INTR_FROM_CPU_2_SPEC>;
#[doc = "DPORT_CPU_INTR_FROM_CPU_2"]
pub mod cpu_intr_from_cpu_2;
#[doc = "CPU_INTR_FROM_CPU_3 register accessor: an alias for `Reg<CPU_INTR_FROM_CPU_3_SPEC>`"]
pub type CPU_INTR_FROM_CPU_3 = crate::Reg<cpu_intr_from_cpu_3::CPU_INTR_FROM_CPU_3_SPEC>;
#[doc = "DPORT_CPU_INTR_FROM_CPU_3"]
pub mod cpu_intr_from_cpu_3;
#[doc = "PRO_INTR_STATUS_0 register accessor: an alias for `Reg<PRO_INTR_STATUS_0_SPEC>`"]
pub type PRO_INTR_STATUS_0 = crate::Reg<pro_intr_status_0::PRO_INTR_STATUS_0_SPEC>;
#[doc = "DPORT_PRO_INTR_STATUS_0"]
pub mod pro_intr_status_0;
#[doc = "PRO_INTR_STATUS_1 register accessor: an alias for `Reg<PRO_INTR_STATUS_1_SPEC>`"]
pub type PRO_INTR_STATUS_1 = crate::Reg<pro_intr_status_1::PRO_INTR_STATUS_1_SPEC>;
#[doc = "DPORT_PRO_INTR_STATUS_1"]
pub mod pro_intr_status_1;
#[doc = "PRO_INTR_STATUS_2 register accessor: an alias for `Reg<PRO_INTR_STATUS_2_SPEC>`"]
pub type PRO_INTR_STATUS_2 = crate::Reg<pro_intr_status_2::PRO_INTR_STATUS_2_SPEC>;
#[doc = "DPORT_PRO_INTR_STATUS_2"]
pub mod pro_intr_status_2;
#[doc = "APP_INTR_STATUS_0 register accessor: an alias for `Reg<APP_INTR_STATUS_0_SPEC>`"]
pub type APP_INTR_STATUS_0 = crate::Reg<app_intr_status_0::APP_INTR_STATUS_0_SPEC>;
#[doc = "DPORT_APP_INTR_STATUS_0"]
pub mod app_intr_status_0;
#[doc = "APP_INTR_STATUS_1 register accessor: an alias for `Reg<APP_INTR_STATUS_1_SPEC>`"]
pub type APP_INTR_STATUS_1 = crate::Reg<app_intr_status_1::APP_INTR_STATUS_1_SPEC>;
#[doc = "DPORT_APP_INTR_STATUS_1"]
pub mod app_intr_status_1;
#[doc = "APP_INTR_STATUS_2 register accessor: an alias for `Reg<APP_INTR_STATUS_2_SPEC>`"]
pub type APP_INTR_STATUS_2 = crate::Reg<app_intr_status_2::APP_INTR_STATUS_2_SPEC>;
#[doc = "DPORT_APP_INTR_STATUS_2"]
pub mod app_intr_status_2;
#[doc = "PRO_MAC_INTR_MAP register accessor: an alias for `Reg<PRO_MAC_INTR_MAP_SPEC>`"]
pub type PRO_MAC_INTR_MAP = crate::Reg<pro_mac_intr_map::PRO_MAC_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_MAC_INTR_MAP"]
pub mod pro_mac_intr_map;
#[doc = "PRO_MAC_NMI_MAP register accessor: an alias for `Reg<PRO_MAC_NMI_MAP_SPEC>`"]
pub type PRO_MAC_NMI_MAP = crate::Reg<pro_mac_nmi_map::PRO_MAC_NMI_MAP_SPEC>;
#[doc = "DPORT_PRO_MAC_NMI_MAP"]
pub mod pro_mac_nmi_map;
#[doc = "PRO_BB_INT_MAP register accessor: an alias for `Reg<PRO_BB_INT_MAP_SPEC>`"]
pub type PRO_BB_INT_MAP = crate::Reg<pro_bb_int_map::PRO_BB_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_BB_INT_MAP"]
pub mod pro_bb_int_map;
#[doc = "PRO_BT_MAC_INT_MAP register accessor: an alias for `Reg<PRO_BT_MAC_INT_MAP_SPEC>`"]
pub type PRO_BT_MAC_INT_MAP = crate::Reg<pro_bt_mac_int_map::PRO_BT_MAC_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_BT_MAC_INT_MAP"]
pub mod pro_bt_mac_int_map;
#[doc = "PRO_BT_BB_INT_MAP register accessor: an alias for `Reg<PRO_BT_BB_INT_MAP_SPEC>`"]
pub type PRO_BT_BB_INT_MAP = crate::Reg<pro_bt_bb_int_map::PRO_BT_BB_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_BT_BB_INT_MAP"]
pub mod pro_bt_bb_int_map;
#[doc = "PRO_BT_BB_NMI_MAP register accessor: an alias for `Reg<PRO_BT_BB_NMI_MAP_SPEC>`"]
pub type PRO_BT_BB_NMI_MAP = crate::Reg<pro_bt_bb_nmi_map::PRO_BT_BB_NMI_MAP_SPEC>;
#[doc = "DPORT_PRO_BT_BB_NMI_MAP"]
pub mod pro_bt_bb_nmi_map;
#[doc = "PRO_RWBT_IRQ_MAP register accessor: an alias for `Reg<PRO_RWBT_IRQ_MAP_SPEC>`"]
pub type PRO_RWBT_IRQ_MAP = crate::Reg<pro_rwbt_irq_map::PRO_RWBT_IRQ_MAP_SPEC>;
#[doc = "DPORT_PRO_RWBT_IRQ_MAP"]
pub mod pro_rwbt_irq_map;
#[doc = "PRO_RWBLE_IRQ_MAP register accessor: an alias for `Reg<PRO_RWBLE_IRQ_MAP_SPEC>`"]
pub type PRO_RWBLE_IRQ_MAP = crate::Reg<pro_rwble_irq_map::PRO_RWBLE_IRQ_MAP_SPEC>;
#[doc = "DPORT_PRO_RWBLE_IRQ_MAP"]
pub mod pro_rwble_irq_map;
#[doc = "PRO_RWBT_NMI_MAP register accessor: an alias for `Reg<PRO_RWBT_NMI_MAP_SPEC>`"]
pub type PRO_RWBT_NMI_MAP = crate::Reg<pro_rwbt_nmi_map::PRO_RWBT_NMI_MAP_SPEC>;
#[doc = "DPORT_PRO_RWBT_NMI_MAP"]
pub mod pro_rwbt_nmi_map;
#[doc = "PRO_RWBLE_NMI_MAP register accessor: an alias for `Reg<PRO_RWBLE_NMI_MAP_SPEC>`"]
pub type PRO_RWBLE_NMI_MAP = crate::Reg<pro_rwble_nmi_map::PRO_RWBLE_NMI_MAP_SPEC>;
#[doc = "DPORT_PRO_RWBLE_NMI_MAP"]
pub mod pro_rwble_nmi_map;
#[doc = "PRO_SLC0_INTR_MAP register accessor: an alias for `Reg<PRO_SLC0_INTR_MAP_SPEC>`"]
pub type PRO_SLC0_INTR_MAP = crate::Reg<pro_slc0_intr_map::PRO_SLC0_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_SLC0_INTR_MAP"]
pub mod pro_slc0_intr_map;
#[doc = "PRO_SLC1_INTR_MAP register accessor: an alias for `Reg<PRO_SLC1_INTR_MAP_SPEC>`"]
pub type PRO_SLC1_INTR_MAP = crate::Reg<pro_slc1_intr_map::PRO_SLC1_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_SLC1_INTR_MAP"]
pub mod pro_slc1_intr_map;
#[doc = "PRO_UHCI0_INTR_MAP register accessor: an alias for `Reg<PRO_UHCI0_INTR_MAP_SPEC>`"]
pub type PRO_UHCI0_INTR_MAP = crate::Reg<pro_uhci0_intr_map::PRO_UHCI0_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_UHCI0_INTR_MAP"]
pub mod pro_uhci0_intr_map;
#[doc = "PRO_UHCI1_INTR_MAP register accessor: an alias for `Reg<PRO_UHCI1_INTR_MAP_SPEC>`"]
pub type PRO_UHCI1_INTR_MAP = crate::Reg<pro_uhci1_intr_map::PRO_UHCI1_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_UHCI1_INTR_MAP"]
pub mod pro_uhci1_intr_map;
#[doc = "PRO_TG_T0_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG_T0_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG_T0_LEVEL_INT_MAP =
    crate::Reg<pro_tg_t0_level_int_map::PRO_TG_T0_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_T0_LEVEL_INT_MAP"]
pub mod pro_tg_t0_level_int_map;
#[doc = "PRO_TG_T1_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG_T1_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG_T1_LEVEL_INT_MAP =
    crate::Reg<pro_tg_t1_level_int_map::PRO_TG_T1_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_T1_LEVEL_INT_MAP"]
pub mod pro_tg_t1_level_int_map;
#[doc = "PRO_TG_WDT_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG_WDT_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG_WDT_LEVEL_INT_MAP =
    crate::Reg<pro_tg_wdt_level_int_map::PRO_TG_WDT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_WDT_LEVEL_INT_MAP"]
pub mod pro_tg_wdt_level_int_map;
#[doc = "PRO_TG_LACT_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG_LACT_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG_LACT_LEVEL_INT_MAP =
    crate::Reg<pro_tg_lact_level_int_map::PRO_TG_LACT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_LACT_LEVEL_INT_MAP"]
pub mod pro_tg_lact_level_int_map;
#[doc = "PRO_TG1_T0_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG1_T0_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG1_T0_LEVEL_INT_MAP =
    crate::Reg<pro_tg1_t0_level_int_map::PRO_TG1_T0_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_T0_LEVEL_INT_MAP"]
pub mod pro_tg1_t0_level_int_map;
#[doc = "PRO_TG1_T1_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG1_T1_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG1_T1_LEVEL_INT_MAP =
    crate::Reg<pro_tg1_t1_level_int_map::PRO_TG1_T1_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_T1_LEVEL_INT_MAP"]
pub mod pro_tg1_t1_level_int_map;
#[doc = "PRO_TG1_WDT_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG1_WDT_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG1_WDT_LEVEL_INT_MAP =
    crate::Reg<pro_tg1_wdt_level_int_map::PRO_TG1_WDT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_WDT_LEVEL_INT_MAP"]
pub mod pro_tg1_wdt_level_int_map;
#[doc = "PRO_TG1_LACT_LEVEL_INT_MAP register accessor: an alias for `Reg<PRO_TG1_LACT_LEVEL_INT_MAP_SPEC>`"]
pub type PRO_TG1_LACT_LEVEL_INT_MAP =
    crate::Reg<pro_tg1_lact_level_int_map::PRO_TG1_LACT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_LACT_LEVEL_INT_MAP"]
pub mod pro_tg1_lact_level_int_map;
#[doc = "PRO_GPIO_INTERRUPT_MAP register accessor: an alias for `Reg<PRO_GPIO_INTERRUPT_MAP_SPEC>`"]
pub type PRO_GPIO_INTERRUPT_MAP = crate::Reg<pro_gpio_interrupt_map::PRO_GPIO_INTERRUPT_MAP_SPEC>;
#[doc = "DPORT_PRO_GPIO_INTERRUPT_MAP"]
pub mod pro_gpio_interrupt_map;
#[doc = "PRO_GPIO_INTERRUPT_NMI_MAP register accessor: an alias for `Reg<PRO_GPIO_INTERRUPT_NMI_MAP_SPEC>`"]
pub type PRO_GPIO_INTERRUPT_NMI_MAP =
    crate::Reg<pro_gpio_interrupt_nmi_map::PRO_GPIO_INTERRUPT_NMI_MAP_SPEC>;
#[doc = "DPORT_PRO_GPIO_INTERRUPT_NMI_MAP"]
pub mod pro_gpio_interrupt_nmi_map;
#[doc = "PRO_CPU_INTR_FROM_CPU_0_MAP register accessor: an alias for `Reg<PRO_CPU_INTR_FROM_CPU_0_MAP_SPEC>`"]
pub type PRO_CPU_INTR_FROM_CPU_0_MAP =
    crate::Reg<pro_cpu_intr_from_cpu_0_map::PRO_CPU_INTR_FROM_CPU_0_MAP_SPEC>;
#[doc = "DPORT_PRO_CPU_INTR_FROM_CPU_0_MAP"]
pub mod pro_cpu_intr_from_cpu_0_map;
#[doc = "PRO_CPU_INTR_FROM_CPU_1_MAP register accessor: an alias for `Reg<PRO_CPU_INTR_FROM_CPU_1_MAP_SPEC>`"]
pub type PRO_CPU_INTR_FROM_CPU_1_MAP =
    crate::Reg<pro_cpu_intr_from_cpu_1_map::PRO_CPU_INTR_FROM_CPU_1_MAP_SPEC>;
#[doc = "DPORT_PRO_CPU_INTR_FROM_CPU_1_MAP"]
pub mod pro_cpu_intr_from_cpu_1_map;
#[doc = "PRO_CPU_INTR_FROM_CPU_2_MAP register accessor: an alias for `Reg<PRO_CPU_INTR_FROM_CPU_2_MAP_SPEC>`"]
pub type PRO_CPU_INTR_FROM_CPU_2_MAP =
    crate::Reg<pro_cpu_intr_from_cpu_2_map::PRO_CPU_INTR_FROM_CPU_2_MAP_SPEC>;
#[doc = "DPORT_PRO_CPU_INTR_FROM_CPU_2_MAP"]
pub mod pro_cpu_intr_from_cpu_2_map;
#[doc = "PRO_CPU_INTR_FROM_CPU_3_MAP register accessor: an alias for `Reg<PRO_CPU_INTR_FROM_CPU_3_MAP_SPEC>`"]
pub type PRO_CPU_INTR_FROM_CPU_3_MAP =
    crate::Reg<pro_cpu_intr_from_cpu_3_map::PRO_CPU_INTR_FROM_CPU_3_MAP_SPEC>;
#[doc = "DPORT_PRO_CPU_INTR_FROM_CPU_3_MAP"]
pub mod pro_cpu_intr_from_cpu_3_map;
#[doc = "PRO_SPI_INTR_0_MAP register accessor: an alias for `Reg<PRO_SPI_INTR_0_MAP_SPEC>`"]
pub type PRO_SPI_INTR_0_MAP = crate::Reg<pro_spi_intr_0_map::PRO_SPI_INTR_0_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI_INTR_0_MAP"]
pub mod pro_spi_intr_0_map;
#[doc = "PRO_SPI_INTR_1_MAP register accessor: an alias for `Reg<PRO_SPI_INTR_1_MAP_SPEC>`"]
pub type PRO_SPI_INTR_1_MAP = crate::Reg<pro_spi_intr_1_map::PRO_SPI_INTR_1_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI_INTR_1_MAP"]
pub mod pro_spi_intr_1_map;
#[doc = "PRO_SPI_INTR_2_MAP register accessor: an alias for `Reg<PRO_SPI_INTR_2_MAP_SPEC>`"]
pub type PRO_SPI_INTR_2_MAP = crate::Reg<pro_spi_intr_2_map::PRO_SPI_INTR_2_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI_INTR_2_MAP"]
pub mod pro_spi_intr_2_map;
#[doc = "PRO_SPI_INTR_3_MAP register accessor: an alias for `Reg<PRO_SPI_INTR_3_MAP_SPEC>`"]
pub type PRO_SPI_INTR_3_MAP = crate::Reg<pro_spi_intr_3_map::PRO_SPI_INTR_3_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI_INTR_3_MAP"]
pub mod pro_spi_intr_3_map;
#[doc = "PRO_I2S0_INT_MAP register accessor: an alias for `Reg<PRO_I2S0_INT_MAP_SPEC>`"]
pub type PRO_I2S0_INT_MAP = crate::Reg<pro_i2s0_int_map::PRO_I2S0_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_I2S0_INT_MAP"]
pub mod pro_i2s0_int_map;
#[doc = "PRO_I2S1_INT_MAP register accessor: an alias for `Reg<PRO_I2S1_INT_MAP_SPEC>`"]
pub type PRO_I2S1_INT_MAP = crate::Reg<pro_i2s1_int_map::PRO_I2S1_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_I2S1_INT_MAP"]
pub mod pro_i2s1_int_map;
#[doc = "PRO_UART_INTR_MAP register accessor: an alias for `Reg<PRO_UART_INTR_MAP_SPEC>`"]
pub type PRO_UART_INTR_MAP = crate::Reg<pro_uart_intr_map::PRO_UART_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_UART_INTR_MAP"]
pub mod pro_uart_intr_map;
#[doc = "PRO_UART1_INTR_MAP register accessor: an alias for `Reg<PRO_UART1_INTR_MAP_SPEC>`"]
pub type PRO_UART1_INTR_MAP = crate::Reg<pro_uart1_intr_map::PRO_UART1_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_UART1_INTR_MAP"]
pub mod pro_uart1_intr_map;
#[doc = "PRO_UART2_INTR_MAP register accessor: an alias for `Reg<PRO_UART2_INTR_MAP_SPEC>`"]
pub type PRO_UART2_INTR_MAP = crate::Reg<pro_uart2_intr_map::PRO_UART2_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_UART2_INTR_MAP"]
pub mod pro_uart2_intr_map;
#[doc = "PRO_SDIO_HOST_INTERRUPT_MAP register accessor: an alias for `Reg<PRO_SDIO_HOST_INTERRUPT_MAP_SPEC>`"]
pub type PRO_SDIO_HOST_INTERRUPT_MAP =
    crate::Reg<pro_sdio_host_interrupt_map::PRO_SDIO_HOST_INTERRUPT_MAP_SPEC>;
#[doc = "DPORT_PRO_SDIO_HOST_INTERRUPT_MAP"]
pub mod pro_sdio_host_interrupt_map;
#[doc = "PRO_EMAC_INT_MAP register accessor: an alias for `Reg<PRO_EMAC_INT_MAP_SPEC>`"]
pub type PRO_EMAC_INT_MAP = crate::Reg<pro_emac_int_map::PRO_EMAC_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_EMAC_INT_MAP"]
pub mod pro_emac_int_map;
#[doc = "PRO_PWM0_INTR_MAP register accessor: an alias for `Reg<PRO_PWM0_INTR_MAP_SPEC>`"]
pub type PRO_PWM0_INTR_MAP = crate::Reg<pro_pwm0_intr_map::PRO_PWM0_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_PWM0_INTR_MAP"]
pub mod pro_pwm0_intr_map;
#[doc = "PRO_PWM1_INTR_MAP register accessor: an alias for `Reg<PRO_PWM1_INTR_MAP_SPEC>`"]
pub type PRO_PWM1_INTR_MAP = crate::Reg<pro_pwm1_intr_map::PRO_PWM1_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_PWM1_INTR_MAP"]
pub mod pro_pwm1_intr_map;
#[doc = "PRO_PWM2_INTR_MAP register accessor: an alias for `Reg<PRO_PWM2_INTR_MAP_SPEC>`"]
pub type PRO_PWM2_INTR_MAP = crate::Reg<pro_pwm2_intr_map::PRO_PWM2_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_PWM2_INTR_MAP"]
pub mod pro_pwm2_intr_map;
#[doc = "PRO_PWM3_INTR_MAP register accessor: an alias for `Reg<PRO_PWM3_INTR_MAP_SPEC>`"]
pub type PRO_PWM3_INTR_MAP = crate::Reg<pro_pwm3_intr_map::PRO_PWM3_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_PWM3_INTR_MAP"]
pub mod pro_pwm3_intr_map;
#[doc = "PRO_LEDC_INT_MAP register accessor: an alias for `Reg<PRO_LEDC_INT_MAP_SPEC>`"]
pub type PRO_LEDC_INT_MAP = crate::Reg<pro_ledc_int_map::PRO_LEDC_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_LEDC_INT_MAP"]
pub mod pro_ledc_int_map;
#[doc = "PRO_EFUSE_INT_MAP register accessor: an alias for `Reg<PRO_EFUSE_INT_MAP_SPEC>`"]
pub type PRO_EFUSE_INT_MAP = crate::Reg<pro_efuse_int_map::PRO_EFUSE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_EFUSE_INT_MAP"]
pub mod pro_efuse_int_map;
#[doc = "PRO_CAN_INT_MAP register accessor: an alias for `Reg<PRO_CAN_INT_MAP_SPEC>`"]
pub type PRO_CAN_INT_MAP = crate::Reg<pro_can_int_map::PRO_CAN_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_CAN_INT_MAP"]
pub mod pro_can_int_map;
#[doc = "PRO_RTC_CORE_INTR_MAP register accessor: an alias for `Reg<PRO_RTC_CORE_INTR_MAP_SPEC>`"]
pub type PRO_RTC_CORE_INTR_MAP = crate::Reg<pro_rtc_core_intr_map::PRO_RTC_CORE_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_RTC_CORE_INTR_MAP"]
pub mod pro_rtc_core_intr_map;
#[doc = "PRO_RMT_INTR_MAP register accessor: an alias for `Reg<PRO_RMT_INTR_MAP_SPEC>`"]
pub type PRO_RMT_INTR_MAP = crate::Reg<pro_rmt_intr_map::PRO_RMT_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_RMT_INTR_MAP"]
pub mod pro_rmt_intr_map;
#[doc = "PRO_PCNT_INTR_MAP register accessor: an alias for `Reg<PRO_PCNT_INTR_MAP_SPEC>`"]
pub type PRO_PCNT_INTR_MAP = crate::Reg<pro_pcnt_intr_map::PRO_PCNT_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_PCNT_INTR_MAP"]
pub mod pro_pcnt_intr_map;
#[doc = "PRO_I2C_EXT0_INTR_MAP register accessor: an alias for `Reg<PRO_I2C_EXT0_INTR_MAP_SPEC>`"]
pub type PRO_I2C_EXT0_INTR_MAP = crate::Reg<pro_i2c_ext0_intr_map::PRO_I2C_EXT0_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_I2C_EXT0_INTR_MAP"]
pub mod pro_i2c_ext0_intr_map;
#[doc = "PRO_I2C_EXT1_INTR_MAP register accessor: an alias for `Reg<PRO_I2C_EXT1_INTR_MAP_SPEC>`"]
pub type PRO_I2C_EXT1_INTR_MAP = crate::Reg<pro_i2c_ext1_intr_map::PRO_I2C_EXT1_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_I2C_EXT1_INTR_MAP"]
pub mod pro_i2c_ext1_intr_map;
#[doc = "PRO_RSA_INTR_MAP register accessor: an alias for `Reg<PRO_RSA_INTR_MAP_SPEC>`"]
pub type PRO_RSA_INTR_MAP = crate::Reg<pro_rsa_intr_map::PRO_RSA_INTR_MAP_SPEC>;
#[doc = "DPORT_PRO_RSA_INTR_MAP"]
pub mod pro_rsa_intr_map;
#[doc = "PRO_SPI1_DMA_INT_MAP register accessor: an alias for `Reg<PRO_SPI1_DMA_INT_MAP_SPEC>`"]
pub type PRO_SPI1_DMA_INT_MAP = crate::Reg<pro_spi1_dma_int_map::PRO_SPI1_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI1_DMA_INT_MAP"]
pub mod pro_spi1_dma_int_map;
#[doc = "PRO_SPI2_DMA_INT_MAP register accessor: an alias for `Reg<PRO_SPI2_DMA_INT_MAP_SPEC>`"]
pub type PRO_SPI2_DMA_INT_MAP = crate::Reg<pro_spi2_dma_int_map::PRO_SPI2_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI2_DMA_INT_MAP"]
pub mod pro_spi2_dma_int_map;
#[doc = "PRO_SPI3_DMA_INT_MAP register accessor: an alias for `Reg<PRO_SPI3_DMA_INT_MAP_SPEC>`"]
pub type PRO_SPI3_DMA_INT_MAP = crate::Reg<pro_spi3_dma_int_map::PRO_SPI3_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_SPI3_DMA_INT_MAP"]
pub mod pro_spi3_dma_int_map;
#[doc = "PRO_WDG_INT_MAP register accessor: an alias for `Reg<PRO_WDG_INT_MAP_SPEC>`"]
pub type PRO_WDG_INT_MAP = crate::Reg<pro_wdg_int_map::PRO_WDG_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_WDG_INT_MAP"]
pub mod pro_wdg_int_map;
#[doc = "PRO_TIMER_INT1_MAP register accessor: an alias for `Reg<PRO_TIMER_INT1_MAP_SPEC>`"]
pub type PRO_TIMER_INT1_MAP = crate::Reg<pro_timer_int1_map::PRO_TIMER_INT1_MAP_SPEC>;
#[doc = "DPORT_PRO_TIMER_INT1_MAP"]
pub mod pro_timer_int1_map;
#[doc = "PRO_TIMER_INT2_MAP register accessor: an alias for `Reg<PRO_TIMER_INT2_MAP_SPEC>`"]
pub type PRO_TIMER_INT2_MAP = crate::Reg<pro_timer_int2_map::PRO_TIMER_INT2_MAP_SPEC>;
#[doc = "DPORT_PRO_TIMER_INT2_MAP"]
pub mod pro_timer_int2_map;
#[doc = "PRO_TG_T0_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG_T0_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG_T0_EDGE_INT_MAP = crate::Reg<pro_tg_t0_edge_int_map::PRO_TG_T0_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_T0_EDGE_INT_MAP"]
pub mod pro_tg_t0_edge_int_map;
#[doc = "PRO_TG_T1_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG_T1_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG_T1_EDGE_INT_MAP = crate::Reg<pro_tg_t1_edge_int_map::PRO_TG_T1_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_T1_EDGE_INT_MAP"]
pub mod pro_tg_t1_edge_int_map;
#[doc = "PRO_TG_WDT_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG_WDT_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG_WDT_EDGE_INT_MAP =
    crate::Reg<pro_tg_wdt_edge_int_map::PRO_TG_WDT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_WDT_EDGE_INT_MAP"]
pub mod pro_tg_wdt_edge_int_map;
#[doc = "PRO_TG_LACT_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG_LACT_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG_LACT_EDGE_INT_MAP =
    crate::Reg<pro_tg_lact_edge_int_map::PRO_TG_LACT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG_LACT_EDGE_INT_MAP"]
pub mod pro_tg_lact_edge_int_map;
#[doc = "PRO_TG1_T0_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG1_T0_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG1_T0_EDGE_INT_MAP =
    crate::Reg<pro_tg1_t0_edge_int_map::PRO_TG1_T0_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_T0_EDGE_INT_MAP"]
pub mod pro_tg1_t0_edge_int_map;
#[doc = "PRO_TG1_T1_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG1_T1_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG1_T1_EDGE_INT_MAP =
    crate::Reg<pro_tg1_t1_edge_int_map::PRO_TG1_T1_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_T1_EDGE_INT_MAP"]
pub mod pro_tg1_t1_edge_int_map;
#[doc = "PRO_TG1_WDT_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG1_WDT_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG1_WDT_EDGE_INT_MAP =
    crate::Reg<pro_tg1_wdt_edge_int_map::PRO_TG1_WDT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_WDT_EDGE_INT_MAP"]
pub mod pro_tg1_wdt_edge_int_map;
#[doc = "PRO_TG1_LACT_EDGE_INT_MAP register accessor: an alias for `Reg<PRO_TG1_LACT_EDGE_INT_MAP_SPEC>`"]
pub type PRO_TG1_LACT_EDGE_INT_MAP =
    crate::Reg<pro_tg1_lact_edge_int_map::PRO_TG1_LACT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_TG1_LACT_EDGE_INT_MAP"]
pub mod pro_tg1_lact_edge_int_map;
#[doc = "PRO_MMU_IA_INT_MAP register accessor: an alias for `Reg<PRO_MMU_IA_INT_MAP_SPEC>`"]
pub type PRO_MMU_IA_INT_MAP = crate::Reg<pro_mmu_ia_int_map::PRO_MMU_IA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_MMU_IA_INT_MAP"]
pub mod pro_mmu_ia_int_map;
#[doc = "PRO_MPU_IA_INT_MAP register accessor: an alias for `Reg<PRO_MPU_IA_INT_MAP_SPEC>`"]
pub type PRO_MPU_IA_INT_MAP = crate::Reg<pro_mpu_ia_int_map::PRO_MPU_IA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_MPU_IA_INT_MAP"]
pub mod pro_mpu_ia_int_map;
#[doc = "PRO_CACHE_IA_INT_MAP register accessor: an alias for `Reg<PRO_CACHE_IA_INT_MAP_SPEC>`"]
pub type PRO_CACHE_IA_INT_MAP = crate::Reg<pro_cache_ia_int_map::PRO_CACHE_IA_INT_MAP_SPEC>;
#[doc = "DPORT_PRO_CACHE_IA_INT_MAP"]
pub mod pro_cache_ia_int_map;
#[doc = "APP_MAC_INTR_MAP register accessor: an alias for `Reg<APP_MAC_INTR_MAP_SPEC>`"]
pub type APP_MAC_INTR_MAP = crate::Reg<app_mac_intr_map::APP_MAC_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_MAC_INTR_MAP"]
pub mod app_mac_intr_map;
#[doc = "APP_MAC_NMI_MAP register accessor: an alias for `Reg<APP_MAC_NMI_MAP_SPEC>`"]
pub type APP_MAC_NMI_MAP = crate::Reg<app_mac_nmi_map::APP_MAC_NMI_MAP_SPEC>;
#[doc = "DPORT_APP_MAC_NMI_MAP"]
pub mod app_mac_nmi_map;
#[doc = "APP_BB_INT_MAP register accessor: an alias for `Reg<APP_BB_INT_MAP_SPEC>`"]
pub type APP_BB_INT_MAP = crate::Reg<app_bb_int_map::APP_BB_INT_MAP_SPEC>;
#[doc = "DPORT_APP_BB_INT_MAP"]
pub mod app_bb_int_map;
#[doc = "APP_BT_MAC_INT_MAP register accessor: an alias for `Reg<APP_BT_MAC_INT_MAP_SPEC>`"]
pub type APP_BT_MAC_INT_MAP = crate::Reg<app_bt_mac_int_map::APP_BT_MAC_INT_MAP_SPEC>;
#[doc = "DPORT_APP_BT_MAC_INT_MAP"]
pub mod app_bt_mac_int_map;
#[doc = "APP_BT_BB_INT_MAP register accessor: an alias for `Reg<APP_BT_BB_INT_MAP_SPEC>`"]
pub type APP_BT_BB_INT_MAP = crate::Reg<app_bt_bb_int_map::APP_BT_BB_INT_MAP_SPEC>;
#[doc = "DPORT_APP_BT_BB_INT_MAP"]
pub mod app_bt_bb_int_map;
#[doc = "APP_BT_BB_NMI_MAP register accessor: an alias for `Reg<APP_BT_BB_NMI_MAP_SPEC>`"]
pub type APP_BT_BB_NMI_MAP = crate::Reg<app_bt_bb_nmi_map::APP_BT_BB_NMI_MAP_SPEC>;
#[doc = "DPORT_APP_BT_BB_NMI_MAP"]
pub mod app_bt_bb_nmi_map;
#[doc = "APP_RWBT_IRQ_MAP register accessor: an alias for `Reg<APP_RWBT_IRQ_MAP_SPEC>`"]
pub type APP_RWBT_IRQ_MAP = crate::Reg<app_rwbt_irq_map::APP_RWBT_IRQ_MAP_SPEC>;
#[doc = "DPORT_APP_RWBT_IRQ_MAP"]
pub mod app_rwbt_irq_map;
#[doc = "APP_RWBLE_IRQ_MAP register accessor: an alias for `Reg<APP_RWBLE_IRQ_MAP_SPEC>`"]
pub type APP_RWBLE_IRQ_MAP = crate::Reg<app_rwble_irq_map::APP_RWBLE_IRQ_MAP_SPEC>;
#[doc = "DPORT_APP_RWBLE_IRQ_MAP"]
pub mod app_rwble_irq_map;
#[doc = "APP_RWBT_NMI_MAP register accessor: an alias for `Reg<APP_RWBT_NMI_MAP_SPEC>`"]
pub type APP_RWBT_NMI_MAP = crate::Reg<app_rwbt_nmi_map::APP_RWBT_NMI_MAP_SPEC>;
#[doc = "DPORT_APP_RWBT_NMI_MAP"]
pub mod app_rwbt_nmi_map;
#[doc = "APP_RWBLE_NMI_MAP register accessor: an alias for `Reg<APP_RWBLE_NMI_MAP_SPEC>`"]
pub type APP_RWBLE_NMI_MAP = crate::Reg<app_rwble_nmi_map::APP_RWBLE_NMI_MAP_SPEC>;
#[doc = "DPORT_APP_RWBLE_NMI_MAP"]
pub mod app_rwble_nmi_map;
#[doc = "APP_SLC0_INTR_MAP register accessor: an alias for `Reg<APP_SLC0_INTR_MAP_SPEC>`"]
pub type APP_SLC0_INTR_MAP = crate::Reg<app_slc0_intr_map::APP_SLC0_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_SLC0_INTR_MAP"]
pub mod app_slc0_intr_map;
#[doc = "APP_SLC1_INTR_MAP register accessor: an alias for `Reg<APP_SLC1_INTR_MAP_SPEC>`"]
pub type APP_SLC1_INTR_MAP = crate::Reg<app_slc1_intr_map::APP_SLC1_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_SLC1_INTR_MAP"]
pub mod app_slc1_intr_map;
#[doc = "APP_UHCI0_INTR_MAP register accessor: an alias for `Reg<APP_UHCI0_INTR_MAP_SPEC>`"]
pub type APP_UHCI0_INTR_MAP = crate::Reg<app_uhci0_intr_map::APP_UHCI0_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_UHCI0_INTR_MAP"]
pub mod app_uhci0_intr_map;
#[doc = "APP_UHCI1_INTR_MAP register accessor: an alias for `Reg<APP_UHCI1_INTR_MAP_SPEC>`"]
pub type APP_UHCI1_INTR_MAP = crate::Reg<app_uhci1_intr_map::APP_UHCI1_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_UHCI1_INTR_MAP"]
pub mod app_uhci1_intr_map;
#[doc = "APP_TG_T0_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG_T0_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG_T0_LEVEL_INT_MAP =
    crate::Reg<app_tg_t0_level_int_map::APP_TG_T0_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_T0_LEVEL_INT_MAP"]
pub mod app_tg_t0_level_int_map;
#[doc = "APP_TG_T1_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG_T1_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG_T1_LEVEL_INT_MAP =
    crate::Reg<app_tg_t1_level_int_map::APP_TG_T1_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_T1_LEVEL_INT_MAP"]
pub mod app_tg_t1_level_int_map;
#[doc = "APP_TG_WDT_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG_WDT_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG_WDT_LEVEL_INT_MAP =
    crate::Reg<app_tg_wdt_level_int_map::APP_TG_WDT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_WDT_LEVEL_INT_MAP"]
pub mod app_tg_wdt_level_int_map;
#[doc = "APP_TG_LACT_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG_LACT_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG_LACT_LEVEL_INT_MAP =
    crate::Reg<app_tg_lact_level_int_map::APP_TG_LACT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_LACT_LEVEL_INT_MAP"]
pub mod app_tg_lact_level_int_map;
#[doc = "APP_TG1_T0_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG1_T0_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG1_T0_LEVEL_INT_MAP =
    crate::Reg<app_tg1_t0_level_int_map::APP_TG1_T0_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_T0_LEVEL_INT_MAP"]
pub mod app_tg1_t0_level_int_map;
#[doc = "APP_TG1_T1_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG1_T1_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG1_T1_LEVEL_INT_MAP =
    crate::Reg<app_tg1_t1_level_int_map::APP_TG1_T1_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_T1_LEVEL_INT_MAP"]
pub mod app_tg1_t1_level_int_map;
#[doc = "APP_TG1_WDT_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG1_WDT_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG1_WDT_LEVEL_INT_MAP =
    crate::Reg<app_tg1_wdt_level_int_map::APP_TG1_WDT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_WDT_LEVEL_INT_MAP"]
pub mod app_tg1_wdt_level_int_map;
#[doc = "APP_TG1_LACT_LEVEL_INT_MAP register accessor: an alias for `Reg<APP_TG1_LACT_LEVEL_INT_MAP_SPEC>`"]
pub type APP_TG1_LACT_LEVEL_INT_MAP =
    crate::Reg<app_tg1_lact_level_int_map::APP_TG1_LACT_LEVEL_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_LACT_LEVEL_INT_MAP"]
pub mod app_tg1_lact_level_int_map;
#[doc = "APP_GPIO_INTERRUPT_MAP register accessor: an alias for `Reg<APP_GPIO_INTERRUPT_MAP_SPEC>`"]
pub type APP_GPIO_INTERRUPT_MAP = crate::Reg<app_gpio_interrupt_map::APP_GPIO_INTERRUPT_MAP_SPEC>;
#[doc = "DPORT_APP_GPIO_INTERRUPT_MAP"]
pub mod app_gpio_interrupt_map;
#[doc = "APP_GPIO_INTERRUPT_NMI_MAP register accessor: an alias for `Reg<APP_GPIO_INTERRUPT_NMI_MAP_SPEC>`"]
pub type APP_GPIO_INTERRUPT_NMI_MAP =
    crate::Reg<app_gpio_interrupt_nmi_map::APP_GPIO_INTERRUPT_NMI_MAP_SPEC>;
#[doc = "DPORT_APP_GPIO_INTERRUPT_NMI_MAP"]
pub mod app_gpio_interrupt_nmi_map;
#[doc = "APP_CPU_INTR_FROM_CPU_0_MAP register accessor: an alias for `Reg<APP_CPU_INTR_FROM_CPU_0_MAP_SPEC>`"]
pub type APP_CPU_INTR_FROM_CPU_0_MAP =
    crate::Reg<app_cpu_intr_from_cpu_0_map::APP_CPU_INTR_FROM_CPU_0_MAP_SPEC>;
#[doc = "DPORT_APP_CPU_INTR_FROM_CPU_0_MAP"]
pub mod app_cpu_intr_from_cpu_0_map;
#[doc = "APP_CPU_INTR_FROM_CPU_1_MAP register accessor: an alias for `Reg<APP_CPU_INTR_FROM_CPU_1_MAP_SPEC>`"]
pub type APP_CPU_INTR_FROM_CPU_1_MAP =
    crate::Reg<app_cpu_intr_from_cpu_1_map::APP_CPU_INTR_FROM_CPU_1_MAP_SPEC>;
#[doc = "DPORT_APP_CPU_INTR_FROM_CPU_1_MAP"]
pub mod app_cpu_intr_from_cpu_1_map;
#[doc = "APP_CPU_INTR_FROM_CPU_2_MAP register accessor: an alias for `Reg<APP_CPU_INTR_FROM_CPU_2_MAP_SPEC>`"]
pub type APP_CPU_INTR_FROM_CPU_2_MAP =
    crate::Reg<app_cpu_intr_from_cpu_2_map::APP_CPU_INTR_FROM_CPU_2_MAP_SPEC>;
#[doc = "DPORT_APP_CPU_INTR_FROM_CPU_2_MAP"]
pub mod app_cpu_intr_from_cpu_2_map;
#[doc = "APP_CPU_INTR_FROM_CPU_3_MAP register accessor: an alias for `Reg<APP_CPU_INTR_FROM_CPU_3_MAP_SPEC>`"]
pub type APP_CPU_INTR_FROM_CPU_3_MAP =
    crate::Reg<app_cpu_intr_from_cpu_3_map::APP_CPU_INTR_FROM_CPU_3_MAP_SPEC>;
#[doc = "DPORT_APP_CPU_INTR_FROM_CPU_3_MAP"]
pub mod app_cpu_intr_from_cpu_3_map;
#[doc = "APP_SPI_INTR_0_MAP register accessor: an alias for `Reg<APP_SPI_INTR_0_MAP_SPEC>`"]
pub type APP_SPI_INTR_0_MAP = crate::Reg<app_spi_intr_0_map::APP_SPI_INTR_0_MAP_SPEC>;
#[doc = "DPORT_APP_SPI_INTR_0_MAP"]
pub mod app_spi_intr_0_map;
#[doc = "APP_SPI_INTR_1_MAP register accessor: an alias for `Reg<APP_SPI_INTR_1_MAP_SPEC>`"]
pub type APP_SPI_INTR_1_MAP = crate::Reg<app_spi_intr_1_map::APP_SPI_INTR_1_MAP_SPEC>;
#[doc = "DPORT_APP_SPI_INTR_1_MAP"]
pub mod app_spi_intr_1_map;
#[doc = "APP_SPI_INTR_2_MAP register accessor: an alias for `Reg<APP_SPI_INTR_2_MAP_SPEC>`"]
pub type APP_SPI_INTR_2_MAP = crate::Reg<app_spi_intr_2_map::APP_SPI_INTR_2_MAP_SPEC>;
#[doc = "DPORT_APP_SPI_INTR_2_MAP"]
pub mod app_spi_intr_2_map;
#[doc = "APP_SPI_INTR_3_MAP register accessor: an alias for `Reg<APP_SPI_INTR_3_MAP_SPEC>`"]
pub type APP_SPI_INTR_3_MAP = crate::Reg<app_spi_intr_3_map::APP_SPI_INTR_3_MAP_SPEC>;
#[doc = "DPORT_APP_SPI_INTR_3_MAP"]
pub mod app_spi_intr_3_map;
#[doc = "APP_I2S0_INT_MAP register accessor: an alias for `Reg<APP_I2S0_INT_MAP_SPEC>`"]
pub type APP_I2S0_INT_MAP = crate::Reg<app_i2s0_int_map::APP_I2S0_INT_MAP_SPEC>;
#[doc = "DPORT_APP_I2S0_INT_MAP"]
pub mod app_i2s0_int_map;
#[doc = "APP_I2S1_INT_MAP register accessor: an alias for `Reg<APP_I2S1_INT_MAP_SPEC>`"]
pub type APP_I2S1_INT_MAP = crate::Reg<app_i2s1_int_map::APP_I2S1_INT_MAP_SPEC>;
#[doc = "DPORT_APP_I2S1_INT_MAP"]
pub mod app_i2s1_int_map;
#[doc = "APP_UART_INTR_MAP register accessor: an alias for `Reg<APP_UART_INTR_MAP_SPEC>`"]
pub type APP_UART_INTR_MAP = crate::Reg<app_uart_intr_map::APP_UART_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_UART_INTR_MAP"]
pub mod app_uart_intr_map;
#[doc = "APP_UART1_INTR_MAP register accessor: an alias for `Reg<APP_UART1_INTR_MAP_SPEC>`"]
pub type APP_UART1_INTR_MAP = crate::Reg<app_uart1_intr_map::APP_UART1_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_UART1_INTR_MAP"]
pub mod app_uart1_intr_map;
#[doc = "APP_UART2_INTR_MAP register accessor: an alias for `Reg<APP_UART2_INTR_MAP_SPEC>`"]
pub type APP_UART2_INTR_MAP = crate::Reg<app_uart2_intr_map::APP_UART2_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_UART2_INTR_MAP"]
pub mod app_uart2_intr_map;
#[doc = "APP_SDIO_HOST_INTERRUPT_MAP register accessor: an alias for `Reg<APP_SDIO_HOST_INTERRUPT_MAP_SPEC>`"]
pub type APP_SDIO_HOST_INTERRUPT_MAP =
    crate::Reg<app_sdio_host_interrupt_map::APP_SDIO_HOST_INTERRUPT_MAP_SPEC>;
#[doc = "DPORT_APP_SDIO_HOST_INTERRUPT_MAP"]
pub mod app_sdio_host_interrupt_map;
#[doc = "APP_EMAC_INT_MAP register accessor: an alias for `Reg<APP_EMAC_INT_MAP_SPEC>`"]
pub type APP_EMAC_INT_MAP = crate::Reg<app_emac_int_map::APP_EMAC_INT_MAP_SPEC>;
#[doc = "DPORT_APP_EMAC_INT_MAP"]
pub mod app_emac_int_map;
#[doc = "APP_PWM0_INTR_MAP register accessor: an alias for `Reg<APP_PWM0_INTR_MAP_SPEC>`"]
pub type APP_PWM0_INTR_MAP = crate::Reg<app_pwm0_intr_map::APP_PWM0_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_PWM0_INTR_MAP"]
pub mod app_pwm0_intr_map;
#[doc = "APP_PWM1_INTR_MAP register accessor: an alias for `Reg<APP_PWM1_INTR_MAP_SPEC>`"]
pub type APP_PWM1_INTR_MAP = crate::Reg<app_pwm1_intr_map::APP_PWM1_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_PWM1_INTR_MAP"]
pub mod app_pwm1_intr_map;
#[doc = "APP_PWM2_INTR_MAP register accessor: an alias for `Reg<APP_PWM2_INTR_MAP_SPEC>`"]
pub type APP_PWM2_INTR_MAP = crate::Reg<app_pwm2_intr_map::APP_PWM2_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_PWM2_INTR_MAP"]
pub mod app_pwm2_intr_map;
#[doc = "APP_PWM3_INTR_MAP register accessor: an alias for `Reg<APP_PWM3_INTR_MAP_SPEC>`"]
pub type APP_PWM3_INTR_MAP = crate::Reg<app_pwm3_intr_map::APP_PWM3_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_PWM3_INTR_MAP"]
pub mod app_pwm3_intr_map;
#[doc = "APP_LEDC_INT_MAP register accessor: an alias for `Reg<APP_LEDC_INT_MAP_SPEC>`"]
pub type APP_LEDC_INT_MAP = crate::Reg<app_ledc_int_map::APP_LEDC_INT_MAP_SPEC>;
#[doc = "DPORT_APP_LEDC_INT_MAP"]
pub mod app_ledc_int_map;
#[doc = "APP_EFUSE_INT_MAP register accessor: an alias for `Reg<APP_EFUSE_INT_MAP_SPEC>`"]
pub type APP_EFUSE_INT_MAP = crate::Reg<app_efuse_int_map::APP_EFUSE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_EFUSE_INT_MAP"]
pub mod app_efuse_int_map;
#[doc = "APP_CAN_INT_MAP register accessor: an alias for `Reg<APP_CAN_INT_MAP_SPEC>`"]
pub type APP_CAN_INT_MAP = crate::Reg<app_can_int_map::APP_CAN_INT_MAP_SPEC>;
#[doc = "DPORT_APP_CAN_INT_MAP"]
pub mod app_can_int_map;
#[doc = "APP_RTC_CORE_INTR_MAP register accessor: an alias for `Reg<APP_RTC_CORE_INTR_MAP_SPEC>`"]
pub type APP_RTC_CORE_INTR_MAP = crate::Reg<app_rtc_core_intr_map::APP_RTC_CORE_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_RTC_CORE_INTR_MAP"]
pub mod app_rtc_core_intr_map;
#[doc = "APP_RMT_INTR_MAP register accessor: an alias for `Reg<APP_RMT_INTR_MAP_SPEC>`"]
pub type APP_RMT_INTR_MAP = crate::Reg<app_rmt_intr_map::APP_RMT_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_RMT_INTR_MAP"]
pub mod app_rmt_intr_map;
#[doc = "APP_PCNT_INTR_MAP register accessor: an alias for `Reg<APP_PCNT_INTR_MAP_SPEC>`"]
pub type APP_PCNT_INTR_MAP = crate::Reg<app_pcnt_intr_map::APP_PCNT_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_PCNT_INTR_MAP"]
pub mod app_pcnt_intr_map;
#[doc = "APP_I2C_EXT0_INTR_MAP register accessor: an alias for `Reg<APP_I2C_EXT0_INTR_MAP_SPEC>`"]
pub type APP_I2C_EXT0_INTR_MAP = crate::Reg<app_i2c_ext0_intr_map::APP_I2C_EXT0_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_I2C_EXT0_INTR_MAP"]
pub mod app_i2c_ext0_intr_map;
#[doc = "APP_I2C_EXT1_INTR_MAP register accessor: an alias for `Reg<APP_I2C_EXT1_INTR_MAP_SPEC>`"]
pub type APP_I2C_EXT1_INTR_MAP = crate::Reg<app_i2c_ext1_intr_map::APP_I2C_EXT1_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_I2C_EXT1_INTR_MAP"]
pub mod app_i2c_ext1_intr_map;
#[doc = "APP_RSA_INTR_MAP register accessor: an alias for `Reg<APP_RSA_INTR_MAP_SPEC>`"]
pub type APP_RSA_INTR_MAP = crate::Reg<app_rsa_intr_map::APP_RSA_INTR_MAP_SPEC>;
#[doc = "DPORT_APP_RSA_INTR_MAP"]
pub mod app_rsa_intr_map;
#[doc = "APP_SPI1_DMA_INT_MAP register accessor: an alias for `Reg<APP_SPI1_DMA_INT_MAP_SPEC>`"]
pub type APP_SPI1_DMA_INT_MAP = crate::Reg<app_spi1_dma_int_map::APP_SPI1_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_SPI1_DMA_INT_MAP"]
pub mod app_spi1_dma_int_map;
#[doc = "APP_SPI2_DMA_INT_MAP register accessor: an alias for `Reg<APP_SPI2_DMA_INT_MAP_SPEC>`"]
pub type APP_SPI2_DMA_INT_MAP = crate::Reg<app_spi2_dma_int_map::APP_SPI2_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_SPI2_DMA_INT_MAP"]
pub mod app_spi2_dma_int_map;
#[doc = "APP_SPI3_DMA_INT_MAP register accessor: an alias for `Reg<APP_SPI3_DMA_INT_MAP_SPEC>`"]
pub type APP_SPI3_DMA_INT_MAP = crate::Reg<app_spi3_dma_int_map::APP_SPI3_DMA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_SPI3_DMA_INT_MAP"]
pub mod app_spi3_dma_int_map;
#[doc = "APP_WDG_INT_MAP register accessor: an alias for `Reg<APP_WDG_INT_MAP_SPEC>`"]
pub type APP_WDG_INT_MAP = crate::Reg<app_wdg_int_map::APP_WDG_INT_MAP_SPEC>;
#[doc = "DPORT_APP_WDG_INT_MAP"]
pub mod app_wdg_int_map;
#[doc = "APP_TIMER_INT1_MAP register accessor: an alias for `Reg<APP_TIMER_INT1_MAP_SPEC>`"]
pub type APP_TIMER_INT1_MAP = crate::Reg<app_timer_int1_map::APP_TIMER_INT1_MAP_SPEC>;
#[doc = "DPORT_APP_TIMER_INT1_MAP"]
pub mod app_timer_int1_map;
#[doc = "APP_TIMER_INT2_MAP register accessor: an alias for `Reg<APP_TIMER_INT2_MAP_SPEC>`"]
pub type APP_TIMER_INT2_MAP = crate::Reg<app_timer_int2_map::APP_TIMER_INT2_MAP_SPEC>;
#[doc = "DPORT_APP_TIMER_INT2_MAP"]
pub mod app_timer_int2_map;
#[doc = "APP_TG_T0_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG_T0_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG_T0_EDGE_INT_MAP = crate::Reg<app_tg_t0_edge_int_map::APP_TG_T0_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_T0_EDGE_INT_MAP"]
pub mod app_tg_t0_edge_int_map;
#[doc = "APP_TG_T1_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG_T1_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG_T1_EDGE_INT_MAP = crate::Reg<app_tg_t1_edge_int_map::APP_TG_T1_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_T1_EDGE_INT_MAP"]
pub mod app_tg_t1_edge_int_map;
#[doc = "APP_TG_WDT_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG_WDT_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG_WDT_EDGE_INT_MAP =
    crate::Reg<app_tg_wdt_edge_int_map::APP_TG_WDT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_WDT_EDGE_INT_MAP"]
pub mod app_tg_wdt_edge_int_map;
#[doc = "APP_TG_LACT_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG_LACT_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG_LACT_EDGE_INT_MAP =
    crate::Reg<app_tg_lact_edge_int_map::APP_TG_LACT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG_LACT_EDGE_INT_MAP"]
pub mod app_tg_lact_edge_int_map;
#[doc = "APP_TG1_T0_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG1_T0_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG1_T0_EDGE_INT_MAP =
    crate::Reg<app_tg1_t0_edge_int_map::APP_TG1_T0_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_T0_EDGE_INT_MAP"]
pub mod app_tg1_t0_edge_int_map;
#[doc = "APP_TG1_T1_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG1_T1_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG1_T1_EDGE_INT_MAP =
    crate::Reg<app_tg1_t1_edge_int_map::APP_TG1_T1_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_T1_EDGE_INT_MAP"]
pub mod app_tg1_t1_edge_int_map;
#[doc = "APP_TG1_WDT_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG1_WDT_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG1_WDT_EDGE_INT_MAP =
    crate::Reg<app_tg1_wdt_edge_int_map::APP_TG1_WDT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_WDT_EDGE_INT_MAP"]
pub mod app_tg1_wdt_edge_int_map;
#[doc = "APP_TG1_LACT_EDGE_INT_MAP register accessor: an alias for `Reg<APP_TG1_LACT_EDGE_INT_MAP_SPEC>`"]
pub type APP_TG1_LACT_EDGE_INT_MAP =
    crate::Reg<app_tg1_lact_edge_int_map::APP_TG1_LACT_EDGE_INT_MAP_SPEC>;
#[doc = "DPORT_APP_TG1_LACT_EDGE_INT_MAP"]
pub mod app_tg1_lact_edge_int_map;
#[doc = "APP_MMU_IA_INT_MAP register accessor: an alias for `Reg<APP_MMU_IA_INT_MAP_SPEC>`"]
pub type APP_MMU_IA_INT_MAP = crate::Reg<app_mmu_ia_int_map::APP_MMU_IA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_MMU_IA_INT_MAP"]
pub mod app_mmu_ia_int_map;
#[doc = "APP_MPU_IA_INT_MAP register accessor: an alias for `Reg<APP_MPU_IA_INT_MAP_SPEC>`"]
pub type APP_MPU_IA_INT_MAP = crate::Reg<app_mpu_ia_int_map::APP_MPU_IA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_MPU_IA_INT_MAP"]
pub mod app_mpu_ia_int_map;
#[doc = "APP_CACHE_IA_INT_MAP register accessor: an alias for `Reg<APP_CACHE_IA_INT_MAP_SPEC>`"]
pub type APP_CACHE_IA_INT_MAP = crate::Reg<app_cache_ia_int_map::APP_CACHE_IA_INT_MAP_SPEC>;
#[doc = "DPORT_APP_CACHE_IA_INT_MAP"]
pub mod app_cache_ia_int_map;
#[doc = "AHBLITE_MPU_TABLE_UART register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_UART_SPEC>`"]
pub type AHBLITE_MPU_TABLE_UART = crate::Reg<ahblite_mpu_table_uart::AHBLITE_MPU_TABLE_UART_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_UART"]
pub mod ahblite_mpu_table_uart;
#[doc = "AHBLITE_MPU_TABLE_SPI1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SPI1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SPI1 = crate::Reg<ahblite_mpu_table_spi1::AHBLITE_MPU_TABLE_SPI1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SPI1"]
pub mod ahblite_mpu_table_spi1;
#[doc = "AHBLITE_MPU_TABLE_SPI0 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SPI0_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SPI0 = crate::Reg<ahblite_mpu_table_spi0::AHBLITE_MPU_TABLE_SPI0_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SPI0"]
pub mod ahblite_mpu_table_spi0;
#[doc = "AHBLITE_MPU_TABLE_GPIO register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_GPIO_SPEC>`"]
pub type AHBLITE_MPU_TABLE_GPIO = crate::Reg<ahblite_mpu_table_gpio::AHBLITE_MPU_TABLE_GPIO_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_GPIO"]
pub mod ahblite_mpu_table_gpio;
#[doc = "AHBLITE_MPU_TABLE_FE2 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_FE2_SPEC>`"]
pub type AHBLITE_MPU_TABLE_FE2 = crate::Reg<ahblite_mpu_table_fe2::AHBLITE_MPU_TABLE_FE2_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_FE2"]
pub mod ahblite_mpu_table_fe2;
#[doc = "AHBLITE_MPU_TABLE_FE register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_FE_SPEC>`"]
pub type AHBLITE_MPU_TABLE_FE = crate::Reg<ahblite_mpu_table_fe::AHBLITE_MPU_TABLE_FE_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_FE"]
pub mod ahblite_mpu_table_fe;
#[doc = "AHBLITE_MPU_TABLE_TIMER register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_TIMER_SPEC>`"]
pub type AHBLITE_MPU_TABLE_TIMER =
    crate::Reg<ahblite_mpu_table_timer::AHBLITE_MPU_TABLE_TIMER_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_TIMER"]
pub mod ahblite_mpu_table_timer;
#[doc = "AHBLITE_MPU_TABLE_RTC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_RTC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_RTC = crate::Reg<ahblite_mpu_table_rtc::AHBLITE_MPU_TABLE_RTC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_RTC"]
pub mod ahblite_mpu_table_rtc;
#[doc = "AHBLITE_MPU_TABLE_IO_MUX register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_IO_MUX_SPEC>`"]
pub type AHBLITE_MPU_TABLE_IO_MUX =
    crate::Reg<ahblite_mpu_table_io_mux::AHBLITE_MPU_TABLE_IO_MUX_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_IO_MUX"]
pub mod ahblite_mpu_table_io_mux;
#[doc = "AHBLITE_MPU_TABLE_WDG register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_WDG_SPEC>`"]
pub type AHBLITE_MPU_TABLE_WDG = crate::Reg<ahblite_mpu_table_wdg::AHBLITE_MPU_TABLE_WDG_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_WDG"]
pub mod ahblite_mpu_table_wdg;
#[doc = "AHBLITE_MPU_TABLE_HINF register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_HINF_SPEC>`"]
pub type AHBLITE_MPU_TABLE_HINF = crate::Reg<ahblite_mpu_table_hinf::AHBLITE_MPU_TABLE_HINF_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_HINF"]
pub mod ahblite_mpu_table_hinf;
#[doc = "AHBLITE_MPU_TABLE_UHCI1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_UHCI1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_UHCI1 =
    crate::Reg<ahblite_mpu_table_uhci1::AHBLITE_MPU_TABLE_UHCI1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_UHCI1"]
pub mod ahblite_mpu_table_uhci1;
#[doc = "AHBLITE_MPU_TABLE_MISC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_MISC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_MISC = crate::Reg<ahblite_mpu_table_misc::AHBLITE_MPU_TABLE_MISC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_MISC"]
pub mod ahblite_mpu_table_misc;
#[doc = "AHBLITE_MPU_TABLE_I2C register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_I2C_SPEC>`"]
pub type AHBLITE_MPU_TABLE_I2C = crate::Reg<ahblite_mpu_table_i2c::AHBLITE_MPU_TABLE_I2C_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_I2C"]
pub mod ahblite_mpu_table_i2c;
#[doc = "AHBLITE_MPU_TABLE_I2S0 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_I2S0_SPEC>`"]
pub type AHBLITE_MPU_TABLE_I2S0 = crate::Reg<ahblite_mpu_table_i2s0::AHBLITE_MPU_TABLE_I2S0_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_I2S0"]
pub mod ahblite_mpu_table_i2s0;
#[doc = "AHBLITE_MPU_TABLE_UART1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_UART1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_UART1 =
    crate::Reg<ahblite_mpu_table_uart1::AHBLITE_MPU_TABLE_UART1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_UART1"]
pub mod ahblite_mpu_table_uart1;
#[doc = "AHBLITE_MPU_TABLE_BT register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_BT_SPEC>`"]
pub type AHBLITE_MPU_TABLE_BT = crate::Reg<ahblite_mpu_table_bt::AHBLITE_MPU_TABLE_BT_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_BT"]
pub mod ahblite_mpu_table_bt;
#[doc = "AHBLITE_MPU_TABLE_BT_BUFFER register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_BT_BUFFER_SPEC>`"]
pub type AHBLITE_MPU_TABLE_BT_BUFFER =
    crate::Reg<ahblite_mpu_table_bt_buffer::AHBLITE_MPU_TABLE_BT_BUFFER_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_BT_BUFFER"]
pub mod ahblite_mpu_table_bt_buffer;
#[doc = "AHBLITE_MPU_TABLE_I2C_EXT0 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_I2C_EXT0_SPEC>`"]
pub type AHBLITE_MPU_TABLE_I2C_EXT0 =
    crate::Reg<ahblite_mpu_table_i2c_ext0::AHBLITE_MPU_TABLE_I2C_EXT0_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_I2C_EXT0"]
pub mod ahblite_mpu_table_i2c_ext0;
#[doc = "AHBLITE_MPU_TABLE_UHCI0 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_UHCI0_SPEC>`"]
pub type AHBLITE_MPU_TABLE_UHCI0 =
    crate::Reg<ahblite_mpu_table_uhci0::AHBLITE_MPU_TABLE_UHCI0_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_UHCI0"]
pub mod ahblite_mpu_table_uhci0;
#[doc = "AHBLITE_MPU_TABLE_SLCHOST register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SLCHOST_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SLCHOST =
    crate::Reg<ahblite_mpu_table_slchost::AHBLITE_MPU_TABLE_SLCHOST_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SLCHOST"]
pub mod ahblite_mpu_table_slchost;
#[doc = "AHBLITE_MPU_TABLE_RMT register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_RMT_SPEC>`"]
pub type AHBLITE_MPU_TABLE_RMT = crate::Reg<ahblite_mpu_table_rmt::AHBLITE_MPU_TABLE_RMT_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_RMT"]
pub mod ahblite_mpu_table_rmt;
#[doc = "AHBLITE_MPU_TABLE_PCNT register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PCNT_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PCNT = crate::Reg<ahblite_mpu_table_pcnt::AHBLITE_MPU_TABLE_PCNT_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PCNT"]
pub mod ahblite_mpu_table_pcnt;
#[doc = "AHBLITE_MPU_TABLE_SLC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SLC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SLC = crate::Reg<ahblite_mpu_table_slc::AHBLITE_MPU_TABLE_SLC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SLC"]
pub mod ahblite_mpu_table_slc;
#[doc = "AHBLITE_MPU_TABLE_LEDC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_LEDC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_LEDC = crate::Reg<ahblite_mpu_table_ledc::AHBLITE_MPU_TABLE_LEDC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_LEDC"]
pub mod ahblite_mpu_table_ledc;
#[doc = "AHBLITE_MPU_TABLE_EFUSE register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_EFUSE_SPEC>`"]
pub type AHBLITE_MPU_TABLE_EFUSE =
    crate::Reg<ahblite_mpu_table_efuse::AHBLITE_MPU_TABLE_EFUSE_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_EFUSE"]
pub mod ahblite_mpu_table_efuse;
#[doc = "AHBLITE_MPU_TABLE_SPI_ENCRYPT register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SPI_ENCRYPT_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SPI_ENCRYPT =
    crate::Reg<ahblite_mpu_table_spi_encrypt::AHBLITE_MPU_TABLE_SPI_ENCRYPT_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SPI_ENCRYPT"]
pub mod ahblite_mpu_table_spi_encrypt;
#[doc = "AHBLITE_MPU_TABLE_BB register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_BB_SPEC>`"]
pub type AHBLITE_MPU_TABLE_BB = crate::Reg<ahblite_mpu_table_bb::AHBLITE_MPU_TABLE_BB_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_BB"]
pub mod ahblite_mpu_table_bb;
#[doc = "AHBLITE_MPU_TABLE_PWM0 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PWM0_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PWM0 = crate::Reg<ahblite_mpu_table_pwm0::AHBLITE_MPU_TABLE_PWM0_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PWM0"]
pub mod ahblite_mpu_table_pwm0;
#[doc = "AHBLITE_MPU_TABLE_TIMERGROUP register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_TIMERGROUP_SPEC>`"]
pub type AHBLITE_MPU_TABLE_TIMERGROUP =
    crate::Reg<ahblite_mpu_table_timergroup::AHBLITE_MPU_TABLE_TIMERGROUP_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_TIMERGROUP"]
pub mod ahblite_mpu_table_timergroup;
#[doc = "AHBLITE_MPU_TABLE_TIMERGROUP1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_TIMERGROUP1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_TIMERGROUP1 =
    crate::Reg<ahblite_mpu_table_timergroup1::AHBLITE_MPU_TABLE_TIMERGROUP1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_TIMERGROUP1"]
pub mod ahblite_mpu_table_timergroup1;
#[doc = "AHBLITE_MPU_TABLE_SPI2 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SPI2_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SPI2 = crate::Reg<ahblite_mpu_table_spi2::AHBLITE_MPU_TABLE_SPI2_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SPI2"]
pub mod ahblite_mpu_table_spi2;
#[doc = "AHBLITE_MPU_TABLE_SPI3 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SPI3_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SPI3 = crate::Reg<ahblite_mpu_table_spi3::AHBLITE_MPU_TABLE_SPI3_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SPI3"]
pub mod ahblite_mpu_table_spi3;
#[doc = "AHBLITE_MPU_TABLE_APB_CTRL register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_APB_CTRL_SPEC>`"]
pub type AHBLITE_MPU_TABLE_APB_CTRL =
    crate::Reg<ahblite_mpu_table_apb_ctrl::AHBLITE_MPU_TABLE_APB_CTRL_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_APB_CTRL"]
pub mod ahblite_mpu_table_apb_ctrl;
#[doc = "AHBLITE_MPU_TABLE_I2C_EXT1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_I2C_EXT1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_I2C_EXT1 =
    crate::Reg<ahblite_mpu_table_i2c_ext1::AHBLITE_MPU_TABLE_I2C_EXT1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_I2C_EXT1"]
pub mod ahblite_mpu_table_i2c_ext1;
#[doc = "AHBLITE_MPU_TABLE_SDIO_HOST register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_SDIO_HOST_SPEC>`"]
pub type AHBLITE_MPU_TABLE_SDIO_HOST =
    crate::Reg<ahblite_mpu_table_sdio_host::AHBLITE_MPU_TABLE_SDIO_HOST_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_SDIO_HOST"]
pub mod ahblite_mpu_table_sdio_host;
#[doc = "AHBLITE_MPU_TABLE_EMAC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_EMAC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_EMAC = crate::Reg<ahblite_mpu_table_emac::AHBLITE_MPU_TABLE_EMAC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_EMAC"]
pub mod ahblite_mpu_table_emac;
#[doc = "AHBLITE_MPU_TABLE_CAN register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_CAN_SPEC>`"]
pub type AHBLITE_MPU_TABLE_CAN = crate::Reg<ahblite_mpu_table_can::AHBLITE_MPU_TABLE_CAN_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_CAN"]
pub mod ahblite_mpu_table_can;
#[doc = "AHBLITE_MPU_TABLE_PWM1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PWM1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PWM1 = crate::Reg<ahblite_mpu_table_pwm1::AHBLITE_MPU_TABLE_PWM1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PWM1"]
pub mod ahblite_mpu_table_pwm1;
#[doc = "AHBLITE_MPU_TABLE_I2S1 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_I2S1_SPEC>`"]
pub type AHBLITE_MPU_TABLE_I2S1 = crate::Reg<ahblite_mpu_table_i2s1::AHBLITE_MPU_TABLE_I2S1_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_I2S1"]
pub mod ahblite_mpu_table_i2s1;
#[doc = "AHBLITE_MPU_TABLE_UART2 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_UART2_SPEC>`"]
pub type AHBLITE_MPU_TABLE_UART2 =
    crate::Reg<ahblite_mpu_table_uart2::AHBLITE_MPU_TABLE_UART2_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_UART2"]
pub mod ahblite_mpu_table_uart2;
#[doc = "AHBLITE_MPU_TABLE_PWM2 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PWM2_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PWM2 = crate::Reg<ahblite_mpu_table_pwm2::AHBLITE_MPU_TABLE_PWM2_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PWM2"]
pub mod ahblite_mpu_table_pwm2;
#[doc = "AHBLITE_MPU_TABLE_PWM3 register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PWM3_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PWM3 = crate::Reg<ahblite_mpu_table_pwm3::AHBLITE_MPU_TABLE_PWM3_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PWM3"]
pub mod ahblite_mpu_table_pwm3;
#[doc = "AHBLITE_MPU_TABLE_RWBT register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_RWBT_SPEC>`"]
pub type AHBLITE_MPU_TABLE_RWBT = crate::Reg<ahblite_mpu_table_rwbt::AHBLITE_MPU_TABLE_RWBT_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_RWBT"]
pub mod ahblite_mpu_table_rwbt;
#[doc = "AHBLITE_MPU_TABLE_BTMAC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_BTMAC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_BTMAC =
    crate::Reg<ahblite_mpu_table_btmac::AHBLITE_MPU_TABLE_BTMAC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_BTMAC"]
pub mod ahblite_mpu_table_btmac;
#[doc = "AHBLITE_MPU_TABLE_WIFIMAC register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_WIFIMAC_SPEC>`"]
pub type AHBLITE_MPU_TABLE_WIFIMAC =
    crate::Reg<ahblite_mpu_table_wifimac::AHBLITE_MPU_TABLE_WIFIMAC_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_WIFIMAC"]
pub mod ahblite_mpu_table_wifimac;
#[doc = "AHBLITE_MPU_TABLE_PWR register accessor: an alias for `Reg<AHBLITE_MPU_TABLE_PWR_SPEC>`"]
pub type AHBLITE_MPU_TABLE_PWR = crate::Reg<ahblite_mpu_table_pwr::AHBLITE_MPU_TABLE_PWR_SPEC>;
#[doc = "DPORT_AHBLITE_MPU_TABLE_PWR"]
pub mod ahblite_mpu_table_pwr;
#[doc = "MEM_ACCESS_DBUG0 register accessor: an alias for `Reg<MEM_ACCESS_DBUG0_SPEC>`"]
pub type MEM_ACCESS_DBUG0 = crate::Reg<mem_access_dbug0::MEM_ACCESS_DBUG0_SPEC>;
#[doc = "DPORT_MEM_ACCESS_DBUG0"]
pub mod mem_access_dbug0;
#[doc = "MEM_ACCESS_DBUG1 register accessor: an alias for `Reg<MEM_ACCESS_DBUG1_SPEC>`"]
pub type MEM_ACCESS_DBUG1 = crate::Reg<mem_access_dbug1::MEM_ACCESS_DBUG1_SPEC>;
#[doc = "DPORT_MEM_ACCESS_DBUG1"]
pub mod mem_access_dbug1;
#[doc = "PRO_DCACHE_DBUG0 register accessor: an alias for `Reg<PRO_DCACHE_DBUG0_SPEC>`"]
pub type PRO_DCACHE_DBUG0 = crate::Reg<pro_dcache_dbug0::PRO_DCACHE_DBUG0_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG0"]
pub mod pro_dcache_dbug0;
#[doc = "PRO_DCACHE_DBUG1 register accessor: an alias for `Reg<PRO_DCACHE_DBUG1_SPEC>`"]
pub type PRO_DCACHE_DBUG1 = crate::Reg<pro_dcache_dbug1::PRO_DCACHE_DBUG1_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG1"]
pub mod pro_dcache_dbug1;
#[doc = "PRO_DCACHE_DBUG2 register accessor: an alias for `Reg<PRO_DCACHE_DBUG2_SPEC>`"]
pub type PRO_DCACHE_DBUG2 = crate::Reg<pro_dcache_dbug2::PRO_DCACHE_DBUG2_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG2"]
pub mod pro_dcache_dbug2;
#[doc = "PRO_DCACHE_DBUG3 register accessor: an alias for `Reg<PRO_DCACHE_DBUG3_SPEC>`"]
pub type PRO_DCACHE_DBUG3 = crate::Reg<pro_dcache_dbug3::PRO_DCACHE_DBUG3_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG3"]
pub mod pro_dcache_dbug3;
#[doc = "PRO_DCACHE_DBUG4 register accessor: an alias for `Reg<PRO_DCACHE_DBUG4_SPEC>`"]
pub type PRO_DCACHE_DBUG4 = crate::Reg<pro_dcache_dbug4::PRO_DCACHE_DBUG4_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG4"]
pub mod pro_dcache_dbug4;
#[doc = "PRO_DCACHE_DBUG5 register accessor: an alias for `Reg<PRO_DCACHE_DBUG5_SPEC>`"]
pub type PRO_DCACHE_DBUG5 = crate::Reg<pro_dcache_dbug5::PRO_DCACHE_DBUG5_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG5"]
pub mod pro_dcache_dbug5;
#[doc = "PRO_DCACHE_DBUG6 register accessor: an alias for `Reg<PRO_DCACHE_DBUG6_SPEC>`"]
pub type PRO_DCACHE_DBUG6 = crate::Reg<pro_dcache_dbug6::PRO_DCACHE_DBUG6_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG6"]
pub mod pro_dcache_dbug6;
#[doc = "PRO_DCACHE_DBUG7 register accessor: an alias for `Reg<PRO_DCACHE_DBUG7_SPEC>`"]
pub type PRO_DCACHE_DBUG7 = crate::Reg<pro_dcache_dbug7::PRO_DCACHE_DBUG7_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG7"]
pub mod pro_dcache_dbug7;
#[doc = "PRO_DCACHE_DBUG8 register accessor: an alias for `Reg<PRO_DCACHE_DBUG8_SPEC>`"]
pub type PRO_DCACHE_DBUG8 = crate::Reg<pro_dcache_dbug8::PRO_DCACHE_DBUG8_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG8"]
pub mod pro_dcache_dbug8;
#[doc = "PRO_DCACHE_DBUG9 register accessor: an alias for `Reg<PRO_DCACHE_DBUG9_SPEC>`"]
pub type PRO_DCACHE_DBUG9 = crate::Reg<pro_dcache_dbug9::PRO_DCACHE_DBUG9_SPEC>;
#[doc = "DPORT_PRO_DCACHE_DBUG9"]
pub mod pro_dcache_dbug9;
#[doc = "APP_DCACHE_DBUG0 register accessor: an alias for `Reg<APP_DCACHE_DBUG0_SPEC>`"]
pub type APP_DCACHE_DBUG0 = crate::Reg<app_dcache_dbug0::APP_DCACHE_DBUG0_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG0"]
pub mod app_dcache_dbug0;
#[doc = "APP_DCACHE_DBUG1 register accessor: an alias for `Reg<APP_DCACHE_DBUG1_SPEC>`"]
pub type APP_DCACHE_DBUG1 = crate::Reg<app_dcache_dbug1::APP_DCACHE_DBUG1_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG1"]
pub mod app_dcache_dbug1;
#[doc = "APP_DCACHE_DBUG2 register accessor: an alias for `Reg<APP_DCACHE_DBUG2_SPEC>`"]
pub type APP_DCACHE_DBUG2 = crate::Reg<app_dcache_dbug2::APP_DCACHE_DBUG2_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG2"]
pub mod app_dcache_dbug2;
#[doc = "APP_DCACHE_DBUG3 register accessor: an alias for `Reg<APP_DCACHE_DBUG3_SPEC>`"]
pub type APP_DCACHE_DBUG3 = crate::Reg<app_dcache_dbug3::APP_DCACHE_DBUG3_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG3"]
pub mod app_dcache_dbug3;
#[doc = "APP_DCACHE_DBUG4 register accessor: an alias for `Reg<APP_DCACHE_DBUG4_SPEC>`"]
pub type APP_DCACHE_DBUG4 = crate::Reg<app_dcache_dbug4::APP_DCACHE_DBUG4_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG4"]
pub mod app_dcache_dbug4;
#[doc = "APP_DCACHE_DBUG5 register accessor: an alias for `Reg<APP_DCACHE_DBUG5_SPEC>`"]
pub type APP_DCACHE_DBUG5 = crate::Reg<app_dcache_dbug5::APP_DCACHE_DBUG5_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG5"]
pub mod app_dcache_dbug5;
#[doc = "APP_DCACHE_DBUG6 register accessor: an alias for `Reg<APP_DCACHE_DBUG6_SPEC>`"]
pub type APP_DCACHE_DBUG6 = crate::Reg<app_dcache_dbug6::APP_DCACHE_DBUG6_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG6"]
pub mod app_dcache_dbug6;
#[doc = "APP_DCACHE_DBUG7 register accessor: an alias for `Reg<APP_DCACHE_DBUG7_SPEC>`"]
pub type APP_DCACHE_DBUG7 = crate::Reg<app_dcache_dbug7::APP_DCACHE_DBUG7_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG7"]
pub mod app_dcache_dbug7;
#[doc = "APP_DCACHE_DBUG8 register accessor: an alias for `Reg<APP_DCACHE_DBUG8_SPEC>`"]
pub type APP_DCACHE_DBUG8 = crate::Reg<app_dcache_dbug8::APP_DCACHE_DBUG8_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG8"]
pub mod app_dcache_dbug8;
#[doc = "APP_DCACHE_DBUG9 register accessor: an alias for `Reg<APP_DCACHE_DBUG9_SPEC>`"]
pub type APP_DCACHE_DBUG9 = crate::Reg<app_dcache_dbug9::APP_DCACHE_DBUG9_SPEC>;
#[doc = "DPORT_APP_DCACHE_DBUG9"]
pub mod app_dcache_dbug9;
#[doc = "PRO_CPU_RECORD_CTRL register accessor: an alias for `Reg<PRO_CPU_RECORD_CTRL_SPEC>`"]
pub type PRO_CPU_RECORD_CTRL = crate::Reg<pro_cpu_record_ctrl::PRO_CPU_RECORD_CTRL_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_CTRL"]
pub mod pro_cpu_record_ctrl;
#[doc = "PRO_CPU_RECORD_STATUS register accessor: an alias for `Reg<PRO_CPU_RECORD_STATUS_SPEC>`"]
pub type PRO_CPU_RECORD_STATUS = crate::Reg<pro_cpu_record_status::PRO_CPU_RECORD_STATUS_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_STATUS"]
pub mod pro_cpu_record_status;
#[doc = "PRO_CPU_RECORD_PID register accessor: an alias for `Reg<PRO_CPU_RECORD_PID_SPEC>`"]
pub type PRO_CPU_RECORD_PID = crate::Reg<pro_cpu_record_pid::PRO_CPU_RECORD_PID_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PID"]
pub mod pro_cpu_record_pid;
#[doc = "PRO_CPU_RECORD_PDEBUGINST register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGINST_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGINST =
    crate::Reg<pro_cpu_record_pdebuginst::PRO_CPU_RECORD_PDEBUGINST_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGINST"]
pub mod pro_cpu_record_pdebuginst;
#[doc = "PRO_CPU_RECORD_PDEBUGSTATUS register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGSTATUS_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGSTATUS =
    crate::Reg<pro_cpu_record_pdebugstatus::PRO_CPU_RECORD_PDEBUGSTATUS_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGSTATUS"]
pub mod pro_cpu_record_pdebugstatus;
#[doc = "PRO_CPU_RECORD_PDEBUGDATA register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGDATA_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGDATA =
    crate::Reg<pro_cpu_record_pdebugdata::PRO_CPU_RECORD_PDEBUGDATA_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGDATA"]
pub mod pro_cpu_record_pdebugdata;
#[doc = "PRO_CPU_RECORD_PDEBUGPC register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGPC_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGPC =
    crate::Reg<pro_cpu_record_pdebugpc::PRO_CPU_RECORD_PDEBUGPC_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGPC"]
pub mod pro_cpu_record_pdebugpc;
#[doc = "PRO_CPU_RECORD_PDEBUGLS0STAT register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGLS0STAT_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGLS0STAT =
    crate::Reg<pro_cpu_record_pdebugls0stat::PRO_CPU_RECORD_PDEBUGLS0STAT_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT"]
pub mod pro_cpu_record_pdebugls0stat;
#[doc = "PRO_CPU_RECORD_PDEBUGLS0ADDR register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGLS0ADDR_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGLS0ADDR =
    crate::Reg<pro_cpu_record_pdebugls0addr::PRO_CPU_RECORD_PDEBUGLS0ADDR_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR"]
pub mod pro_cpu_record_pdebugls0addr;
#[doc = "PRO_CPU_RECORD_PDEBUGLS0DATA register accessor: an alias for `Reg<PRO_CPU_RECORD_PDEBUGLS0DATA_SPEC>`"]
pub type PRO_CPU_RECORD_PDEBUGLS0DATA =
    crate::Reg<pro_cpu_record_pdebugls0data::PRO_CPU_RECORD_PDEBUGLS0DATA_SPEC>;
#[doc = "DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA"]
pub mod pro_cpu_record_pdebugls0data;
#[doc = "APP_CPU_RECORD_CTRL register accessor: an alias for `Reg<APP_CPU_RECORD_CTRL_SPEC>`"]
pub type APP_CPU_RECORD_CTRL = crate::Reg<app_cpu_record_ctrl::APP_CPU_RECORD_CTRL_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_CTRL"]
pub mod app_cpu_record_ctrl;
#[doc = "APP_CPU_RECORD_STATUS register accessor: an alias for `Reg<APP_CPU_RECORD_STATUS_SPEC>`"]
pub type APP_CPU_RECORD_STATUS = crate::Reg<app_cpu_record_status::APP_CPU_RECORD_STATUS_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_STATUS"]
pub mod app_cpu_record_status;
#[doc = "APP_CPU_RECORD_PID register accessor: an alias for `Reg<APP_CPU_RECORD_PID_SPEC>`"]
pub type APP_CPU_RECORD_PID = crate::Reg<app_cpu_record_pid::APP_CPU_RECORD_PID_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PID"]
pub mod app_cpu_record_pid;
#[doc = "APP_CPU_RECORD_PDEBUGINST register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGINST_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGINST =
    crate::Reg<app_cpu_record_pdebuginst::APP_CPU_RECORD_PDEBUGINST_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGINST"]
pub mod app_cpu_record_pdebuginst;
#[doc = "APP_CPU_RECORD_PDEBUGSTATUS register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGSTATUS_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGSTATUS =
    crate::Reg<app_cpu_record_pdebugstatus::APP_CPU_RECORD_PDEBUGSTATUS_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGSTATUS"]
pub mod app_cpu_record_pdebugstatus;
#[doc = "APP_CPU_RECORD_PDEBUGDATA register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGDATA_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGDATA =
    crate::Reg<app_cpu_record_pdebugdata::APP_CPU_RECORD_PDEBUGDATA_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGDATA"]
pub mod app_cpu_record_pdebugdata;
#[doc = "APP_CPU_RECORD_PDEBUGPC register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGPC_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGPC =
    crate::Reg<app_cpu_record_pdebugpc::APP_CPU_RECORD_PDEBUGPC_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGPC"]
pub mod app_cpu_record_pdebugpc;
#[doc = "APP_CPU_RECORD_PDEBUGLS0STAT register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGLS0STAT_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGLS0STAT =
    crate::Reg<app_cpu_record_pdebugls0stat::APP_CPU_RECORD_PDEBUGLS0STAT_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGLS0STAT"]
pub mod app_cpu_record_pdebugls0stat;
#[doc = "APP_CPU_RECORD_PDEBUGLS0ADDR register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGLS0ADDR_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGLS0ADDR =
    crate::Reg<app_cpu_record_pdebugls0addr::APP_CPU_RECORD_PDEBUGLS0ADDR_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGLS0ADDR"]
pub mod app_cpu_record_pdebugls0addr;
#[doc = "APP_CPU_RECORD_PDEBUGLS0DATA register accessor: an alias for `Reg<APP_CPU_RECORD_PDEBUGLS0DATA_SPEC>`"]
pub type APP_CPU_RECORD_PDEBUGLS0DATA =
    crate::Reg<app_cpu_record_pdebugls0data::APP_CPU_RECORD_PDEBUGLS0DATA_SPEC>;
#[doc = "DPORT_APP_CPU_RECORD_PDEBUGLS0DATA"]
pub mod app_cpu_record_pdebugls0data;
#[doc = "RSA_PD_CTRL register accessor: an alias for `Reg<RSA_PD_CTRL_SPEC>`"]
pub type RSA_PD_CTRL = crate::Reg<rsa_pd_ctrl::RSA_PD_CTRL_SPEC>;
#[doc = "DPORT_RSA_PD_CTRL"]
pub mod rsa_pd_ctrl;
#[doc = "ROM_MPU_TABLE0 register accessor: an alias for `Reg<ROM_MPU_TABLE0_SPEC>`"]
pub type ROM_MPU_TABLE0 = crate::Reg<rom_mpu_table0::ROM_MPU_TABLE0_SPEC>;
#[doc = "DPORT_ROM_MPU_TABLE0"]
pub mod rom_mpu_table0;
#[doc = "ROM_MPU_TABLE1 register accessor: an alias for `Reg<ROM_MPU_TABLE1_SPEC>`"]
pub type ROM_MPU_TABLE1 = crate::Reg<rom_mpu_table1::ROM_MPU_TABLE1_SPEC>;
#[doc = "DPORT_ROM_MPU_TABLE1"]
pub mod rom_mpu_table1;
#[doc = "ROM_MPU_TABLE2 register accessor: an alias for `Reg<ROM_MPU_TABLE2_SPEC>`"]
pub type ROM_MPU_TABLE2 = crate::Reg<rom_mpu_table2::ROM_MPU_TABLE2_SPEC>;
#[doc = "DPORT_ROM_MPU_TABLE2"]
pub mod rom_mpu_table2;
#[doc = "ROM_MPU_TABLE3 register accessor: an alias for `Reg<ROM_MPU_TABLE3_SPEC>`"]
pub type ROM_MPU_TABLE3 = crate::Reg<rom_mpu_table3::ROM_MPU_TABLE3_SPEC>;
#[doc = "DPORT_ROM_MPU_TABLE3"]
pub mod rom_mpu_table3;
#[doc = "SHROM_MPU_TABLE0 register accessor: an alias for `Reg<SHROM_MPU_TABLE0_SPEC>`"]
pub type SHROM_MPU_TABLE0 = crate::Reg<shrom_mpu_table0::SHROM_MPU_TABLE0_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE0"]
pub mod shrom_mpu_table0;
#[doc = "SHROM_MPU_TABLE1 register accessor: an alias for `Reg<SHROM_MPU_TABLE1_SPEC>`"]
pub type SHROM_MPU_TABLE1 = crate::Reg<shrom_mpu_table1::SHROM_MPU_TABLE1_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE1"]
pub mod shrom_mpu_table1;
#[doc = "SHROM_MPU_TABLE2 register accessor: an alias for `Reg<SHROM_MPU_TABLE2_SPEC>`"]
pub type SHROM_MPU_TABLE2 = crate::Reg<shrom_mpu_table2::SHROM_MPU_TABLE2_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE2"]
pub mod shrom_mpu_table2;
#[doc = "SHROM_MPU_TABLE3 register accessor: an alias for `Reg<SHROM_MPU_TABLE3_SPEC>`"]
pub type SHROM_MPU_TABLE3 = crate::Reg<shrom_mpu_table3::SHROM_MPU_TABLE3_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE3"]
pub mod shrom_mpu_table3;
#[doc = "SHROM_MPU_TABLE4 register accessor: an alias for `Reg<SHROM_MPU_TABLE4_SPEC>`"]
pub type SHROM_MPU_TABLE4 = crate::Reg<shrom_mpu_table4::SHROM_MPU_TABLE4_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE4"]
pub mod shrom_mpu_table4;
#[doc = "SHROM_MPU_TABLE5 register accessor: an alias for `Reg<SHROM_MPU_TABLE5_SPEC>`"]
pub type SHROM_MPU_TABLE5 = crate::Reg<shrom_mpu_table5::SHROM_MPU_TABLE5_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE5"]
pub mod shrom_mpu_table5;
#[doc = "SHROM_MPU_TABLE6 register accessor: an alias for `Reg<SHROM_MPU_TABLE6_SPEC>`"]
pub type SHROM_MPU_TABLE6 = crate::Reg<shrom_mpu_table6::SHROM_MPU_TABLE6_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE6"]
pub mod shrom_mpu_table6;
#[doc = "SHROM_MPU_TABLE7 register accessor: an alias for `Reg<SHROM_MPU_TABLE7_SPEC>`"]
pub type SHROM_MPU_TABLE7 = crate::Reg<shrom_mpu_table7::SHROM_MPU_TABLE7_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE7"]
pub mod shrom_mpu_table7;
#[doc = "SHROM_MPU_TABLE8 register accessor: an alias for `Reg<SHROM_MPU_TABLE8_SPEC>`"]
pub type SHROM_MPU_TABLE8 = crate::Reg<shrom_mpu_table8::SHROM_MPU_TABLE8_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE8"]
pub mod shrom_mpu_table8;
#[doc = "SHROM_MPU_TABLE9 register accessor: an alias for `Reg<SHROM_MPU_TABLE9_SPEC>`"]
pub type SHROM_MPU_TABLE9 = crate::Reg<shrom_mpu_table9::SHROM_MPU_TABLE9_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE9"]
pub mod shrom_mpu_table9;
#[doc = "SHROM_MPU_TABLE10 register accessor: an alias for `Reg<SHROM_MPU_TABLE10_SPEC>`"]
pub type SHROM_MPU_TABLE10 = crate::Reg<shrom_mpu_table10::SHROM_MPU_TABLE10_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE10"]
pub mod shrom_mpu_table10;
#[doc = "SHROM_MPU_TABLE11 register accessor: an alias for `Reg<SHROM_MPU_TABLE11_SPEC>`"]
pub type SHROM_MPU_TABLE11 = crate::Reg<shrom_mpu_table11::SHROM_MPU_TABLE11_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE11"]
pub mod shrom_mpu_table11;
#[doc = "SHROM_MPU_TABLE12 register accessor: an alias for `Reg<SHROM_MPU_TABLE12_SPEC>`"]
pub type SHROM_MPU_TABLE12 = crate::Reg<shrom_mpu_table12::SHROM_MPU_TABLE12_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE12"]
pub mod shrom_mpu_table12;
#[doc = "SHROM_MPU_TABLE13 register accessor: an alias for `Reg<SHROM_MPU_TABLE13_SPEC>`"]
pub type SHROM_MPU_TABLE13 = crate::Reg<shrom_mpu_table13::SHROM_MPU_TABLE13_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE13"]
pub mod shrom_mpu_table13;
#[doc = "SHROM_MPU_TABLE14 register accessor: an alias for `Reg<SHROM_MPU_TABLE14_SPEC>`"]
pub type SHROM_MPU_TABLE14 = crate::Reg<shrom_mpu_table14::SHROM_MPU_TABLE14_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE14"]
pub mod shrom_mpu_table14;
#[doc = "SHROM_MPU_TABLE15 register accessor: an alias for `Reg<SHROM_MPU_TABLE15_SPEC>`"]
pub type SHROM_MPU_TABLE15 = crate::Reg<shrom_mpu_table15::SHROM_MPU_TABLE15_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE15"]
pub mod shrom_mpu_table15;
#[doc = "SHROM_MPU_TABLE16 register accessor: an alias for `Reg<SHROM_MPU_TABLE16_SPEC>`"]
pub type SHROM_MPU_TABLE16 = crate::Reg<shrom_mpu_table16::SHROM_MPU_TABLE16_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE16"]
pub mod shrom_mpu_table16;
#[doc = "SHROM_MPU_TABLE17 register accessor: an alias for `Reg<SHROM_MPU_TABLE17_SPEC>`"]
pub type SHROM_MPU_TABLE17 = crate::Reg<shrom_mpu_table17::SHROM_MPU_TABLE17_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE17"]
pub mod shrom_mpu_table17;
#[doc = "SHROM_MPU_TABLE18 register accessor: an alias for `Reg<SHROM_MPU_TABLE18_SPEC>`"]
pub type SHROM_MPU_TABLE18 = crate::Reg<shrom_mpu_table18::SHROM_MPU_TABLE18_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE18"]
pub mod shrom_mpu_table18;
#[doc = "SHROM_MPU_TABLE19 register accessor: an alias for `Reg<SHROM_MPU_TABLE19_SPEC>`"]
pub type SHROM_MPU_TABLE19 = crate::Reg<shrom_mpu_table19::SHROM_MPU_TABLE19_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE19"]
pub mod shrom_mpu_table19;
#[doc = "SHROM_MPU_TABLE20 register accessor: an alias for `Reg<SHROM_MPU_TABLE20_SPEC>`"]
pub type SHROM_MPU_TABLE20 = crate::Reg<shrom_mpu_table20::SHROM_MPU_TABLE20_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE20"]
pub mod shrom_mpu_table20;
#[doc = "SHROM_MPU_TABLE21 register accessor: an alias for `Reg<SHROM_MPU_TABLE21_SPEC>`"]
pub type SHROM_MPU_TABLE21 = crate::Reg<shrom_mpu_table21::SHROM_MPU_TABLE21_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE21"]
pub mod shrom_mpu_table21;
#[doc = "SHROM_MPU_TABLE22 register accessor: an alias for `Reg<SHROM_MPU_TABLE22_SPEC>`"]
pub type SHROM_MPU_TABLE22 = crate::Reg<shrom_mpu_table22::SHROM_MPU_TABLE22_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE22"]
pub mod shrom_mpu_table22;
#[doc = "SHROM_MPU_TABLE23 register accessor: an alias for `Reg<SHROM_MPU_TABLE23_SPEC>`"]
pub type SHROM_MPU_TABLE23 = crate::Reg<shrom_mpu_table23::SHROM_MPU_TABLE23_SPEC>;
#[doc = "DPORT_SHROM_MPU_TABLE23"]
pub mod shrom_mpu_table23;
#[doc = "IMMU_TABLE0 register accessor: an alias for `Reg<IMMU_TABLE0_SPEC>`"]
pub type IMMU_TABLE0 = crate::Reg<immu_table0::IMMU_TABLE0_SPEC>;
#[doc = "DPORT_IMMU_TABLE0"]
pub mod immu_table0;
#[doc = "IMMU_TABLE1 register accessor: an alias for `Reg<IMMU_TABLE1_SPEC>`"]
pub type IMMU_TABLE1 = crate::Reg<immu_table1::IMMU_TABLE1_SPEC>;
#[doc = "DPORT_IMMU_TABLE1"]
pub mod immu_table1;
#[doc = "IMMU_TABLE2 register accessor: an alias for `Reg<IMMU_TABLE2_SPEC>`"]
pub type IMMU_TABLE2 = crate::Reg<immu_table2::IMMU_TABLE2_SPEC>;
#[doc = "DPORT_IMMU_TABLE2"]
pub mod immu_table2;
#[doc = "IMMU_TABLE3 register accessor: an alias for `Reg<IMMU_TABLE3_SPEC>`"]
pub type IMMU_TABLE3 = crate::Reg<immu_table3::IMMU_TABLE3_SPEC>;
#[doc = "DPORT_IMMU_TABLE3"]
pub mod immu_table3;
#[doc = "IMMU_TABLE4 register accessor: an alias for `Reg<IMMU_TABLE4_SPEC>`"]
pub type IMMU_TABLE4 = crate::Reg<immu_table4::IMMU_TABLE4_SPEC>;
#[doc = "DPORT_IMMU_TABLE4"]
pub mod immu_table4;
#[doc = "IMMU_TABLE5 register accessor: an alias for `Reg<IMMU_TABLE5_SPEC>`"]
pub type IMMU_TABLE5 = crate::Reg<immu_table5::IMMU_TABLE5_SPEC>;
#[doc = "DPORT_IMMU_TABLE5"]
pub mod immu_table5;
#[doc = "IMMU_TABLE6 register accessor: an alias for `Reg<IMMU_TABLE6_SPEC>`"]
pub type IMMU_TABLE6 = crate::Reg<immu_table6::IMMU_TABLE6_SPEC>;
#[doc = "DPORT_IMMU_TABLE6"]
pub mod immu_table6;
#[doc = "IMMU_TABLE7 register accessor: an alias for `Reg<IMMU_TABLE7_SPEC>`"]
pub type IMMU_TABLE7 = crate::Reg<immu_table7::IMMU_TABLE7_SPEC>;
#[doc = "DPORT_IMMU_TABLE7"]
pub mod immu_table7;
#[doc = "IMMU_TABLE8 register accessor: an alias for `Reg<IMMU_TABLE8_SPEC>`"]
pub type IMMU_TABLE8 = crate::Reg<immu_table8::IMMU_TABLE8_SPEC>;
#[doc = "DPORT_IMMU_TABLE8"]
pub mod immu_table8;
#[doc = "IMMU_TABLE9 register accessor: an alias for `Reg<IMMU_TABLE9_SPEC>`"]
pub type IMMU_TABLE9 = crate::Reg<immu_table9::IMMU_TABLE9_SPEC>;
#[doc = "DPORT_IMMU_TABLE9"]
pub mod immu_table9;
#[doc = "IMMU_TABLE10 register accessor: an alias for `Reg<IMMU_TABLE10_SPEC>`"]
pub type IMMU_TABLE10 = crate::Reg<immu_table10::IMMU_TABLE10_SPEC>;
#[doc = "DPORT_IMMU_TABLE10"]
pub mod immu_table10;
#[doc = "IMMU_TABLE11 register accessor: an alias for `Reg<IMMU_TABLE11_SPEC>`"]
pub type IMMU_TABLE11 = crate::Reg<immu_table11::IMMU_TABLE11_SPEC>;
#[doc = "DPORT_IMMU_TABLE11"]
pub mod immu_table11;
#[doc = "IMMU_TABLE12 register accessor: an alias for `Reg<IMMU_TABLE12_SPEC>`"]
pub type IMMU_TABLE12 = crate::Reg<immu_table12::IMMU_TABLE12_SPEC>;
#[doc = "DPORT_IMMU_TABLE12"]
pub mod immu_table12;
#[doc = "IMMU_TABLE13 register accessor: an alias for `Reg<IMMU_TABLE13_SPEC>`"]
pub type IMMU_TABLE13 = crate::Reg<immu_table13::IMMU_TABLE13_SPEC>;
#[doc = "DPORT_IMMU_TABLE13"]
pub mod immu_table13;
#[doc = "IMMU_TABLE14 register accessor: an alias for `Reg<IMMU_TABLE14_SPEC>`"]
pub type IMMU_TABLE14 = crate::Reg<immu_table14::IMMU_TABLE14_SPEC>;
#[doc = "DPORT_IMMU_TABLE14"]
pub mod immu_table14;
#[doc = "IMMU_TABLE15 register accessor: an alias for `Reg<IMMU_TABLE15_SPEC>`"]
pub type IMMU_TABLE15 = crate::Reg<immu_table15::IMMU_TABLE15_SPEC>;
#[doc = "DPORT_IMMU_TABLE15"]
pub mod immu_table15;
#[doc = "DMMU_TABLE0 register accessor: an alias for `Reg<DMMU_TABLE0_SPEC>`"]
pub type DMMU_TABLE0 = crate::Reg<dmmu_table0::DMMU_TABLE0_SPEC>;
#[doc = "DPORT_DMMU_TABLE0"]
pub mod dmmu_table0;
#[doc = "DMMU_TABLE1 register accessor: an alias for `Reg<DMMU_TABLE1_SPEC>`"]
pub type DMMU_TABLE1 = crate::Reg<dmmu_table1::DMMU_TABLE1_SPEC>;
#[doc = "DPORT_DMMU_TABLE1"]
pub mod dmmu_table1;
#[doc = "DMMU_TABLE2 register accessor: an alias for `Reg<DMMU_TABLE2_SPEC>`"]
pub type DMMU_TABLE2 = crate::Reg<dmmu_table2::DMMU_TABLE2_SPEC>;
#[doc = "DPORT_DMMU_TABLE2"]
pub mod dmmu_table2;
#[doc = "DMMU_TABLE3 register accessor: an alias for `Reg<DMMU_TABLE3_SPEC>`"]
pub type DMMU_TABLE3 = crate::Reg<dmmu_table3::DMMU_TABLE3_SPEC>;
#[doc = "DPORT_DMMU_TABLE3"]
pub mod dmmu_table3;
#[doc = "DMMU_TABLE4 register accessor: an alias for `Reg<DMMU_TABLE4_SPEC>`"]
pub type DMMU_TABLE4 = crate::Reg<dmmu_table4::DMMU_TABLE4_SPEC>;
#[doc = "DPORT_DMMU_TABLE4"]
pub mod dmmu_table4;
#[doc = "DMMU_TABLE5 register accessor: an alias for `Reg<DMMU_TABLE5_SPEC>`"]
pub type DMMU_TABLE5 = crate::Reg<dmmu_table5::DMMU_TABLE5_SPEC>;
#[doc = "DPORT_DMMU_TABLE5"]
pub mod dmmu_table5;
#[doc = "DMMU_TABLE6 register accessor: an alias for `Reg<DMMU_TABLE6_SPEC>`"]
pub type DMMU_TABLE6 = crate::Reg<dmmu_table6::DMMU_TABLE6_SPEC>;
#[doc = "DPORT_DMMU_TABLE6"]
pub mod dmmu_table6;
#[doc = "DMMU_TABLE7 register accessor: an alias for `Reg<DMMU_TABLE7_SPEC>`"]
pub type DMMU_TABLE7 = crate::Reg<dmmu_table7::DMMU_TABLE7_SPEC>;
#[doc = "DPORT_DMMU_TABLE7"]
pub mod dmmu_table7;
#[doc = "DMMU_TABLE8 register accessor: an alias for `Reg<DMMU_TABLE8_SPEC>`"]
pub type DMMU_TABLE8 = crate::Reg<dmmu_table8::DMMU_TABLE8_SPEC>;
#[doc = "DPORT_DMMU_TABLE8"]
pub mod dmmu_table8;
#[doc = "DMMU_TABLE9 register accessor: an alias for `Reg<DMMU_TABLE9_SPEC>`"]
pub type DMMU_TABLE9 = crate::Reg<dmmu_table9::DMMU_TABLE9_SPEC>;
#[doc = "DPORT_DMMU_TABLE9"]
pub mod dmmu_table9;
#[doc = "DMMU_TABLE10 register accessor: an alias for `Reg<DMMU_TABLE10_SPEC>`"]
pub type DMMU_TABLE10 = crate::Reg<dmmu_table10::DMMU_TABLE10_SPEC>;
#[doc = "DPORT_DMMU_TABLE10"]
pub mod dmmu_table10;
#[doc = "DMMU_TABLE11 register accessor: an alias for `Reg<DMMU_TABLE11_SPEC>`"]
pub type DMMU_TABLE11 = crate::Reg<dmmu_table11::DMMU_TABLE11_SPEC>;
#[doc = "DPORT_DMMU_TABLE11"]
pub mod dmmu_table11;
#[doc = "DMMU_TABLE12 register accessor: an alias for `Reg<DMMU_TABLE12_SPEC>`"]
pub type DMMU_TABLE12 = crate::Reg<dmmu_table12::DMMU_TABLE12_SPEC>;
#[doc = "DPORT_DMMU_TABLE12"]
pub mod dmmu_table12;
#[doc = "DMMU_TABLE13 register accessor: an alias for `Reg<DMMU_TABLE13_SPEC>`"]
pub type DMMU_TABLE13 = crate::Reg<dmmu_table13::DMMU_TABLE13_SPEC>;
#[doc = "DPORT_DMMU_TABLE13"]
pub mod dmmu_table13;
#[doc = "DMMU_TABLE14 register accessor: an alias for `Reg<DMMU_TABLE14_SPEC>`"]
pub type DMMU_TABLE14 = crate::Reg<dmmu_table14::DMMU_TABLE14_SPEC>;
#[doc = "DPORT_DMMU_TABLE14"]
pub mod dmmu_table14;
#[doc = "DMMU_TABLE15 register accessor: an alias for `Reg<DMMU_TABLE15_SPEC>`"]
pub type DMMU_TABLE15 = crate::Reg<dmmu_table15::DMMU_TABLE15_SPEC>;
#[doc = "DPORT_DMMU_TABLE15"]
pub mod dmmu_table15;
#[doc = "PRO_INTRUSION_CTRL register accessor: an alias for `Reg<PRO_INTRUSION_CTRL_SPEC>`"]
pub type PRO_INTRUSION_CTRL = crate::Reg<pro_intrusion_ctrl::PRO_INTRUSION_CTRL_SPEC>;
#[doc = "DPORT_PRO_INTRUSION_CTRL"]
pub mod pro_intrusion_ctrl;
#[doc = "PRO_INTRUSION_STATUS register accessor: an alias for `Reg<PRO_INTRUSION_STATUS_SPEC>`"]
pub type PRO_INTRUSION_STATUS = crate::Reg<pro_intrusion_status::PRO_INTRUSION_STATUS_SPEC>;
#[doc = "DPORT_PRO_INTRUSION_STATUS"]
pub mod pro_intrusion_status;
#[doc = "APP_INTRUSION_CTRL register accessor: an alias for `Reg<APP_INTRUSION_CTRL_SPEC>`"]
pub type APP_INTRUSION_CTRL = crate::Reg<app_intrusion_ctrl::APP_INTRUSION_CTRL_SPEC>;
#[doc = "DPORT_APP_INTRUSION_CTRL"]
pub mod app_intrusion_ctrl;
#[doc = "APP_INTRUSION_STATUS register accessor: an alias for `Reg<APP_INTRUSION_STATUS_SPEC>`"]
pub type APP_INTRUSION_STATUS = crate::Reg<app_intrusion_status::APP_INTRUSION_STATUS_SPEC>;
#[doc = "DPORT_APP_INTRUSION_STATUS"]
pub mod app_intrusion_status;
#[doc = "FRONT_END_MEM_PD register accessor: an alias for `Reg<FRONT_END_MEM_PD_SPEC>`"]
pub type FRONT_END_MEM_PD = crate::Reg<front_end_mem_pd::FRONT_END_MEM_PD_SPEC>;
#[doc = "DPORT_FRONT_END_MEM_PD"]
pub mod front_end_mem_pd;
#[doc = "MMU_IA_INT_EN register accessor: an alias for `Reg<MMU_IA_INT_EN_SPEC>`"]
pub type MMU_IA_INT_EN = crate::Reg<mmu_ia_int_en::MMU_IA_INT_EN_SPEC>;
#[doc = "DPORT_MMU_IA_INT_EN"]
pub mod mmu_ia_int_en;
#[doc = "MPU_IA_INT_EN register accessor: an alias for `Reg<MPU_IA_INT_EN_SPEC>`"]
pub type MPU_IA_INT_EN = crate::Reg<mpu_ia_int_en::MPU_IA_INT_EN_SPEC>;
#[doc = "DPORT_MPU_IA_INT_EN"]
pub mod mpu_ia_int_en;
#[doc = "CACHE_IA_INT_EN register accessor: an alias for `Reg<CACHE_IA_INT_EN_SPEC>`"]
pub type CACHE_IA_INT_EN = crate::Reg<cache_ia_int_en::CACHE_IA_INT_EN_SPEC>;
#[doc = "DPORT_CACHE_IA_INT_EN"]
pub mod cache_ia_int_en;
#[doc = "SECURE_BOOT_CTRL register accessor: an alias for `Reg<SECURE_BOOT_CTRL_SPEC>`"]
pub type SECURE_BOOT_CTRL = crate::Reg<secure_boot_ctrl::SECURE_BOOT_CTRL_SPEC>;
#[doc = "DPORT_SECURE_BOOT_CTRL"]
pub mod secure_boot_ctrl;
#[doc = "SPI_DMA_CHAN_SEL register accessor: an alias for `Reg<SPI_DMA_CHAN_SEL_SPEC>`"]
pub type SPI_DMA_CHAN_SEL = crate::Reg<spi_dma_chan_sel::SPI_DMA_CHAN_SEL_SPEC>;
#[doc = "DPORT_SPI_DMA_CHAN_SEL"]
pub mod spi_dma_chan_sel;
#[doc = "PRO_VECBASE_CTRL register accessor: an alias for `Reg<PRO_VECBASE_CTRL_SPEC>`"]
pub type PRO_VECBASE_CTRL = crate::Reg<pro_vecbase_ctrl::PRO_VECBASE_CTRL_SPEC>;
#[doc = "DPORT_PRO_VECBASE_CTRL"]
pub mod pro_vecbase_ctrl;
#[doc = "PRO_VECBASE_SET register accessor: an alias for `Reg<PRO_VECBASE_SET_SPEC>`"]
pub type PRO_VECBASE_SET = crate::Reg<pro_vecbase_set::PRO_VECBASE_SET_SPEC>;
#[doc = "DPORT_PRO_VECBASE_SET"]
pub mod pro_vecbase_set;
#[doc = "APP_VECBASE_CTRL register accessor: an alias for `Reg<APP_VECBASE_CTRL_SPEC>`"]
pub type APP_VECBASE_CTRL = crate::Reg<app_vecbase_ctrl::APP_VECBASE_CTRL_SPEC>;
#[doc = "DPORT_APP_VECBASE_CTRL"]
pub mod app_vecbase_ctrl;
#[doc = "APP_VECBASE_SET register accessor: an alias for `Reg<APP_VECBASE_SET_SPEC>`"]
pub type APP_VECBASE_SET = crate::Reg<app_vecbase_set::APP_VECBASE_SET_SPEC>;
#[doc = "DPORT_APP_VECBASE_SET"]
pub mod app_vecbase_set;
#[doc = "DATE register accessor: an alias for `Reg<DATE_SPEC>`"]
pub type DATE = crate::Reg<date::DATE_SPEC>;
#[doc = "DPORT_DATE"]
pub mod date;