RegisterBlock

efm32lg230_pac::prs

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 15 fields
    pub swpulse: Reg<SWPULSE_SPEC>,
    pub swlevel: Reg<SWLEVEL_SPEC>,
    pub route: Reg<ROUTE_SPEC>,
    pub ch0_ctrl: Reg<CH0_CTRL_SPEC>,
    pub ch1_ctrl: Reg<CH1_CTRL_SPEC>,
    pub ch2_ctrl: Reg<CH2_CTRL_SPEC>,
    pub ch3_ctrl: Reg<CH3_CTRL_SPEC>,
    pub ch4_ctrl: Reg<CH4_CTRL_SPEC>,
    pub ch5_ctrl: Reg<CH5_CTRL_SPEC>,
    pub ch6_ctrl: Reg<CH6_CTRL_SPEC>,
    pub ch7_ctrl: Reg<CH7_CTRL_SPEC>,
    pub ch8_ctrl: Reg<CH8_CTRL_SPEC>,
    pub ch9_ctrl: Reg<CH9_CTRL_SPEC>,
    pub ch10_ctrl: Reg<CH10_CTRL_SPEC>,
    pub ch11_ctrl: Reg<CH11_CTRL_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§swpulse: Reg<SWPULSE_SPEC>

0x00 - Software Pulse Register

§swlevel: Reg<SWLEVEL_SPEC>

0x04 - Software Level Register

§route: Reg<ROUTE_SPEC>

0x08 - I/O Routing Register

§ch0_ctrl: Reg<CH0_CTRL_SPEC>

0x10 - Channel Control Register

§ch1_ctrl: Reg<CH1_CTRL_SPEC>

0x14 - Channel Control Register

§ch2_ctrl: Reg<CH2_CTRL_SPEC>

0x18 - Channel Control Register

§ch3_ctrl: Reg<CH3_CTRL_SPEC>

0x1c - Channel Control Register

§ch4_ctrl: Reg<CH4_CTRL_SPEC>

0x20 - Channel Control Register

§ch5_ctrl: Reg<CH5_CTRL_SPEC>

0x24 - Channel Control Register

§ch6_ctrl: Reg<CH6_CTRL_SPEC>

0x28 - Channel Control Register

§ch7_ctrl: Reg<CH7_CTRL_SPEC>

0x2c - Channel Control Register

§ch8_ctrl: Reg<CH8_CTRL_SPEC>

0x30 - Channel Control Register

§ch9_ctrl: Reg<CH9_CTRL_SPEC>

0x34 - Channel Control Register

§ch10_ctrl: Reg<CH10_CTRL_SPEC>

0x38 - Channel Control Register

§ch11_ctrl: Reg<CH11_CTRL_SPEC>

0x3c - Channel Control Register

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