Struct cortex_m::peripheral::nvic::Registers

pub struct Registers {
    pub iser: [RW<u32>; 16],
    pub icer: [RW<u32>; 16],
    pub ispr: [RW<u32>; 16],
    pub icpr: [RW<u32>; 16],
    pub iabr: [RO<u32>; 16],
    pub ipr: [RW<u32>; 124],
    // some fields omitted
}

Registers

Fields

iser: [RW<u32>; 16]

Interrupt Set-Enable

icer: [RW<u32>; 16]

Interrupt Clear-Enable

ispr: [RW<u32>; 16]

Interrupt Set-Pending

icpr: [RW<u32>; 16]

Interrupt Clear-Pending

iabr: [RO<u32>; 16]

Interrupt Active Bit

ipr: [RW<u32>; 124]

Interrupt Priority