1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118
#[doc = "Reader of register DMA"] pub type R = crate::R<u16, super::DMA>; #[doc = "Writer for register DMA"] pub type W = crate::W<u16, super::DMA>; #[doc = "Register DMA `reset()`'s with value 0"] impl crate::ResetValue for super::DMA { type Type = u16; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `EN`"] pub type EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EN`"] pub struct EN_W<'a> { w: &'a mut W, } impl<'a> EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01); self.w } } #[doc = "Reader of field `TXEN`"] pub type TXEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TXEN`"] pub struct TXEN_W<'a> { w: &'a mut W, } impl<'a> TXEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1); self.w } } #[doc = "Reader of field `RXEN`"] pub type RXEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RXEN`"] pub struct RXEN_W<'a> { w: &'a mut W, } impl<'a> RXEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u16) & 0x01) << 2); self.w } } impl R { #[doc = "Bit 0 - Enable DMA for Data Transfer"] #[inline(always)] pub fn en(&self) -> EN_R { EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Enable Transmit DMA Request"] #[inline(always)] pub fn txen(&self) -> TXEN_R { TXEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Enable Receive DMA Request"] #[inline(always)] pub fn rxen(&self) -> RXEN_R { RXEN_R::new(((self.bits >> 2) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Enable DMA for Data Transfer"] #[inline(always)] pub fn en(&mut self) -> EN_W { EN_W { w: self } } #[doc = "Bit 1 - Enable Transmit DMA Request"] #[inline(always)] pub fn txen(&mut self) -> TXEN_W { TXEN_W { w: self } } #[doc = "Bit 2 - Enable Receive DMA Request"] #[inline(always)] pub fn rxen(&mut self) -> RXEN_W { RXEN_W { w: self } } }