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searchIndex["cpuid"] = {"doc":"Rust bindings for [libpcuid](https://github.com/anrieff/libcpuid)\nCPU detection and feature extraction library.","items":[[3,"CpuInfo","cpuid","A struct holding information about CPU features.",null,null],[12,"vendor","","CPU vendor string, for example *GenuineIntel*.",0,null],[12,"brand","","Brand string, for example *Intel(R) Core(TM) i5-2410M CPU @ 2.30GHz*.",0,null],[12,"codename","","Brief CPU codename, such as *Sandy Bridge (Core i5)*.",0,null],[12,"num_cores","","Number of physical cores of the current CPU.",0,null],[12,"num_logical_cpus","","Number of logical processors (may include HyperThreading or such).",0,null],[12,"total_logical_cpus","","Total number of logical processors.",0,null],[12,"l1_data_cache","","L1 data cache size in kB. `Some(0)` if the CPU lacks cache, `None` if it couldn't be determined.",0,null],[12,"l1_instruction_cache","","L1 instruction cache size in kB. `Some(0)` if the CPU lacks cache, `None` if it couldn't be determined.",0,null],[12,"l2_cache","","L2 cache size in kB. `Some(0)` if the CPU lacks L2 cache, `None` if it couldn't be determined.",0,null],[12,"l3_cache","","L3 cache size in kB. `Some(0)` if the CPU lacks L3 cache, `None` if it couldn't be determined.",0,null],[4,"CpuFeature","","CPU feature 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if the CPUID instruction is present.",null,{"inputs":[],"output":{"name":"bool"}}],[5,"version","","Returns libcpuid version string.",null,{"inputs":[],"output":{"name":"string"}}],[5,"error","","Returns last libcpuid error string.",null,{"inputs":[],"output":{"name":"string"}}],[5,"identify","","Tries to identify the current CPU and its features.",null,{"inputs":[],"output":{"name":"result"}}],[5,"clock_frequency","","Gets the CPU clock frequency in MHz.",null,{"inputs":[],"output":{"name":"option"}}],[11,"clone","","",1,null],[11,"has_feature","","Checks if current CPU supports given feature.",0,null]],"paths":[[3,"CpuInfo"],[4,"CpuFeature"]]};
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