Expand description
Cacheability control, for data accesses.
0 The following are Non-cacheable for all levels of data and unified cache:
- Data accesses to Normal memory from EL2.
- When HCR_EL2.{E2H, TGE} != {1, 1}, Normal memory accesses to the EL2 translation tables.
- When EL2 is enabled in the current Security state and HCR_EL2.{E2H, TGE} == {1, 1}:
- Data accesses to Normal memory from EL0.
- Normal memory accesses to the EL2&0 translation tables.
1 This control has no effect on the Cacheability of:
- Data access to Normal memory from EL2.
- When HCR_EL2.{E2H, TGE} != {1, 1}, Normal memory accesses to the EL2 translation tables.
- When EL2 is enabled in the current Security state and HCR_EL2.{E2H, TGE} == {1, 1}:
- Data accesses to Normal memory from EL0.
- Normal memory accesses to the EL2&0 translation tables.
When EL2 is disabled in the current Security state or HCR_EL2.{E2H, TGE} != {1, 1}, this bit has no effect on the EL1&0 translation regime.
On a Warm reset, in a system where the PE resets into EL2, this field resets to 0.
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Cacheability control, for data accesses.