Module cortex_a::registers::SCR_EL3

source · [−]

Modules

HCE

Hypervisor Call Enable

NS

Non-secure bit. 0 Indicates that EL0 and EL1 are in Secure state.

RW

Execution state control for lower Exception levels:

SMD

Secure Monitor call Disable

Structs

Register

Constants

HCE
NS
RW
SMD