[][src]Function core_arch::mips::__msa_ilvod_d

pub unsafe fn __msa_ilvod_d(a: v2i64, b: v2i64) -> v2i64
🔬 This is a nightly-only experimental API. (stdsimd)
This is supported on MIPS and target feature msa only.

Vector Interleave Odd

Odd elements in vectors 'a' (two signed 64-bit integer numbers) and vector 'b' (two signed 64-bit integer numbers) are copied to the result (two signed 64-bit integer numbers) alternating one element from 'a' with one element from 'b'.