[−][src]Function core_arch::mips::__msa_ilvl_w
pub unsafe fn __msa_ilvl_w(a: v4i32, b: v4i32) -> v4i32
🔬 This is a nightly-only experimental API. (
stdsimd
)This is supported on MIPS and target feature
msa
only.Vector Interleave Left
The left half elements in vectors 'a' (four signed 32-bit integer numbers) and vector 'b' (four signed 32-bit integer numbers) are copied to the result (four signed 32-bit integer numbers) alternating one element from 'a' with one element from 'b'.