List of all items
Structs
- DVP
- ECDC
- EMMC
- HSPI
- PFIC
- PWMX
- Peripherals
- SPI0
- SPI1
- SYS
- SYSTICK
- TMR0
- TMR1
- TMR2
- UART0
- UART1
- UART2
- UART3
- USBHS
- dvp::RegisterBlock
- dvp::r16_dvp_col_cnt::R
- dvp::r16_dvp_col_cnt::R16_DVP_COL_CNT_SPEC
- dvp::r16_dvp_col_num::R
- dvp::r16_dvp_col_num::R16_DVP_COL_NUM_SPEC
- dvp::r16_dvp_col_num::W
- dvp::r16_dvp_row_cnt::R
- dvp::r16_dvp_row_cnt::R16_DVP_ROW_CNT_SPEC
- dvp::r16_dvp_row_num::R
- dvp::r16_dvp_row_num::R16_DVP_ROW_NUM_SPEC
- dvp::r16_dvp_row_num::W
- dvp::r32_dvp_dma_buf0::R
- dvp::r32_dvp_dma_buf0::R32_DVP_DMA_BUF0_SPEC
- dvp::r32_dvp_dma_buf0::W
- dvp::r32_dvp_dma_buf1::R
- dvp::r32_dvp_dma_buf1::R32_DVP_DMA_BUF1_SPEC
- dvp::r32_dvp_dma_buf1::W
- dvp::r8_dvp_cr0::R
- dvp::r8_dvp_cr0::R8_DVP_CR0_SPEC
- dvp::r8_dvp_cr0::W
- dvp::r8_dvp_cr1::R
- dvp::r8_dvp_cr1::R8_DVP_CR1_SPEC
- dvp::r8_dvp_cr1::W
- dvp::r8_dvp_fifo_st::R
- dvp::r8_dvp_fifo_st::R8_DVP_FIFO_ST_SPEC
- dvp::r8_dvp_int_en::R
- dvp::r8_dvp_int_en::R8_DVP_INT_EN_SPEC
- dvp::r8_dvp_int_en::W
- dvp::r8_dvp_int_flag::R
- dvp::r8_dvp_int_flag::R8_DVP_INT_FLAG_SPEC
- dvp::r8_dvp_int_flag::W
- ecdc::RegisterBlock
- ecdc::r16_ecec_ctrl::R
- ecdc::r16_ecec_ctrl::R16_ECEC_CTRL_SPEC
- ecdc::r16_ecec_ctrl::W
- ecdc::r32_ecdc_iv_127t96::R
- ecdc::r32_ecdc_iv_127t96::R32_ECDC_IV_127T96_SPEC
- ecdc::r32_ecdc_iv_127t96::W
- ecdc::r32_ecdc_iv_31t0::R
- ecdc::r32_ecdc_iv_31t0::R32_ECDC_IV_31T0_SPEC
- ecdc::r32_ecdc_iv_31t0::W
- ecdc::r32_ecdc_iv_63t32::R
- ecdc::r32_ecdc_iv_63t32::R32_ECDC_IV_63T32_SPEC
- ecdc::r32_ecdc_iv_63t32::W
- ecdc::r32_ecdc_iv_95t64::R
- ecdc::r32_ecdc_iv_95t64::R32_ECDC_IV_95T64_SPEC
- ecdc::r32_ecdc_iv_95t64::W
- ecdc::r32_ecdc_key_127t96::R
- ecdc::r32_ecdc_key_127t96::R32_ECDC_KEY_127T96_SPEC
- ecdc::r32_ecdc_key_127t96::W
- ecdc::r32_ecdc_key_159t128::R
- ecdc::r32_ecdc_key_159t128::R32_ECDC_KEY_159T128_SPEC
- ecdc::r32_ecdc_key_159t128::W
- ecdc::r32_ecdc_key_191t160::R
- ecdc::r32_ecdc_key_191t160::R32_ECDC_KEY_191T160_SPEC
- ecdc::r32_ecdc_key_191t160::W
- ecdc::r32_ecdc_key_223t192::R
- ecdc::r32_ecdc_key_223t192::R32_ECDC_KEY_223T192_SPEC
- ecdc::r32_ecdc_key_223t192::W
- ecdc::r32_ecdc_key_255t224::R
- ecdc::r32_ecdc_key_255t224::R32_ECDC_KEY_255T224_SPEC
- ecdc::r32_ecdc_key_255t224::W
- ecdc::r32_ecdc_key_31t0::R
- ecdc::r32_ecdc_key_31t0::R32_ECDC_KEY_31T0_SPEC
- ecdc::r32_ecdc_key_31t0::W
- ecdc::r32_ecdc_key_63t32::R
- ecdc::r32_ecdc_key_63t32::R32_ECDC_KEY_63T32_SPEC
- ecdc::r32_ecdc_key_63t32::W
- ecdc::r32_ecdc_key_95t64::R
- ecdc::r32_ecdc_key_95t64::R32_ECDC_KEY_95T64_SPEC
- ecdc::r32_ecdc_key_95t64::W
- ecdc::r32_ecdc_sgrt_127t96::R
- ecdc::r32_ecdc_sgrt_127t96::R32_ECDC_SGRT_127T96_SPEC
- ecdc::r32_ecdc_sgrt_127t96::W
- ecdc::r32_ecdc_sgrt_63t32::R
- ecdc::r32_ecdc_sgrt_63t32::R32_ECDC_SGRT_63T32_SPEC
- ecdc::r32_ecdc_sgrt_63t32::W
- ecdc::r32_ecdc_sgrt_95t64::R
- ecdc::r32_ecdc_sgrt_95t64::R32_ECDC_SGRT_95T64_SPEC
- ecdc::r32_ecdc_sgrt_95t64::W
- ecdc::r32_ecdc_sgsd_127t96::R
- ecdc::r32_ecdc_sgsd_127t96::R32_ECDC_SGSD_127T96_SPEC
- ecdc::r32_ecdc_sgsd_127t96::W
- ecdc::r32_ecdc_sgsd_31t0::R
- ecdc::r32_ecdc_sgsd_31t0::R32_ECDC_SGSD_31T0_SPEC
- ecdc::r32_ecdc_sgsd_31t0::W
- ecdc::r32_ecdc_sgsd_63t32::R
- ecdc::r32_ecdc_sgsd_63t32::R32_ECDC_SGSD_63T32_SPEC
- ecdc::r32_ecdc_sgsd_63t32::W
- ecdc::r32_ecdc_sgsd_95t64::R
- ecdc::r32_ecdc_sgsd_95t64::R32_ECDC_SGSD_95T64_SPEC
- ecdc::r32_ecdc_sgsd_95t64::W
- ecdc::r32_ecdc_sram_addr::R
- ecdc::r32_ecdc_sram_addr::R32_ECDC_SRAM_ADDR_SPEC
- ecdc::r32_ecdc_sram_addr::W
- ecdc::r32_ecdc_sram_len::R
- ecdc::r32_ecdc_sram_len::R32_ECDC_SRAM_LEN_SPEC
- ecdc::r32_ecdc_sram_len::W
- ecdc::r8_ecdc_int_en::R
- ecdc::r8_ecdc_int_en::R8_ECDC_INT_EN_SPEC
- ecdc::r8_ecdc_int_en::W
- ecdc::r8_ecdc_int_fg::R
- ecdc::r8_ecdc_int_fg::R8_ECDC_INT_FG_SPEC
- ecdc::r8_ecdc_int_fg::W
- ecdc::rb_ecdc_sgrt_31t0::R
- ecdc::rb_ecdc_sgrt_31t0::RB_ECDC_SGRT_31T0_SPEC
- ecdc::rb_ecdc_sgrt_31t0::W
- emmc::RegisterBlock
- emmc::r16_emmc_clk_div::R
- emmc::r16_emmc_clk_div::R16_EMMC_CLK_DIV_SPEC
- emmc::r16_emmc_clk_div::W
- emmc::r16_emmc_cmd_set::R
- emmc::r16_emmc_cmd_set::R16_EMMC_CMD_SET_SPEC
- emmc::r16_emmc_cmd_set::W
- emmc::r16_emmc_int_en::R
- emmc::r16_emmc_int_en::R16_EMMC_INT_EN_SPEC
- emmc::r16_emmc_int_en::W
- emmc::r16_emmc_int_fg::R
- emmc::r16_emmc_int_fg::R16_EMMC_INT_FG_SPEC
- emmc::r16_emmc_int_fg::W
- emmc::r32_emmc_argument::R
- emmc::r32_emmc_argument::R32_EMMC_ARGUMENT_SPEC
- emmc::r32_emmc_argument::W
- emmc::r32_emmc_block_cfg::R
- emmc::r32_emmc_block_cfg::R32_EMMC_BLOCK_CFG_SPEC
- emmc::r32_emmc_block_cfg::W
- emmc::r32_emmc_dma_beg1::R
- emmc::r32_emmc_dma_beg1::R32_EMMC_DMA_BEG1_SPEC
- emmc::r32_emmc_dma_beg1::W
- emmc::r32_emmc_dma_beg2::R
- emmc::r32_emmc_dma_beg2::R32_EMMC_DMA_BEG2_SPEC
- emmc::r32_emmc_dma_beg2::W
- emmc::r32_emmc_response0::R
- emmc::r32_emmc_response0::R32_EMMC_RESPONSE0_SPEC
- emmc::r32_emmc_response1::R
- emmc::r32_emmc_response1::R32_EMMC_RESPONSE1_SPEC
- emmc::r32_emmc_response2::R
- emmc::r32_emmc_response2::R32_EMMC_RESPONSE2_SPEC
- emmc::r32_emmc_response3::R
- emmc::r32_emmc_response3::R32_EMMC_RESPONSE3_SPEC
- emmc::r32_emmc_status::R
- emmc::r32_emmc_status::R32_EMMC_STATUS_SPEC
- emmc::r32_emmc_tran_mode::R
- emmc::r32_emmc_tran_mode::R32_EMMC_TRAN_MODE_SPEC
- emmc::r32_emmc_tran_mode::W
- emmc::r32_emmc_write_cont::R32_EMMC_WRITE_CONT_SPEC
- emmc::r32_emmc_write_cont::W
- emmc::r8_emmc_control::R
- emmc::r8_emmc_control::R8_EMMC_CONTROL_SPEC
- emmc::r8_emmc_control::W
- emmc::r8_emmc_timeout::R
- emmc::r8_emmc_timeout::R8_EMMC_TIMEOUT_SPEC
- emmc::r8_emmc_timeout::W
- generic::R
- generic::Reg
- generic::W
- hspi::RegisterBlock
- hspi::hspi_rx_sc::HSPI_RX_SC_SPEC
- hspi::hspi_rx_sc::R
- hspi::hspi_rx_sc::W
- hspi::r16_hspi_burst_cfg::R
- hspi::r16_hspi_burst_cfg::R16_HSPI_BURST_CFG_SPEC
- hspi::r16_hspi_burst_cfg::W
- hspi::r16_hspi_dma_len0::R
- hspi::r16_hspi_dma_len0::R16_HSPI_DMA_LEN0_SPEC
- hspi::r16_hspi_dma_len0::W
- hspi::r16_hspi_dma_len1::R
- hspi::r16_hspi_dma_len1::R16_HSPI_DMA_LEN1_SPEC
- hspi::r16_hspi_dma_len1::W
- hspi::r16_hspi_rx_len0::R
- hspi::r16_hspi_rx_len0::R16_HSPI_RX_LEN0_SPEC
- hspi::r16_hspi_rx_len0::W
- hspi::r16_hspi_rx_len1::R
- hspi::r16_hspi_rx_len1::R16_HSPI_RX_LEN1_SPEC
- hspi::r16_hspi_rx_len1::W
- hspi::r32_hspi_rx_addr0::R
- hspi::r32_hspi_rx_addr0::R32_HSPI_RX_ADDR0_SPEC
- hspi::r32_hspi_rx_addr0::W
- hspi::r32_hspi_rx_addr1::R
- hspi::r32_hspi_rx_addr1::R32_HSPI_RX_ADDR1_SPEC
- hspi::r32_hspi_rx_addr1::W
- hspi::r32_hspi_tx_addr0::R
- hspi::r32_hspi_tx_addr0::R32_HSPI_TX_ADDR0_SPEC
- hspi::r32_hspi_tx_addr0::W
- hspi::r32_hspi_tx_addr1::R
- hspi::r32_hspi_tx_addr1::R32_HSPI_TX_ADDR1_SPEC
- hspi::r32_hspi_tx_addr1::W
- hspi::r32_hspi_udf0::R
- hspi::r32_hspi_udf0::R32_HSPI_UDF0_SPEC
- hspi::r32_hspi_udf0::W
- hspi::r32_hspi_udf1::R
- hspi::r32_hspi_udf1::R32_HSPI_UDF1_SPEC
- hspi::r32_hspi_udf1::W
- hspi::r8_hspi_aux::R
- hspi::r8_hspi_aux::R8_HSPI_AUX_SPEC
- hspi::r8_hspi_aux::W
- hspi::r8_hspi_burst_cnt::R
- hspi::r8_hspi_burst_cnt::R8_HSPI_BURST_CNT_SPEC
- hspi::r8_hspi_burst_cnt::W
- hspi::r8_hspi_cfg::R
- hspi::r8_hspi_cfg::R8_HSPI_CFG_SPEC
- hspi::r8_hspi_cfg::W
- hspi::r8_hspi_ctrl::R
- hspi::r8_hspi_ctrl::R8_HSPI_CTRL_SPEC
- hspi::r8_hspi_ctrl::W
- hspi::r8_hspi_int_en::R
- hspi::r8_hspi_int_en::R8_HSPI_INT_EN_SPEC
- hspi::r8_hspi_int_en::W
- hspi::r8_hspi_int_flag::R
- hspi::r8_hspi_int_flag::R8_HSPI_INT_FLAG_SPEC
- hspi::r8_hspi_int_flag::W
- hspi::r8_hspi_rtx_status::R
- hspi::r8_hspi_rtx_status::R8_HSPI_RTX_STATUS_SPEC
- hspi::r8_hspi_rtx_status::W
- hspi::r8_hspi_tx_sc::R
- hspi::r8_hspi_tx_sc::R8_HSPI_TX_SC_SPEC
- hspi::r8_hspi_tx_sc::W
- pfic::RegisterBlock
- pfic::r32_pfic_cfgr::R
- pfic::r32_pfic_cfgr::R32_PFIC_CFGR_SPEC
- pfic::r32_pfic_cfgr::W
- pfic::r32_pfic_fibaddrr::R
- pfic::r32_pfic_fibaddrr::R32_PFIC_FIBADDRR_SPEC
- pfic::r32_pfic_fibaddrr::W
- pfic::r32_pfic_fifoaddrr0::R
- pfic::r32_pfic_fifoaddrr0::R32_PFIC_FIFOADDRR0_SPEC
- pfic::r32_pfic_fifoaddrr0::W
- pfic::r32_pfic_fifoaddrr1::R
- pfic::r32_pfic_fifoaddrr1::R32_PFIC_FIFOADDRR1_SPEC
- pfic::r32_pfic_fifoaddrr1::W
- pfic::r32_pfic_fifoaddrr2::R
- pfic::r32_pfic_fifoaddrr2::R32_PFIC_FIFOADDRR2_SPEC
- pfic::r32_pfic_fifoaddrr2::W
- pfic::r32_pfic_fifoaddrr3::R
- pfic::r32_pfic_fifoaddrr3::R32_PFIC_FIFOADDRR3_SPEC
- pfic::r32_pfic_fifoaddrr3::W
- pfic::r32_pfic_gisr::R
- pfic::r32_pfic_gisr::R32_PFIC_GISR_SPEC
- pfic::r32_pfic_iactr1::R
- pfic::r32_pfic_iactr1::R32_PFIC_IACTR1_SPEC
- pfic::r32_pfic_iactr1::W
- pfic::r32_pfic_iactr2::R
- pfic::r32_pfic_iactr2::R32_PFIC_IACTR2_SPEC
- pfic::r32_pfic_iactr2::W
- pfic::r32_pfic_ienr1::R
- pfic::r32_pfic_ienr1::R32_PFIC_IENR1_SPEC
- pfic::r32_pfic_ienr1::W
- pfic::r32_pfic_ienr2::R
- pfic::r32_pfic_ienr2::R32_PFIC_IENR2_SPEC
- pfic::r32_pfic_ienr2::W
- pfic::r32_pfic_ipr1::R
- pfic::r32_pfic_ipr1::R32_PFIC_IPR1_SPEC
- pfic::r32_pfic_ipr2::R
- pfic::r32_pfic_ipr2::R32_PFIC_IPR2_SPEC
- pfic::r32_pfic_iprior0::R
- pfic::r32_pfic_iprior0::R32_PFIC_IPRIOR0_SPEC
- pfic::r32_pfic_iprior0::W
- pfic::r32_pfic_iprior10::R
- pfic::r32_pfic_iprior10::R32_PFIC_IPRIOR10_SPEC
- pfic::r32_pfic_iprior10::W
- pfic::r32_pfic_iprior11::R
- pfic::r32_pfic_iprior11::R32_PFIC_IPRIOR11_SPEC
- pfic::r32_pfic_iprior11::W
- pfic::r32_pfic_iprior12::R
- pfic::r32_pfic_iprior12::R32_PFIC_IPRIOR12_SPEC
- pfic::r32_pfic_iprior12::W
- pfic::r32_pfic_iprior13::R
- pfic::r32_pfic_iprior13::R32_PFIC_IPRIOR13_SPEC
- pfic::r32_pfic_iprior13::W
- pfic::r32_pfic_iprior14::R
- pfic::r32_pfic_iprior14::R32_PFIC_IPRIOR14_SPEC
- pfic::r32_pfic_iprior14::W
- pfic::r32_pfic_iprior15::R
- pfic::r32_pfic_iprior15::R32_PFIC_IPRIOR15_SPEC
- pfic::r32_pfic_iprior15::W
- pfic::r32_pfic_iprior16::R
- pfic::r32_pfic_iprior16::R32_PFIC_IPRIOR16_SPEC
- pfic::r32_pfic_iprior16::W
- pfic::r32_pfic_iprior17::R
- pfic::r32_pfic_iprior17::R32_PFIC_IPRIOR17_SPEC
- pfic::r32_pfic_iprior17::W
- pfic::r32_pfic_iprior18::R
- pfic::r32_pfic_iprior18::R32_PFIC_IPRIOR18_SPEC
- pfic::r32_pfic_iprior18::W
- pfic::r32_pfic_iprior19::R
- pfic::r32_pfic_iprior19::R32_PFIC_IPRIOR19_SPEC
- pfic::r32_pfic_iprior19::W
- pfic::r32_pfic_iprior1::R
- pfic::r32_pfic_iprior1::R32_PFIC_IPRIOR1_SPEC
- pfic::r32_pfic_iprior1::W
- pfic::r32_pfic_iprior20::R
- pfic::r32_pfic_iprior20::R32_PFIC_IPRIOR20_SPEC
- pfic::r32_pfic_iprior20::W
- pfic::r32_pfic_iprior21::R
- pfic::r32_pfic_iprior21::R32_PFIC_IPRIOR21_SPEC
- pfic::r32_pfic_iprior21::W
- pfic::r32_pfic_iprior22::R
- pfic::r32_pfic_iprior22::R32_PFIC_IPRIOR22_SPEC
- pfic::r32_pfic_iprior22::W
- pfic::r32_pfic_iprior23::R
- pfic::r32_pfic_iprior23::R32_PFIC_IPRIOR23_SPEC
- pfic::r32_pfic_iprior23::W
- pfic::r32_pfic_iprior24::R
- pfic::r32_pfic_iprior24::R32_PFIC_IPRIOR24_SPEC
- pfic::r32_pfic_iprior24::W
- pfic::r32_pfic_iprior25::R
- pfic::r32_pfic_iprior25::R32_PFIC_IPRIOR25_SPEC
- pfic::r32_pfic_iprior25::W
- pfic::r32_pfic_iprior26::R
- pfic::r32_pfic_iprior26::R32_PFIC_IPRIOR26_SPEC
- pfic::r32_pfic_iprior26::W
- pfic::r32_pfic_iprior27::R
- pfic::r32_pfic_iprior27::R32_PFIC_IPRIOR27_SPEC
- pfic::r32_pfic_iprior27::W
- pfic::r32_pfic_iprior28::R
- pfic::r32_pfic_iprior28::R32_PFIC_IPRIOR28_SPEC
- pfic::r32_pfic_iprior28::W
- pfic::r32_pfic_iprior29::R
- pfic::r32_pfic_iprior29::R32_PFIC_IPRIOR29_SPEC
- pfic::r32_pfic_iprior29::W
- pfic::r32_pfic_iprior2::R
- pfic::r32_pfic_iprior2::R32_PFIC_IPRIOR2_SPEC
- pfic::r32_pfic_iprior2::W
- pfic::r32_pfic_iprior30::R
- pfic::r32_pfic_iprior30::R32_PFIC_IPRIOR30_SPEC
- pfic::r32_pfic_iprior30::W
- pfic::r32_pfic_iprior31::R
- pfic::r32_pfic_iprior31::R32_PFIC_IPRIOR31_SPEC
- pfic::r32_pfic_iprior31::W
- pfic::r32_pfic_iprior32::R
- pfic::r32_pfic_iprior32::R32_PFIC_IPRIOR32_SPEC
- pfic::r32_pfic_iprior32::W
- pfic::r32_pfic_iprior33::R
- pfic::r32_pfic_iprior33::R32_PFIC_IPRIOR33_SPEC
- pfic::r32_pfic_iprior33::W
- pfic::r32_pfic_iprior34::R
- pfic::r32_pfic_iprior34::R32_PFIC_IPRIOR34_SPEC
- pfic::r32_pfic_iprior34::W
- pfic::r32_pfic_iprior35::R
- pfic::r32_pfic_iprior35::R32_PFIC_IPRIOR35_SPEC
- pfic::r32_pfic_iprior35::W
- pfic::r32_pfic_iprior36::R
- pfic::r32_pfic_iprior36::R32_PFIC_IPRIOR36_SPEC
- pfic::r32_pfic_iprior36::W
- pfic::r32_pfic_iprior37::R
- pfic::r32_pfic_iprior37::R32_PFIC_IPRIOR37_SPEC
- pfic::r32_pfic_iprior37::W
- pfic::r32_pfic_iprior38::R
- pfic::r32_pfic_iprior38::R32_PFIC_IPRIOR38_SPEC
- pfic::r32_pfic_iprior38::W
- pfic::r32_pfic_iprior39::R
- pfic::r32_pfic_iprior39::R32_PFIC_IPRIOR39_SPEC
- pfic::r32_pfic_iprior39::W
- pfic::r32_pfic_iprior3::R
- pfic::r32_pfic_iprior3::R32_PFIC_IPRIOR3_SPEC
- pfic::r32_pfic_iprior3::W
- pfic::r32_pfic_iprior40::R
- pfic::r32_pfic_iprior40::R32_PFIC_IPRIOR40_SPEC
- pfic::r32_pfic_iprior40::W
- pfic::r32_pfic_iprior41::R
- pfic::r32_pfic_iprior41::R32_PFIC_IPRIOR41_SPEC
- pfic::r32_pfic_iprior41::W
- pfic::r32_pfic_iprior42::R
- pfic::r32_pfic_iprior42::R32_PFIC_IPRIOR42_SPEC
- pfic::r32_pfic_iprior42::W
- pfic::r32_pfic_iprior43::R
- pfic::r32_pfic_iprior43::R32_PFIC_IPRIOR43_SPEC
- pfic::r32_pfic_iprior43::W
- pfic::r32_pfic_iprior44::R
- pfic::r32_pfic_iprior44::R32_PFIC_IPRIOR44_SPEC
- pfic::r32_pfic_iprior44::W
- pfic::r32_pfic_iprior45::R
- pfic::r32_pfic_iprior45::R32_PFIC_IPRIOR45_SPEC
- pfic::r32_pfic_iprior45::W
- pfic::r32_pfic_iprior46::R
- pfic::r32_pfic_iprior46::R32_PFIC_IPRIOR46_SPEC
- pfic::r32_pfic_iprior46::W
- pfic::r32_pfic_iprior47::R
- pfic::r32_pfic_iprior47::R32_PFIC_IPRIOR47_SPEC
- pfic::r32_pfic_iprior47::W
- pfic::r32_pfic_iprior48::R
- pfic::r32_pfic_iprior48::R32_PFIC_IPRIOR48_SPEC
- pfic::r32_pfic_iprior48::W
- pfic::r32_pfic_iprior49::R
- pfic::r32_pfic_iprior49::R32_PFIC_IPRIOR49_SPEC
- pfic::r32_pfic_iprior49::W
- pfic::r32_pfic_iprior4::R
- pfic::r32_pfic_iprior4::R32_PFIC_IPRIOR4_SPEC
- pfic::r32_pfic_iprior4::W
- pfic::r32_pfic_iprior50::R
- pfic::r32_pfic_iprior50::R32_PFIC_IPRIOR50_SPEC
- pfic::r32_pfic_iprior50::W
- pfic::r32_pfic_iprior51::R
- pfic::r32_pfic_iprior51::R32_PFIC_IPRIOR51_SPEC
- pfic::r32_pfic_iprior51::W
- pfic::r32_pfic_iprior52::R
- pfic::r32_pfic_iprior52::R32_PFIC_IPRIOR52_SPEC
- pfic::r32_pfic_iprior52::W
- pfic::r32_pfic_iprior53::R
- pfic::r32_pfic_iprior53::R32_PFIC_IPRIOR53_SPEC
- pfic::r32_pfic_iprior53::W
- pfic::r32_pfic_iprior54::R
- pfic::r32_pfic_iprior54::R32_PFIC_IPRIOR54_SPEC
- pfic::r32_pfic_iprior54::W
- pfic::r32_pfic_iprior55::R
- pfic::r32_pfic_iprior55::R32_PFIC_IPRIOR55_SPEC
- pfic::r32_pfic_iprior55::W
- pfic::r32_pfic_iprior56::R
- pfic::r32_pfic_iprior56::R32_PFIC_IPRIOR56_SPEC
- pfic::r32_pfic_iprior56::W
- pfic::r32_pfic_iprior57::R
- pfic::r32_pfic_iprior57::R32_PFIC_IPRIOR57_SPEC
- pfic::r32_pfic_iprior57::W
- pfic::r32_pfic_iprior58::R
- pfic::r32_pfic_iprior58::R32_PFIC_IPRIOR58_SPEC
- pfic::r32_pfic_iprior58::W
- pfic::r32_pfic_iprior59::R
- pfic::r32_pfic_iprior59::R32_PFIC_IPRIOR59_SPEC
- pfic::r32_pfic_iprior59::W
- pfic::r32_pfic_iprior5::R
- pfic::r32_pfic_iprior5::R32_PFIC_IPRIOR5_SPEC
- pfic::r32_pfic_iprior5::W
- pfic::r32_pfic_iprior60::R
- pfic::r32_pfic_iprior60::R32_PFIC_IPRIOR60_SPEC
- pfic::r32_pfic_iprior60::W
- pfic::r32_pfic_iprior61::R
- pfic::r32_pfic_iprior61::R32_PFIC_IPRIOR61_SPEC
- pfic::r32_pfic_iprior61::W
- pfic::r32_pfic_iprior62::R
- pfic::r32_pfic_iprior62::R32_PFIC_IPRIOR62_SPEC
- pfic::r32_pfic_iprior62::W
- pfic::r32_pfic_iprior63::R
- pfic::r32_pfic_iprior63::R32_PFIC_IPRIOR63_SPEC
- pfic::r32_pfic_iprior63::W
- pfic::r32_pfic_iprior6::R
- pfic::r32_pfic_iprior6::R32_PFIC_IPRIOR6_SPEC
- pfic::r32_pfic_iprior6::W
- pfic::r32_pfic_iprior7::R
- pfic::r32_pfic_iprior7::R32_PFIC_IPRIOR7_SPEC
- pfic::r32_pfic_iprior7::W
- pfic::r32_pfic_iprior8::R
- pfic::r32_pfic_iprior8::R32_PFIC_IPRIOR8_SPEC
- pfic::r32_pfic_iprior8::W
- pfic::r32_pfic_iprior9::R
- pfic::r32_pfic_iprior9::R32_PFIC_IPRIOR9_SPEC
- pfic::r32_pfic_iprior9::W
- pfic::r32_pfic_iprr1::R
- pfic::r32_pfic_iprr1::R32_PFIC_IPRR1_SPEC
- pfic::r32_pfic_iprr1::W
- pfic::r32_pfic_iprr2::R
- pfic::r32_pfic_iprr2::R32_PFIC_IPRR2_SPEC
- pfic::r32_pfic_iprr2::W
- pfic::r32_pfic_ipsr1::R
- pfic::r32_pfic_ipsr1::R32_PFIC_IPSR1_SPEC
- pfic::r32_pfic_ipsr1::W
- pfic::r32_pfic_ipsr2::R
- pfic::r32_pfic_ipsr2::R32_PFIC_IPSR2_SPEC
- pfic::r32_pfic_ipsr2::W
- pfic::r32_pfic_irer1::R
- pfic::r32_pfic_irer1::R32_PFIC_IRER1_SPEC
- pfic::r32_pfic_irer1::W
- pfic::r32_pfic_irer2::R
- pfic::r32_pfic_irer2::R32_PFIC_IRER2_SPEC
- pfic::r32_pfic_irer2::W
- pfic::r32_pfic_isr1::R
- pfic::r32_pfic_isr1::R32_PFIC_ISR1_SPEC
- pfic::r32_pfic_isr2::R
- pfic::r32_pfic_isr2::R32_PFIC_ISR2_SPEC
- pfic::r32_pfic_ithresdr::R
- pfic::r32_pfic_ithresdr::R32_PFIC_ITHRESDR_SPEC
- pfic::r32_pfic_ithresdr::W
- pfic::r32_pfic_sctlr::R
- pfic::r32_pfic_sctlr::R32_PFIC_SCTLR_SPEC
- pfic::r32_pfic_sctlr::W
- pwmx::RegisterBlock
- pwmx::r8_pwm0_data::R
- pwmx::r8_pwm0_data::R8_PWM0_DATA_SPEC
- pwmx::r8_pwm0_data::W
- pwmx::r8_pwm1_data::R
- pwmx::r8_pwm1_data::R8_PWM1_DATA_SPEC
- pwmx::r8_pwm1_data::W
- pwmx::r8_pwm2_data::R
- pwmx::r8_pwm2_data::R8_PWM2_DATA_SPEC
- pwmx::r8_pwm2_data::W
- pwmx::r8_pwm3_data::R
- pwmx::r8_pwm3_data::R8_PWM3_DATA_SPEC
- pwmx::r8_pwm3_data::W
- pwmx::r8_pwm_clock_div::R
- pwmx::r8_pwm_clock_div::R8_PWM_CLOCK_DIV_SPEC
- pwmx::r8_pwm_clock_div::W
- pwmx::r8_pwm_ctrl_cfg::R
- pwmx::r8_pwm_ctrl_cfg::R8_PWM_CTRL_CFG_SPEC
- pwmx::r8_pwm_ctrl_cfg::W
- pwmx::r8_pwm_ctrl_mod::R
- pwmx::r8_pwm_ctrl_mod::R8_PWM_CTRL_MOD_SPEC
- pwmx::r8_pwm_ctrl_mod::W
- spi0::RegisterBlock
- spi0::r16_spi0_total_cnt::R
- spi0::r16_spi0_total_cnt::R16_SPI0_TOTAL_CNT_SPEC
- spi0::r16_spi0_total_cnt::W
- spi0::r32_spi0_dma_beg::R
- spi0::r32_spi0_dma_beg::R32_SPI0_DMA_BEG_SPEC
- spi0::r32_spi0_dma_beg::W
- spi0::r32_spi0_dma_end::R
- spi0::r32_spi0_dma_end::R32_SPI0_DMA_END_SPEC
- spi0::r32_spi0_dma_end::W
- spi0::r32_spi0_dma_now::R
- spi0::r32_spi0_dma_now::R32_SPI0_DMA_NOW_SPEC
- spi0::r32_spi0_dma_now::W
- spi0::r8_spi0_buffer::R
- spi0::r8_spi0_buffer::R8_SPI0_BUFFER_SPEC
- spi0::r8_spi0_clock_div_r8_spi0_slave_pre::R
- spi0::r8_spi0_clock_div_r8_spi0_slave_pre::R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_SPEC
- spi0::r8_spi0_clock_div_r8_spi0_slave_pre::W
- spi0::r8_spi0_ctrl_cfg::R
- spi0::r8_spi0_ctrl_cfg::R8_SPI0_CTRL_CFG_SPEC
- spi0::r8_spi0_ctrl_cfg::W
- spi0::r8_spi0_ctrl_mod::R
- spi0::r8_spi0_ctrl_mod::R8_SPI0_CTRL_MOD_SPEC
- spi0::r8_spi0_ctrl_mod::W
- spi0::r8_spi0_fifo::R
- spi0::r8_spi0_fifo::R8_SPI0_FIFO_SPEC
- spi0::r8_spi0_fifo::W
- spi0::r8_spi0_fifo_count1::R
- spi0::r8_spi0_fifo_count1::R8_SPI0_FIFO_COUNT1_SPEC
- spi0::r8_spi0_fifo_count1::W
- spi0::r8_spi0_fifo_count::R
- spi0::r8_spi0_fifo_count::R8_SPI0_FIFO_COUNT_SPEC
- spi0::r8_spi0_fifo_count::W
- spi0::r8_spi0_int_flag::R
- spi0::r8_spi0_int_flag::R8_SPI0_INT_FLAG_SPEC
- spi0::r8_spi0_int_flag::W
- spi0::r8_spi0_inter_en::R
- spi0::r8_spi0_inter_en::R8_SPI0_INTER_EN_SPEC
- spi0::r8_spi0_inter_en::W
- spi0::r8_spi0_run_flag::R
- spi0::r8_spi0_run_flag::R8_SPI0_RUN_FLAG_SPEC
- spi1::RegisterBlock
- spi1::r16_spi1_total_cnt::R
- spi1::r16_spi1_total_cnt::R16_SPI1_TOTAL_CNT_SPEC
- spi1::r16_spi1_total_cnt::W
- spi1::r32_spi1_dma_beg::R
- spi1::r32_spi1_dma_beg::R32_SPI1_DMA_BEG_SPEC
- spi1::r32_spi1_dma_beg::W
- spi1::r32_spi1_dma_end::R
- spi1::r32_spi1_dma_end::R32_SPI1_DMA_END_SPEC
- spi1::r32_spi1_dma_end::W
- spi1::r32_spi1_dma_now::R
- spi1::r32_spi1_dma_now::R32_SPI1_DMA_NOW_SPEC
- spi1::r32_spi1_dma_now::W
- spi1::r8_spi1_buffer::R
- spi1::r8_spi1_buffer::R8_SPI1_BUFFER_SPEC
- spi1::r8_spi1_clock_div_r8_spi1_slave_pre::R
- spi1::r8_spi1_clock_div_r8_spi1_slave_pre::R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_SPEC
- spi1::r8_spi1_clock_div_r8_spi1_slave_pre::W
- spi1::r8_spi1_ctrl_cfg::R
- spi1::r8_spi1_ctrl_cfg::R8_SPI1_CTRL_CFG_SPEC
- spi1::r8_spi1_ctrl_cfg::W
- spi1::r8_spi1_ctrl_mod::R
- spi1::r8_spi1_ctrl_mod::R8_SPI1_CTRL_MOD_SPEC
- spi1::r8_spi1_ctrl_mod::W
- spi1::r8_spi1_fifo::R
- spi1::r8_spi1_fifo::R8_SPI1_FIFO_SPEC
- spi1::r8_spi1_fifo::W
- spi1::r8_spi1_fifo_count1::R
- spi1::r8_spi1_fifo_count1::R8_SPI1_FIFO_COUNT1_SPEC
- spi1::r8_spi1_fifo_count1::W
- spi1::r8_spi1_fifo_count::R
- spi1::r8_spi1_fifo_count::R8_SPI1_FIFO_COUNT_SPEC
- spi1::r8_spi1_fifo_count::W
- spi1::r8_spi1_int_flag::R
- spi1::r8_spi1_int_flag::R8_SPI1_INT_FLAG_SPEC
- spi1::r8_spi1_int_flag::W
- spi1::r8_spi1_inter_en::R
- spi1::r8_spi1_inter_en::R8_SPI1_INTER_EN_SPEC
- spi1::r8_spi1_inter_en::W
- spi1::r8_spi1_run_flag::R
- spi1::r8_spi1_run_flag::R8_SPI1_RUN_FLAG_SPEC
- sys::RegisterBlock
- sys::r16_serd_ana_cfg1::R
- sys::r16_serd_ana_cfg1::R16_SERD_ANA_CFG1_SPEC
- sys::r16_serd_ana_cfg1::W
- sys::r32_pa_clr::R32_PA_CLR_SPEC
- sys::r32_pa_clr::W
- sys::r32_pa_dir::R
- sys::r32_pa_dir::R32_PA_DIR_SPEC
- sys::r32_pa_dir::W
- sys::r32_pa_drv::R
- sys::r32_pa_drv::R32_PA_DRV_SPEC
- sys::r32_pa_drv::W
- sys::r32_pa_out::R
- sys::r32_pa_out::R32_PA_OUT_SPEC
- sys::r32_pa_out::W
- sys::r32_pa_pd::R
- sys::r32_pa_pd::R32_PA_PD_SPEC
- sys::r32_pa_pd::W
- sys::r32_pa_pin::R
- sys::r32_pa_pin::R32_PA_PIN_SPEC
- sys::r32_pa_pu::R
- sys::r32_pa_pu::R32_PA_PU_SPEC
- sys::r32_pa_pu::W
- sys::r32_pa_smt::R
- sys::r32_pa_smt::R32_PA_SMT_SPEC
- sys::r32_pa_smt::W
- sys::r32_pb_clr::R32_PB_CLR_SPEC
- sys::r32_pb_clr::W
- sys::r32_pb_dir::R
- sys::r32_pb_dir::R32_PB_DIR_SPEC
- sys::r32_pb_dir::W
- sys::r32_pb_drv::R
- sys::r32_pb_drv::R32_PB_DRV_SPEC
- sys::r32_pb_drv::W
- sys::r32_pb_out::R
- sys::r32_pb_out::R32_PB_OUT_SPEC
- sys::r32_pb_out::W
- sys::r32_pb_pd::R
- sys::r32_pb_pd::R32_PB_PD_SPEC
- sys::r32_pb_pd::W
- sys::r32_pb_pin::R
- sys::r32_pb_pin::R32_PB_PIN_SPEC
- sys::r32_pb_pu::R
- sys::r32_pb_pu::R32_PB_PU_SPEC
- sys::r32_pb_pu::W
- sys::r32_pb_smt::R
- sys::r32_pb_smt::R32_PB_SMT_SPEC
- sys::r32_pb_smt::W
- sys::r32_serd_ana_cfg2::R
- sys::r32_serd_ana_cfg2::R32_SERD_ANA_CFG2_SPEC
- sys::r32_serd_ana_cfg2::W
- sys::r8_chip_id::R
- sys::r8_chip_id::R8_CHIP_ID_SPEC
- sys::r8_clk_cfg_ctrl::R
- sys::r8_clk_cfg_ctrl::R8_CLK_CFG_CTRL_SPEC
- sys::r8_clk_cfg_ctrl::W
- sys::r8_clk_mod_aux::R
- sys::r8_clk_mod_aux::R8_CLK_MOD_AUX_SPEC
- sys::r8_clk_mod_aux::W
- sys::r8_clk_pll_div::R
- sys::r8_clk_pll_div::R8_CLK_PLL_DIV_SPEC
- sys::r8_clk_pll_div::W
- sys::r8_glob_reset_keep::R
- sys::r8_glob_reset_keep::R8_GLOB_RESET_KEEP_SPEC
- sys::r8_glob_reset_keep::W
- sys::r8_glob_rom_cfg::R
- sys::r8_glob_rom_cfg::R8_GLOB_ROM_CFG_SPEC
- sys::r8_glob_rom_cfg::W
- sys::r8_gpio_int_enable::R
- sys::r8_gpio_int_enable::R8_GPIO_INT_ENABLE_SPEC
- sys::r8_gpio_int_enable::W
- sys::r8_gpio_int_flag::R
- sys::r8_gpio_int_flag::R8_GPIO_INT_FLAG_SPEC
- sys::r8_gpio_int_flag::W
- sys::r8_gpio_int_mode::R
- sys::r8_gpio_int_mode::R8_GPIO_INT_MODE_SPEC
- sys::r8_gpio_int_mode::W
- sys::r8_gpio_int_polar::R
- sys::r8_gpio_int_polar::R8_GPIO_INT_POLAR_SPEC
- sys::r8_gpio_int_polar::W
- sys::r8_pin_alternate::R
- sys::r8_pin_alternate::R8_PIN_ALTERNATE_SPEC
- sys::r8_pin_alternate::W
- sys::r8_rst_boot_stat::R
- sys::r8_rst_boot_stat::R8_RST_BOOT_STAT_SPEC
- sys::r8_rst_wdog_ctrl::R
- sys::r8_rst_wdog_ctrl::R8_RST_WDOG_CTRL_SPEC
- sys::r8_rst_wdog_ctrl::W
- sys::r8_safe_access_id::R
- sys::r8_safe_access_id::R8_SAFE_ACCESS_ID_SPEC
- sys::r8_safe_access_sig::R
- sys::r8_safe_access_sig::R8_SAFE_ACCESS_SIG_SPEC
- sys::r8_safe_access_sig::W
- sys::r8_slp_clk_off0::R
- sys::r8_slp_clk_off0::R8_SLP_CLK_OFF0_SPEC
- sys::r8_slp_clk_off0::W
- sys::r8_slp_clk_off1::R
- sys::r8_slp_clk_off1::R8_SLP_CLK_OFF1_SPEC
- sys::r8_slp_clk_off1::W
- sys::r8_slp_power_ctrl::R
- sys::r8_slp_power_ctrl::R8_SLP_POWER_CTRL_SPEC
- sys::r8_slp_power_ctrl::W
- sys::r8_slp_wake_ctrl::R
- sys::r8_slp_wake_ctrl::R8_SLP_WAKE_CTRL_SPEC
- sys::r8_slp_wake_ctrl::W
- sys::r8_wdog_count::R
- sys::r8_wdog_count::R8_WDOG_COUNT_SPEC
- sys::r8_wdog_count::W
- systick::RegisterBlock
- systick::r32_stk_cmphr::R
- systick::r32_stk_cmphr::R32_STK_CMPHR_SPEC
- systick::r32_stk_cmphr::W
- systick::r32_stk_cmplr::R
- systick::r32_stk_cmplr::R32_STK_CMPLR_SPEC
- systick::r32_stk_cmplr::W
- systick::r32_stk_cntfg::R
- systick::r32_stk_cntfg::R32_STK_CNTFG_SPEC
- systick::r32_stk_cntfg::W
- systick::r32_stk_cnth::R
- systick::r32_stk_cnth::R32_STK_CNTH_SPEC
- systick::r32_stk_cnth::W
- systick::r32_stk_cntl::R
- systick::r32_stk_cntl::R32_STK_CNTL_SPEC
- systick::r32_stk_cntl::W
- systick::r32_stk_ctlr::R
- systick::r32_stk_ctlr::R32_STK_CTLR_SPEC
- systick::r32_stk_ctlr::W
- tmr0::RegisterBlock
- tmr0::r32_tmr0_cnt_end::R
- tmr0::r32_tmr0_cnt_end::R32_TMR0_CNT_END_SPEC
- tmr0::r32_tmr0_cnt_end::W
- tmr0::r32_tmr0_count::R
- tmr0::r32_tmr0_count::R32_TMR0_COUNT_SPEC
- tmr0::r32_tmr0_fifo::R
- tmr0::r32_tmr0_fifo::R32_TMR0_FIFO_SPEC
- tmr0::r32_tmr0_fifo::W
- tmr0::r8_tmr0_ctrl_mod::R
- tmr0::r8_tmr0_ctrl_mod::R8_TMR0_CTRL_MOD_SPEC
- tmr0::r8_tmr0_ctrl_mod::W
- tmr0::r8_tmr0_fifo_count::R
- tmr0::r8_tmr0_fifo_count::R8_TMR0_FIFO_COUNT_SPEC
- tmr0::r8_tmr0_int_flag::R
- tmr0::r8_tmr0_int_flag::R8_TMR0_INT_FLAG_SPEC
- tmr0::r8_tmr0_int_flag::W
- tmr0::r8_tmr0_inter_en::R
- tmr0::r8_tmr0_inter_en::R8_TMR0_INTER_EN_SPEC
- tmr0::r8_tmr0_inter_en::W
- tmr1::RegisterBlock
- tmr1::r32_tmr1_cnt_end::R
- tmr1::r32_tmr1_cnt_end::R32_TMR1_CNT_END_SPEC
- tmr1::r32_tmr1_cnt_end::W
- tmr1::r32_tmr1_count::R
- tmr1::r32_tmr1_count::R32_TMR1_COUNT_SPEC
- tmr1::r32_tmr1_dma_beg::R
- tmr1::r32_tmr1_dma_beg::R32_TMR1_DMA_BEG_SPEC
- tmr1::r32_tmr1_dma_beg::W
- tmr1::r32_tmr1_dma_end::R
- tmr1::r32_tmr1_dma_end::R32_TMR1_DMA_END_SPEC
- tmr1::r32_tmr1_dma_end::W
- tmr1::r32_tmr1_dma_now::R
- tmr1::r32_tmr1_dma_now::R32_TMR1_DMA_NOW_SPEC
- tmr1::r32_tmr1_dma_now::W
- tmr1::r32_tmr1_fifo::R
- tmr1::r32_tmr1_fifo::R32_TMR1_FIFO_SPEC
- tmr1::r32_tmr1_fifo::W
- tmr1::r8_tmr1_ctrl_dma::R
- tmr1::r8_tmr1_ctrl_dma::R8_TMR1_CTRL_DMA_SPEC
- tmr1::r8_tmr1_ctrl_dma::W
- tmr1::r8_tmr1_ctrl_mod::R
- tmr1::r8_tmr1_ctrl_mod::R8_TMR1_CTRL_MOD_SPEC
- tmr1::r8_tmr1_ctrl_mod::W
- tmr1::r8_tmr1_fifo_count::R
- tmr1::r8_tmr1_fifo_count::R8_TMR1_FIFO_COUNT_SPEC
- tmr1::r8_tmr1_int_flag::R
- tmr1::r8_tmr1_int_flag::R8_TMR1_INT_FLAG_SPEC
- tmr1::r8_tmr1_int_flag::W
- tmr1::r8_tmr1_inter_en::R
- tmr1::r8_tmr1_inter_en::R8_TMR1_INTER_EN_SPEC
- tmr1::r8_tmr1_inter_en::W
- tmr2::RegisterBlock
- tmr2::r32_tmr2_cnt_end::R
- tmr2::r32_tmr2_cnt_end::R32_TMR2_CNT_END_SPEC
- tmr2::r32_tmr2_cnt_end::W
- tmr2::r32_tmr2_count::R
- tmr2::r32_tmr2_count::R32_TMR2_COUNT_SPEC
- tmr2::r32_tmr2_dma_beg::R
- tmr2::r32_tmr2_dma_beg::R32_TMR2_DMA_BEG_SPEC
- tmr2::r32_tmr2_dma_beg::W
- tmr2::r32_tmr2_dma_end::R
- tmr2::r32_tmr2_dma_end::R32_TMR2_DMA_END_SPEC
- tmr2::r32_tmr2_dma_end::W
- tmr2::r32_tmr2_dma_now::R
- tmr2::r32_tmr2_dma_now::R32_TMR2_DMA_NOW_SPEC
- tmr2::r32_tmr2_dma_now::W
- tmr2::r32_tmr2_fifo::R
- tmr2::r32_tmr2_fifo::R32_TMR2_FIFO_SPEC
- tmr2::r32_tmr2_fifo::W
- tmr2::r8_tmr2_ctrl_dma::R
- tmr2::r8_tmr2_ctrl_dma::R8_TMR2_CTRL_DMA_SPEC
- tmr2::r8_tmr2_ctrl_dma::W
- tmr2::r8_tmr2_ctrl_mod::R
- tmr2::r8_tmr2_ctrl_mod::R8_TMR2_CTRL_MOD_SPEC
- tmr2::r8_tmr2_ctrl_mod::W
- tmr2::r8_tmr2_fifo_count::R
- tmr2::r8_tmr2_fifo_count::R8_TMR2_FIFO_COUNT_SPEC
- tmr2::r8_tmr2_int_flag::R
- tmr2::r8_tmr2_int_flag::R8_TMR2_INT_FLAG_SPEC
- tmr2::r8_tmr2_int_flag::W
- tmr2::r8_tmr2_inter_en::R
- tmr2::r8_tmr2_inter_en::R8_TMR2_INTER_EN_SPEC
- tmr2::r8_tmr2_inter_en::W
- uart0::RegisterBlock
- uart0::r16_uart0_dl::R
- uart0::r16_uart0_dl::R16_UART0_DL_SPEC
- uart0::r16_uart0_dl::W
- uart0::r8_uart0_adr::R
- uart0::r8_uart0_adr::R8_UART0_ADR_SPEC
- uart0::r8_uart0_adr::W
- uart0::r8_uart0_div::R
- uart0::r8_uart0_div::R8_UART0_DIV_SPEC
- uart0::r8_uart0_div::W
- uart0::r8_uart0_fcr::R
- uart0::r8_uart0_fcr::R8_UART0_FCR_SPEC
- uart0::r8_uart0_fcr::W
- uart0::r8_uart0_ier::R
- uart0::r8_uart0_ier::R8_UART0_IER_SPEC
- uart0::r8_uart0_ier::W
- uart0::r8_uart0_iir::R
- uart0::r8_uart0_iir::R8_UART0_IIR_SPEC
- uart0::r8_uart0_lcr::R
- uart0::r8_uart0_lcr::R8_UART0_LCR_SPEC
- uart0::r8_uart0_lcr::W
- uart0::r8_uart0_lsr::R
- uart0::r8_uart0_lsr::R8_UART0_LSR_SPEC
- uart0::r8_uart0_mcr::R
- uart0::r8_uart0_mcr::R8_UART0_MCR_SPEC
- uart0::r8_uart0_mcr::W
- uart0::r8_uart0_msr::R
- uart0::r8_uart0_msr::R8_UART0_MSR_SPEC
- uart0::r8_uart0_rbr_r8_uart0_thr::R
- uart0::r8_uart0_rbr_r8_uart0_thr::R8_UART0_RBR_R8_UART0_THR_SPEC
- uart0::r8_uart0_rbr_r8_uart0_thr::W
- uart0::r8_uart0_rfc::R
- uart0::r8_uart0_rfc::R8_UART0_RFC_SPEC
- uart0::r8_uart0_tfc::R
- uart0::r8_uart0_tfc::R8_UART0_TFC_SPEC
- uart1::RegisterBlock
- uart1::r16_uart1_dl::R
- uart1::r16_uart1_dl::R16_UART1_DL_SPEC
- uart1::r16_uart1_dl::W
- uart1::r8_uart1_div::R
- uart1::r8_uart1_div::R8_UART1_DIV_SPEC
- uart1::r8_uart1_div::W
- uart1::r8_uart1_fcr::R
- uart1::r8_uart1_fcr::R8_UART1_FCR_SPEC
- uart1::r8_uart1_fcr::W
- uart1::r8_uart1_ier::R
- uart1::r8_uart1_ier::R8_UART1_IER_SPEC
- uart1::r8_uart1_ier::W
- uart1::r8_uart1_iir::R
- uart1::r8_uart1_iir::R8_UART1_IIR_SPEC
- uart1::r8_uart1_lcr::R
- uart1::r8_uart1_lcr::R8_UART1_LCR_SPEC
- uart1::r8_uart1_lcr::W
- uart1::r8_uart1_lsr::R
- uart1::r8_uart1_lsr::R8_UART1_LSR_SPEC
- uart1::r8_uart1_mcr::R
- uart1::r8_uart1_mcr::R8_UART1_MCR_SPEC
- uart1::r8_uart1_mcr::W
- uart1::r8_uart1_rbr_r8_uart1_thr::R
- uart1::r8_uart1_rbr_r8_uart1_thr::R8_UART1_RBR_R8_UART1_THR_SPEC
- uart1::r8_uart1_rbr_r8_uart1_thr::W
- uart1::r8_uart1_rfc::R
- uart1::r8_uart1_rfc::R8_UART1_RFC_SPEC
- uart1::r8_uart1_tfc::R
- uart1::r8_uart1_tfc::R8_UART1_TFC_SPEC
- uart2::RegisterBlock
- uart2::r16_uart2_dl::R
- uart2::r16_uart2_dl::R16_UART2_DL_SPEC
- uart2::r16_uart2_dl::W
- uart2::r8_uart2_div::R
- uart2::r8_uart2_div::R8_UART2_DIV_SPEC
- uart2::r8_uart2_div::W
- uart2::r8_uart2_fcr::R
- uart2::r8_uart2_fcr::R8_UART2_FCR_SPEC
- uart2::r8_uart2_fcr::W
- uart2::r8_uart2_ier::R
- uart2::r8_uart2_ier::R8_UART2_IER_SPEC
- uart2::r8_uart2_ier::W
- uart2::r8_uart2_iir::R
- uart2::r8_uart2_iir::R8_UART2_IIR_SPEC
- uart2::r8_uart2_lcr::R
- uart2::r8_uart2_lcr::R8_UART2_LCR_SPEC
- uart2::r8_uart2_lcr::W
- uart2::r8_uart2_lsr::R
- uart2::r8_uart2_lsr::R8_UART2_LSR_SPEC
- uart2::r8_uart2_mcr::R
- uart2::r8_uart2_mcr::R8_UART2_MCR_SPEC
- uart2::r8_uart2_mcr::W
- uart2::r8_uart2_rbr_r8_uart2_thr::R
- uart2::r8_uart2_rbr_r8_uart2_thr::R8_UART2_RBR_R8_UART2_THR_SPEC
- uart2::r8_uart2_rbr_r8_uart2_thr::W
- uart2::r8_uart2_rfc::R
- uart2::r8_uart2_rfc::R8_UART2_RFC_SPEC
- uart2::r8_uart2_tfc::R
- uart2::r8_uart2_tfc::R8_UART2_TFC_SPEC
- uart3::RegisterBlock
- uart3::r16_uart3_dl::R
- uart3::r16_uart3_dl::R16_UART3_DL_SPEC
- uart3::r16_uart3_dl::W
- uart3::r8_uart3_div::R
- uart3::r8_uart3_div::R8_UART3_DIV_SPEC
- uart3::r8_uart3_div::W
- uart3::r8_uart3_fcr::R
- uart3::r8_uart3_fcr::R8_UART3_FCR_SPEC
- uart3::r8_uart3_fcr::W
- uart3::r8_uart3_ier::R
- uart3::r8_uart3_ier::R8_UART3_IER_SPEC
- uart3::r8_uart3_ier::W
- uart3::r8_uart3_iir::R
- uart3::r8_uart3_iir::R8_UART3_IIR_SPEC
- uart3::r8_uart3_lcr::R
- uart3::r8_uart3_lcr::R8_UART3_LCR_SPEC
- uart3::r8_uart3_lcr::W
- uart3::r8_uart3_lsr::R
- uart3::r8_uart3_lsr::R8_UART3_LSR_SPEC
- uart3::r8_uart3_mcr::R
- uart3::r8_uart3_mcr::R8_UART3_MCR_SPEC
- uart3::r8_uart3_mcr::W
- uart3::r8_uart3_rbr_r8_uart3_thr::R
- uart3::r8_uart3_rbr_r8_uart3_thr::R8_UART3_RBR_R8_UART3_THR_SPEC
- uart3::r8_uart3_rbr_r8_uart3_thr::W
- uart3::r8_uart3_rfc::R
- uart3::r8_uart3_rfc::R8_UART3_RFC_SPEC
- uart3::r8_uart3_tfc::R
- uart3::r8_uart3_tfc::R8_UART3_TFC_SPEC
- usbhs::RegisterBlock
- usbhs::r16_uep0_max_len::R
- usbhs::r16_uep0_max_len::R16_UEP0_MAX_LEN_SPEC
- usbhs::r16_uep0_max_len::W
- usbhs::r16_uep0_t_len::R
- usbhs::r16_uep0_t_len::R16_UEP0_T_LEN_SPEC
- usbhs::r16_uep0_t_len::W
- usbhs::r16_uep1_max_len::R
- usbhs::r16_uep1_max_len::R16_UEP1_MAX_LEN_SPEC
- usbhs::r16_uep1_max_len::W
- usbhs::r16_uep1_t_len::R
- usbhs::r16_uep1_t_len::R16_UEP1_T_LEN_SPEC
- usbhs::r16_uep1_t_len::W
- usbhs::r16_uep2_max_len_r16_uh_max_len::R
- usbhs::r16_uep2_max_len_r16_uh_max_len::R16_UEP2_MAX_LEN_R16_UH_MAX_LEN_SPEC
- usbhs::r16_uep2_max_len_r16_uh_max_len::W
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::R
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::R16_UEP2_T_LEN_R16_UH_EP_PID_SPEC
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::W
- usbhs::r16_uep3_max_len::R
- usbhs::r16_uep3_max_len::R16_UEP3_MAX_LEN_SPEC
- usbhs::r16_uep3_max_len::W
- usbhs::r16_uep3_t_len_r16_uh_tx_len::R
- usbhs::r16_uep3_t_len_r16_uh_tx_len::R16_UEP3_T_LEN_R16_UH_TX_LEN_SPEC
- usbhs::r16_uep3_t_len_r16_uh_tx_len::W
- usbhs::r16_uep4_max_len::R
- usbhs::r16_uep4_max_len::R16_UEP4_MAX_LEN_SPEC
- usbhs::r16_uep4_max_len::W
- usbhs::r16_uep4_t_len_r16_uh_split_data::R
- usbhs::r16_uep4_t_len_r16_uh_split_data::R16_UEP4_T_LEN_R16_UH_SPLIT_DATA_SPEC
- usbhs::r16_uep4_t_len_r16_uh_split_data::W
- usbhs::r16_uep5_max_len::R
- usbhs::r16_uep5_max_len::R16_UEP5_MAX_LEN_SPEC
- usbhs::r16_uep5_max_len::W
- usbhs::r16_uep5_t_len::R
- usbhs::r16_uep5_t_len::R16_UEP5_T_LEN_SPEC
- usbhs::r16_uep5_t_len::W
- usbhs::r16_uep6_max_len::R
- usbhs::r16_uep6_max_len::R16_UEP6_MAX_LEN_SPEC
- usbhs::r16_uep6_max_len::W
- usbhs::r16_uep6_t_len::R
- usbhs::r16_uep6_t_len::R16_UEP6_T_LEN_SPEC
- usbhs::r16_uep6_t_len::W
- usbhs::r16_uep7_max_len::R
- usbhs::r16_uep7_max_len::R16_UEP7_MAX_LEN_SPEC
- usbhs::r16_uep7_max_len::W
- usbhs::r16_uep7_t_len::R
- usbhs::r16_uep7_t_len::R16_UEP7_T_LEN_SPEC
- usbhs::r16_uep7_t_len::W
- usbhs::r16_usb_frame_no::R
- usbhs::r16_usb_frame_no::R16_USB_FRAME_NO_SPEC
- usbhs::r32_uep0_rt_dma::R
- usbhs::r32_uep0_rt_dma::R32_UEP0_RT_DMA_SPEC
- usbhs::r32_uep0_rt_dma::W
- usbhs::r32_uep1_rx_dma::R
- usbhs::r32_uep1_rx_dma::R32_UEP1_RX_DMA_SPEC
- usbhs::r32_uep1_rx_dma::W
- usbhs::r32_uep1_tx_dma::R
- usbhs::r32_uep1_tx_dma::R32_UEP1_TX_DMA_SPEC
- usbhs::r32_uep1_tx_dma::W
- usbhs::r32_uep2_rx_dma_r32_uh_rx_dma::R
- usbhs::r32_uep2_rx_dma_r32_uh_rx_dma::R32_UEP2_RX_DMA_R32_UH_RX_DMA_SPEC
- usbhs::r32_uep2_rx_dma_r32_uh_rx_dma::W
- usbhs::r32_uep2_tx_dma::R
- usbhs::r32_uep2_tx_dma::R32_UEP2_TX_DMA_SPEC
- usbhs::r32_uep2_tx_dma::W
- usbhs::r32_uep3_rx_dma::R
- usbhs::r32_uep3_rx_dma::R32_UEP3_RX_DMA_SPEC
- usbhs::r32_uep3_rx_dma::W
- usbhs::r32_uep3_tx_dma_r32_uh_tx_dma::R
- usbhs::r32_uep3_tx_dma_r32_uh_tx_dma::R32_UEP3_TX_DMA_R32_UH_TX_DMA_SPEC
- usbhs::r32_uep3_tx_dma_r32_uh_tx_dma::W
- usbhs::r32_uep4_rx_dma::R
- usbhs::r32_uep4_rx_dma::R32_UEP4_RX_DMA_SPEC
- usbhs::r32_uep4_rx_dma::W
- usbhs::r32_uep4_tx_dma::R
- usbhs::r32_uep4_tx_dma::R32_UEP4_TX_DMA_SPEC
- usbhs::r32_uep4_tx_dma::W
- usbhs::r32_uep5_rx_dma::R
- usbhs::r32_uep5_rx_dma::R32_UEP5_RX_DMA_SPEC
- usbhs::r32_uep5_rx_dma::W
- usbhs::r32_uep5_tx_dma::R
- usbhs::r32_uep5_tx_dma::R32_UEP5_TX_DMA_SPEC
- usbhs::r32_uep5_tx_dma::W
- usbhs::r32_uep6_rx_dma::R
- usbhs::r32_uep6_rx_dma::R32_UEP6_RX_DMA_SPEC
- usbhs::r32_uep6_rx_dma::W
- usbhs::r32_uep6_tx_dma::R
- usbhs::r32_uep6_tx_dma::R32_UEP6_TX_DMA_SPEC
- usbhs::r32_uep6_tx_dma::W
- usbhs::r32_uep7_rx_dma::R
- usbhs::r32_uep7_rx_dma::R32_UEP7_RX_DMA_SPEC
- usbhs::r32_uep7_rx_dma::W
- usbhs::r32_uep7_tx_dma::R
- usbhs::r32_uep7_tx_dma::R32_UEP7_TX_DMA_SPEC
- usbhs::r32_uep7_tx_dma::W
- usbhs::r6_usb_rx_len::R
- usbhs::r6_usb_rx_len::R6_USB_RX_LEN_SPEC
- usbhs::r8_uep0_rx_ctrl::R
- usbhs::r8_uep0_rx_ctrl::R8_UEP0_RX_CTRL_SPEC
- usbhs::r8_uep0_rx_ctrl::W
- usbhs::r8_uep0_tx_ctrl::R
- usbhs::r8_uep0_tx_ctrl::R8_UEP0_TX_CTRL_SPEC
- usbhs::r8_uep0_tx_ctrl::W
- usbhs::r8_uep1_rx_ctrl::R
- usbhs::r8_uep1_rx_ctrl::R8_UEP1_RX_CTRL_SPEC
- usbhs::r8_uep1_rx_ctrl::W
- usbhs::r8_uep1_tx_ctrl::R
- usbhs::r8_uep1_tx_ctrl::R8_UEP1_TX_CTRL_SPEC
- usbhs::r8_uep1_tx_ctrl::W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::R8_UEP2_3_MOD_R8_UH_EP_MOD_SPEC
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::W
- usbhs::r8_uep2_tx_ctrl::R
- usbhs::r8_uep2_tx_ctrl::R8_UEP2_TX_CTRL_SPEC
- usbhs::r8_uep2_tx_ctrl::W
- usbhs::r8_uep3_rx_ctrl::R
- usbhs::r8_uep3_rx_ctrl::R8_UEP3_RX_CTRL_SPEC
- usbhs::r8_uep3_rx_ctrl::W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::R8_UEP3_TX_CTRL_R8_UH_TX_CTRL_SPEC
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::W
- usbhs::r8_uep4_1_mod::R
- usbhs::r8_uep4_1_mod::R8_UEP4_1_MOD_SPEC
- usbhs::r8_uep4_1_mod::W
- usbhs::r8_uep4_rx_ctrl::R
- usbhs::r8_uep4_rx_ctrl::R8_UEP4_RX_CTRL_SPEC
- usbhs::r8_uep4_rx_ctrl::W
- usbhs::r8_uep4_tx_ctrl::R
- usbhs::r8_uep4_tx_ctrl::R8_UEP4_TX_CTRL_SPEC
- usbhs::r8_uep4_tx_ctrl::W
- usbhs::r8_uep5_6_mod::R
- usbhs::r8_uep5_6_mod::R8_UEP5_6_MOD_SPEC
- usbhs::r8_uep5_6_mod::W
- usbhs::r8_uep5_rx_ctrl::R
- usbhs::r8_uep5_rx_ctrl::R8_UEP5_RX_CTRL_SPEC
- usbhs::r8_uep5_rx_ctrl::W
- usbhs::r8_uep5_tx_ctrl::R
- usbhs::r8_uep5_tx_ctrl::R8_UEP5_TX_CTRL_SPEC
- usbhs::r8_uep5_tx_ctrl::W
- usbhs::r8_uep6_rx_ctrl::R
- usbhs::r8_uep6_rx_ctrl::R8_UEP6_RX_CTRL_SPEC
- usbhs::r8_uep6_rx_ctrl::W
- usbhs::r8_uep6_tx_ctrl::R
- usbhs::r8_uep6_tx_ctrl::R8_UEP6_TX_CTRL_SPEC
- usbhs::r8_uep6_tx_ctrl::W
- usbhs::r8_uep7_mod::R
- usbhs::r8_uep7_mod::R8_UEP7_MOD_SPEC
- usbhs::r8_uep7_mod::W
- usbhs::r8_uep7_rx_ctrl::R
- usbhs::r8_uep7_rx_ctrl::R8_UEP7_RX_CTRL_SPEC
- usbhs::r8_uep7_rx_ctrl::W
- usbhs::r8_uep7_tx_ctrl::R
- usbhs::r8_uep7_tx_ctrl::R8_UEP7_TX_CTRL_SPEC
- usbhs::r8_uep7_tx_ctrl::W
- usbhs::r8_uhost_ctrl::R
- usbhs::r8_uhost_ctrl::R8_UHOST_CTRL_SPEC
- usbhs::r8_uhost_ctrl::W
- usbhs::r8_usb_ctrl::R
- usbhs::r8_usb_ctrl::R8_USB_CTRL_SPEC
- usbhs::r8_usb_ctrl::W
- usbhs::r8_usb_dev_ad::R
- usbhs::r8_usb_dev_ad::R8_USB_DEV_AD_SPEC
- usbhs::r8_usb_dev_ad::W
- usbhs::r8_usb_int_en::R
- usbhs::r8_usb_int_en::R8_USB_INT_EN_SPEC
- usbhs::r8_usb_int_en::W
- usbhs::r8_usb_int_fg::R
- usbhs::r8_usb_int_fg::R8_USB_INT_FG_SPEC
- usbhs::r8_usb_int_fg::W
- usbhs::r8_usb_int_st::R
- usbhs::r8_usb_int_st::R8_USB_INT_ST_SPEC
- usbhs::r8_usb_mis_st::R
- usbhs::r8_usb_mis_st::R8_USB_MIS_ST_SPEC
- usbhs::r8_usb_spd_type::R
- usbhs::r8_usb_spd_type::R8_USB_SPD_TYPE_SPEC
- usbhs::r8_usb_suspend::R
- usbhs::r8_usb_suspend::R8_USB_SUSPEND_SPEC
- usbhs::r8_usb_suspend::W
Traits
Type Definitions
- dvp::R16_DVP_COL_CNT
- dvp::R16_DVP_COL_NUM
- dvp::R16_DVP_ROW_CNT
- dvp::R16_DVP_ROW_NUM
- dvp::R32_DVP_DMA_BUF0
- dvp::R32_DVP_DMA_BUF1
- dvp::R8_DVP_CR0
- dvp::R8_DVP_CR1
- dvp::R8_DVP_FIFO_ST
- dvp::R8_DVP_INT_EN
- dvp::R8_DVP_INT_FLAG
- dvp::r16_dvp_col_cnt::RB_DVP_COL_CNT_R
- dvp::r16_dvp_col_num::RB_DVP_COL_NUM_R
- dvp::r16_dvp_col_num::RB_DVP_COL_NUM_W
- dvp::r16_dvp_row_cnt::RB_DVP_ROW_CNT_R
- dvp::r16_dvp_row_num::RB_DVP_ROW_NUM_R
- dvp::r16_dvp_row_num::RB_DVP_ROW_NUM_W
- dvp::r32_dvp_dma_buf0::RB_DVP_DMA_BUF0_R
- dvp::r32_dvp_dma_buf0::RB_DVP_DMA_BUF0_W
- dvp::r32_dvp_dma_buf1::RB_DVP_DMA_BUF1_R
- dvp::r32_dvp_dma_buf1::RB_DVP_DMA_BUF1_W
- dvp::r8_dvp_cr0::RB_DVP_ENABLE_R
- dvp::r8_dvp_cr0::RB_DVP_ENABLE_W
- dvp::r8_dvp_cr0::RB_DVP_H_POLAR_R
- dvp::r8_dvp_cr0::RB_DVP_H_POLAR_W
- dvp::r8_dvp_cr0::RB_DVP_JPEG_R
- dvp::r8_dvp_cr0::RB_DVP_JPEG_W
- dvp::r8_dvp_cr0::RB_DVP_MSK_DAT_MOD_R
- dvp::r8_dvp_cr0::RB_DVP_MSK_DAT_MOD_W
- dvp::r8_dvp_cr0::RB_DVP_P_POLAR_R
- dvp::r8_dvp_cr0::RB_DVP_P_POLAR_W
- dvp::r8_dvp_cr0::RB_DVP_RAW_CM_R
- dvp::r8_dvp_cr0::RB_DVP_RAW_CM_W
- dvp::r8_dvp_cr0::RB_DVP_V_POLAR_R
- dvp::r8_dvp_cr0::RB_DVP_V_POLAR_W
- dvp::r8_dvp_cr1::RB_DVP_ALL_CLR_R
- dvp::r8_dvp_cr1::RB_DVP_ALL_CLR_W
- dvp::r8_dvp_cr1::RB_DVP_BUF_TOG_R
- dvp::r8_dvp_cr1::RB_DVP_BUF_TOG_W
- dvp::r8_dvp_cr1::RB_DVP_DMA_ENABLE_R
- dvp::r8_dvp_cr1::RB_DVP_DMA_ENABLE_W
- dvp::r8_dvp_cr1::RB_DVP_RCV_CLR_R
- dvp::r8_dvp_cr1::RB_DVP_RCV_CLR_W
- dvp::r8_dvp_fifo_st::RB_DVP_FIFO_FULL_R
- dvp::r8_dvp_fifo_st::RB_DVP_FIFO_OV_R
- dvp::r8_dvp_fifo_st::RB_DVP_FIFO_RDY_R
- dvp::r8_dvp_fifo_st::RB_DVP_MSK_FIFO_CNT_R
- dvp::r8_dvp_int_en::RB_DVP_IE_FIFO_OV_R
- dvp::r8_dvp_int_en::RB_DVP_IE_FIFO_OV_W
- dvp::r8_dvp_int_en::RB_DVP_IE_FRM_DONE_R
- dvp::r8_dvp_int_en::RB_DVP_IE_FRM_DONE_W
- dvp::r8_dvp_int_en::RB_DVP_IE_ROW_DONE_R
- dvp::r8_dvp_int_en::RB_DVP_IE_ROW_DONE_W
- dvp::r8_dvp_int_en::RB_DVP_IE_STP_FRM_R
- dvp::r8_dvp_int_en::RB_DVP_IE_STP_FRM_W
- dvp::r8_dvp_int_en::RB_DVP_IE_STR_FRM_R
- dvp::r8_dvp_int_en::RB_DVP_IE_STR_FRM_W
- dvp::r8_dvp_int_flag::RB_DVP_IF_FIFO_OV_R
- dvp::r8_dvp_int_flag::RB_DVP_IF_FIFO_OV_W
- dvp::r8_dvp_int_flag::RB_DVP_IF_FRM_DONE_R
- dvp::r8_dvp_int_flag::RB_DVP_IF_FRM_DONE_W
- dvp::r8_dvp_int_flag::RB_DVP_IF_ROW_DONE_R
- dvp::r8_dvp_int_flag::RB_DVP_IF_ROW_DONE_W
- dvp::r8_dvp_int_flag::RB_DVP_IF_STP_FRM_R
- dvp::r8_dvp_int_flag::RB_DVP_IF_STP_FRM_W
- dvp::r8_dvp_int_flag::RB_DVP_IF_STR_FRM_R
- dvp::r8_dvp_int_flag::RB_DVP_IF_STR_FRM_W
- ecdc::R16_ECEC_CTRL
- ecdc::R32_ECDC_IV_127T96
- ecdc::R32_ECDC_IV_31T0
- ecdc::R32_ECDC_IV_63T32
- ecdc::R32_ECDC_IV_95T64
- ecdc::R32_ECDC_KEY_127T96
- ecdc::R32_ECDC_KEY_159T128
- ecdc::R32_ECDC_KEY_191T160
- ecdc::R32_ECDC_KEY_223T192
- ecdc::R32_ECDC_KEY_255T224
- ecdc::R32_ECDC_KEY_31T0
- ecdc::R32_ECDC_KEY_63T32
- ecdc::R32_ECDC_KEY_95T64
- ecdc::R32_ECDC_SGRT_127T96
- ecdc::R32_ECDC_SGRT_63T32
- ecdc::R32_ECDC_SGRT_95T64
- ecdc::R32_ECDC_SGSD_127T96
- ecdc::R32_ECDC_SGSD_31T0
- ecdc::R32_ECDC_SGSD_63T32
- ecdc::R32_ECDC_SGSD_95T64
- ecdc::R32_ECDC_SRAM_ADDR
- ecdc::R32_ECDC_SRAM_LEN
- ecdc::R8_ECDC_INT_EN
- ecdc::R8_ECDC_INT_FG
- ecdc::RB_ECDC_SGRT_31T0
- ecdc::r16_ecec_ctrl::RB_ECDC_ALGRM_MOD_R
- ecdc::r16_ecec_ctrl::RB_ECDC_ALGRM_MOD_W
- ecdc::r16_ecec_ctrl::RB_ECDC_CIPHER_MOD_R
- ecdc::r16_ecec_ctrl::RB_ECDC_CIPHER_MOD_W
- ecdc::r16_ecec_ctrl::RB_ECDC_CLKDIV_MASK_R
- ecdc::r16_ecec_ctrl::RB_ECDC_CLKDIV_MASK_W
- ecdc::r16_ecec_ctrl::RB_ECDC_DAT_MOD_R
- ecdc::r16_ecec_ctrl::RB_ECDC_DAT_MOD_W
- ecdc::r16_ecec_ctrl::RB_ECDC_KEYEX_EN_R
- ecdc::r16_ecec_ctrl::RB_ECDC_KEYEX_EN_W
- ecdc::r16_ecec_ctrl::RB_ECDC_KLEN_MASK_R
- ecdc::r16_ecec_ctrl::RB_ECDC_KLEN_MASK_W
- ecdc::r16_ecec_ctrl::RB_ECDC_MODE_SEL_R
- ecdc::r16_ecec_ctrl::RB_ECDC_MODE_SEL_W
- ecdc::r16_ecec_ctrl::RB_ECDC_RDPERI_EN_R
- ecdc::r16_ecec_ctrl::RB_ECDC_RDPERI_EN_W
- ecdc::r16_ecec_ctrl::RB_ECDC_WRPERI_EN_R
- ecdc::r16_ecec_ctrl::RB_ECDC_WRPERI_EN_W
- ecdc::r16_ecec_ctrl::RB_ECDC_WRSRAM_EN_R
- ecdc::r16_ecec_ctrl::RB_ECDC_WRSRAM_EN_W
- ecdc::r32_ecdc_iv_127t96::RB_ECDC_IV_127T96_R
- ecdc::r32_ecdc_iv_127t96::RB_ECDC_IV_127T96_W
- ecdc::r32_ecdc_iv_31t0::RB_ECDC_IV_31T0_R
- ecdc::r32_ecdc_iv_31t0::RB_ECDC_IV_31T0_W
- ecdc::r32_ecdc_iv_63t32::RB_ECDC_IV_63T32_R
- ecdc::r32_ecdc_iv_63t32::RB_ECDC_IV_63T32_W
- ecdc::r32_ecdc_iv_95t64::RB_ECDC_IV_95T64_R
- ecdc::r32_ecdc_iv_95t64::RB_ECDC_IV_95T64_W
- ecdc::r32_ecdc_key_127t96::RB_ECDC_KEY_127T96_R
- ecdc::r32_ecdc_key_127t96::RB_ECDC_KEY_127T96_W
- ecdc::r32_ecdc_key_159t128::RB_ECDC_KEY_159T128_R
- ecdc::r32_ecdc_key_159t128::RB_ECDC_KEY_159T128_W
- ecdc::r32_ecdc_key_191t160::RB_ECDC_KEY_191T160_R
- ecdc::r32_ecdc_key_191t160::RB_ECDC_KEY_191T160_W
- ecdc::r32_ecdc_key_223t192::RB_ECDC_KEY_223T192_R
- ecdc::r32_ecdc_key_223t192::RB_ECDC_KEY_223T192_W
- ecdc::r32_ecdc_key_255t224::RB_ECDC_KEY_255T224_R
- ecdc::r32_ecdc_key_255t224::RB_ECDC_KEY_255T224_W
- ecdc::r32_ecdc_key_31t0::RB_ECDC_KEY_31T0_R
- ecdc::r32_ecdc_key_31t0::RB_ECDC_KEY_31T0_W
- ecdc::r32_ecdc_key_63t32::RB_ECDC_KEY_63T32_R
- ecdc::r32_ecdc_key_63t32::RB_ECDC_KEY_63T32_W
- ecdc::r32_ecdc_key_95t64::RB_ECDC_KEY_95T64_R
- ecdc::r32_ecdc_key_95t64::RB_ECDC_KEY_95T64_W
- ecdc::r32_ecdc_sgrt_127t96::RB_ECDC_SGRT_127T96_R
- ecdc::r32_ecdc_sgrt_127t96::RB_ECDC_SGRT_127T96_W
- ecdc::r32_ecdc_sgrt_63t32::RB_ECDC_SGRT_63T32_R
- ecdc::r32_ecdc_sgrt_63t32::RB_ECDC_SGRT_63T32_W
- ecdc::r32_ecdc_sgrt_95t64::RB_ECDC_SGRT_95T64_R
- ecdc::r32_ecdc_sgrt_95t64::RB_ECDC_SGRT_95T64_W
- ecdc::r32_ecdc_sgsd_127t96::RB_ECDC_SGSD_127T96_R
- ecdc::r32_ecdc_sgsd_127t96::RB_ECDC_SGSD_127T96_W
- ecdc::r32_ecdc_sgsd_31t0::RB_ECDC_SGSD_31T0_R
- ecdc::r32_ecdc_sgsd_31t0::RB_ECDC_SGSD_31T0_W
- ecdc::r32_ecdc_sgsd_63t32::RB_ECDC_SGSD_63T32_R
- ecdc::r32_ecdc_sgsd_63t32::RB_ECDC_SGSD_63T32_W
- ecdc::r32_ecdc_sgsd_95t64::RB_ECDC_SGSD_95T64_R
- ecdc::r32_ecdc_sgsd_95t64::RB_ECDC_SGSD_95T64_W
- ecdc::r32_ecdc_sram_addr::RB_ECDC_SRAM_ADDR_R
- ecdc::r32_ecdc_sram_addr::RB_ECDC_SRAM_ADDR_W
- ecdc::r32_ecdc_sram_len::RB_ECDC_SRAM_LEN_R
- ecdc::r32_ecdc_sram_len::RB_ECDC_SRAM_LEN_W
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_EKDONE_R
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_EKDONE_W
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_SINGLE_R
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_SINGLE_W
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_WRSRAM_R
- ecdc::r8_ecdc_int_en::RB_ECDC_IE_WRSRAM_W
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_EKDONE_R
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_EKDONE_W
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_SINGLE_R
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_SINGLE_W
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_WRSRAM_R
- ecdc::r8_ecdc_int_fg::RB_ECDC_IF_WRSRAM_W
- ecdc::rb_ecdc_sgrt_31t0::RB_ECDC_SGRT_31T0_R
- ecdc::rb_ecdc_sgrt_31t0::RB_ECDC_SGRT_31T0_W
- emmc::R16_EMMC_CLK_DIV
- emmc::R16_EMMC_CMD_SET
- emmc::R16_EMMC_INT_EN
- emmc::R16_EMMC_INT_FG
- emmc::R32_EMMC_ARGUMENT
- emmc::R32_EMMC_BLOCK_CFG
- emmc::R32_EMMC_DMA_BEG1
- emmc::R32_EMMC_DMA_BEG2
- emmc::R32_EMMC_RESPONSE0
- emmc::R32_EMMC_RESPONSE1
- emmc::R32_EMMC_RESPONSE2
- emmc::R32_EMMC_RESPONSE3
- emmc::R32_EMMC_STATUS
- emmc::R32_EMMC_TRAN_MODE
- emmc::R32_EMMC_WRITE_CONT
- emmc::R8_EMMC_CONTROL
- emmc::R8_EMMC_TIMEOUT
- emmc::r16_emmc_clk_div::RB_EMMC_CLKMODE_R
- emmc::r16_emmc_clk_div::RB_EMMC_CLKMODE_W
- emmc::r16_emmc_clk_div::RB_EMMC_CLKOE_R
- emmc::r16_emmc_clk_div::RB_EMMC_CLKOE_W
- emmc::r16_emmc_clk_div::RB_EMMC_DIV_MASK_R
- emmc::r16_emmc_clk_div::RB_EMMC_DIV_MASK_W
- emmc::r16_emmc_clk_div::RB_EMMC_PHASEINV_R
- emmc::r16_emmc_clk_div::RB_EMMC_PHASEINV_W
- emmc::r16_emmc_cmd_set::RB_EMMC_CKCRC_R
- emmc::r16_emmc_cmd_set::RB_EMMC_CKCRC_W
- emmc::r16_emmc_cmd_set::RB_EMMC_CKIDX_R
- emmc::r16_emmc_cmd_set::RB_EMMC_CKIDX_W
- emmc::r16_emmc_cmd_set::RB_EMMC_CMDIDX_MASK_R
- emmc::r16_emmc_cmd_set::RB_EMMC_CMDIDX_MASK_W
- emmc::r16_emmc_cmd_set::RB_EMMC_RPTY_MASK_R
- emmc::r16_emmc_cmd_set::RB_EMMC_RPTY_MASK_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_BKGAP_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_BKGAP_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_CMDDONE_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_CMDDONE_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_DATTMO_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_DATTMO_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_FIFO_OV_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_FIFO_OV_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_RECRC_WR_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_RECRC_WR_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_REIDX_ER_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_REIDX_ER_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_RE_TMOUT_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_RE_TMOUT_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_SDIOINT_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_SDIOINT_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_TRANDONE_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_TRANDONE_W
- emmc::r16_emmc_int_en::RB_EMMC_IE_TRANERR_R
- emmc::r16_emmc_int_en::RB_EMMC_IE_TRANERR_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_BKGAP_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_BKGAP_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_CMDDONE_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_CMDDONE_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_DATTMO_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_DATTMO_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_FIFO_OV_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_FIFO_OV_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_RECRC_WR_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_RECRC_WR_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_REIDX_ER_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_REIDX_ER_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_RE_TMOUT_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_RE_TMOUT_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_SDIOINT_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_SDIOINT_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_TRANDONE_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_TRANDONE_W
- emmc::r16_emmc_int_fg::RB_EMMC_IF_TRANERR_R
- emmc::r16_emmc_int_fg::RB_EMMC_IF_TRANERR_W
- emmc::r32_emmc_argument::EMMC_ARGUMENT_R
- emmc::r32_emmc_argument::EMMC_ARGUMENT_W
- emmc::r32_emmc_block_cfg::RB_EMMC_BKNUM_MASK_R
- emmc::r32_emmc_block_cfg::RB_EMMC_BKNUM_MASK_W
- emmc::r32_emmc_block_cfg::RB_EMMC_BKSIZE_MASK_R
- emmc::r32_emmc_block_cfg::RB_EMMC_BKSIZE_MASK_W
- emmc::r32_emmc_dma_beg1::RB_EMMC_DMAAD1_MASK_R
- emmc::r32_emmc_dma_beg1::RB_EMMC_DMAAD1_MASK_W
- emmc::r32_emmc_dma_beg2::RB_EMMC_DMAAD2_MASK_R
- emmc::r32_emmc_dma_beg2::RB_EMMC_DMAAD2_MASK_W
- emmc::r32_emmc_response0::R32_EMMC_RESPONSE0_R
- emmc::r32_emmc_response1::R32_EMMC_RESPONSE1_R
- emmc::r32_emmc_response2::R32_EMMC_RESPONSE2_R
- emmc::r32_emmc_response3::R32_EMMC_RESPONSE3_R
- emmc::r32_emmc_status::MASK_BLOCK_NUM_R
- emmc::r32_emmc_status::RB_EMMC_CMDSTA_R
- emmc::r32_emmc_status::RB_EMMC_DAT0STA_R
- emmc::r32_emmc_tran_mode::RB_EMMC_AUTOGAPSTOP_R
- emmc::r32_emmc_tran_mode::RB_EMMC_AUTOGAPSTOP_W
- emmc::r32_emmc_tran_mode::RB_EMMC_DMATN_CNT_R
- emmc::r32_emmc_tran_mode::RB_EMMC_DMATN_CNT_W
- emmc::r32_emmc_tran_mode::RB_EMMC_DMA_DIR_R
- emmc::r32_emmc_tran_mode::RB_EMMC_DMA_DIR_W
- emmc::r32_emmc_tran_mode::RB_EMMC_DULEDMA_EN_R
- emmc::r32_emmc_tran_mode::RB_EMMC_DULEDMA_EN_W
- emmc::r32_emmc_tran_mode::RB_EMMC_FIFO_RDY_R
- emmc::r32_emmc_tran_mode::RB_EMMC_FIFO_RDY_W
- emmc::r32_emmc_tran_mode::RB_EMMC_GAP_STOP_R
- emmc::r32_emmc_tran_mode::RB_EMMC_GAP_STOP_W
- emmc::r32_emmc_tran_mode::RB_EMMC_MODE_BOOT_R
- emmc::r32_emmc_tran_mode::RB_EMMC_MODE_BOOT_W
- emmc::r32_emmc_write_cont::R32_EMMC_WRITE_CONT_W
- emmc::r8_emmc_control::RB_EMMC_ALL_CLR_R
- emmc::r8_emmc_control::RB_EMMC_ALL_CLR_W
- emmc::r8_emmc_control::RB_EMMC_DMAEN_R
- emmc::r8_emmc_control::RB_EMMC_DMAEN_W
- emmc::r8_emmc_control::RB_EMMC_LW_MASK_R
- emmc::r8_emmc_control::RB_EMMC_LW_MASK_W
- emmc::r8_emmc_control::RB_EMMC_NEGSMP_R
- emmc::r8_emmc_control::RB_EMMC_NEGSMP_W
- emmc::r8_emmc_control::RB_EMMC_RST_LGC_R
- emmc::r8_emmc_control::RB_EMMC_RST_LGC_W
- emmc::r8_emmc_timeout::RB_EMMC_TOCNT_MASK_R
- emmc::r8_emmc_timeout::RB_EMMC_TOCNT_MASK_W
- generic::BitReader
- generic::BitWriter
- generic::BitWriter0C
- generic::BitWriter0S
- generic::BitWriter0T
- generic::BitWriter1C
- generic::BitWriter1S
- generic::BitWriter1T
- generic::FieldReader
- generic::FieldWriter
- generic::FieldWriterSafe
- hspi::HSPI_RX_SC
- hspi::R16_HSPI_BURST_CFG
- hspi::R16_HSPI_DMA_LEN0
- hspi::R16_HSPI_DMA_LEN1
- hspi::R16_HSPI_RX_LEN0
- hspi::R16_HSPI_RX_LEN1
- hspi::R32_HSPI_RX_ADDR0
- hspi::R32_HSPI_RX_ADDR1
- hspi::R32_HSPI_TX_ADDR0
- hspi::R32_HSPI_TX_ADDR1
- hspi::R32_HSPI_UDF0
- hspi::R32_HSPI_UDF1
- hspi::R8_HSPI_AUX
- hspi::R8_HSPI_BURST_CNT
- hspi::R8_HSPI_CFG
- hspi::R8_HSPI_CTRL
- hspi::R8_HSPI_INT_EN
- hspi::R8_HSPI_INT_FLAG
- hspi::R8_HSPI_RTX_STATUS
- hspi::R8_HSPI_TX_SC
- hspi::hspi_rx_sc::RB_HSPI_RX_NUM_R
- hspi::hspi_rx_sc::RB_HSPI_RX_NUM_W
- hspi::hspi_rx_sc::RB_HSPI_RX_TOG_R
- hspi::hspi_rx_sc::RB_HSPI_RX_TOG_W
- hspi::r16_hspi_burst_cfg::RB_HSPI_BURST_EN_R
- hspi::r16_hspi_burst_cfg::RB_HSPI_BURST_EN_W
- hspi::r16_hspi_burst_cfg::RB_HSPI_BURST_LEN_R
- hspi::r16_hspi_burst_cfg::RB_HSPI_BURST_LEN_W
- hspi::r16_hspi_dma_len0::RB_HSPI_DMA_LEN0_R
- hspi::r16_hspi_dma_len0::RB_HSPI_DMA_LEN0_W
- hspi::r16_hspi_dma_len1::RB_HSPI_DMA_LEN1_R
- hspi::r16_hspi_dma_len1::RB_HSPI_DMA_LEN1_W
- hspi::r16_hspi_rx_len0::RB_HSPI_RX_LEN0_R
- hspi::r16_hspi_rx_len0::RB_HSPI_RX_LEN0_W
- hspi::r16_hspi_rx_len1::RB_HSPI_RX_LEN1_R
- hspi::r16_hspi_rx_len1::RB_HSPI_RX_LEN1_W
- hspi::r32_hspi_rx_addr0::RB_HSPI_RX_ADDR0_R
- hspi::r32_hspi_rx_addr0::RB_HSPI_RX_ADDR0_W
- hspi::r32_hspi_rx_addr1::RB_HSPI_RX_ADDR1_R
- hspi::r32_hspi_rx_addr1::RB_HSPI_RX_ADDR1_W
- hspi::r32_hspi_tx_addr0::RB_HSPI_TX_ADDR0_R
- hspi::r32_hspi_tx_addr0::RB_HSPI_TX_ADDR0_W
- hspi::r32_hspi_tx_addr1::RB_HSPI_TX_ADDR1_R
- hspi::r32_hspi_tx_addr1::RB_HSPI_TX_ADDR1_W
- hspi::r32_hspi_udf0::RB_HSPI_UDF0_R
- hspi::r32_hspi_udf0::RB_HSPI_UDF0_W
- hspi::r32_hspi_udf1::RB_HSPI_UDF1_R
- hspi::r32_hspi_udf1::RB_HSPI_UDF1_W
- hspi::r8_hspi_aux::RB_HSPI_ACK_CNT_SEL_R
- hspi::r8_hspi_aux::RB_HSPI_ACK_CNT_SEL_W
- hspi::r8_hspi_aux::RB_HSPI_ACK_TX_MOD_R
- hspi::r8_hspi_aux::RB_HSPI_ACK_TX_MOD_W
- hspi::r8_hspi_aux::RB_HSPI_RCK_MOD_R
- hspi::r8_hspi_aux::RB_HSPI_RCK_MOD_W
- hspi::r8_hspi_aux::RB_HSPI_TCK_MOD_R
- hspi::r8_hspi_aux::RB_HSPI_TCK_MOD_W
- hspi::r8_hspi_burst_cnt::RB_HSPI_BURST_CNT_R
- hspi::r8_hspi_burst_cnt::RB_HSPI_BURST_CNT_W
- hspi::r8_hspi_cfg::RB_HSPI_DUALDMA_R
- hspi::r8_hspi_cfg::RB_HSPI_DUALDMA_W
- hspi::r8_hspi_cfg::RB_HSPI_HW_ACK_R
- hspi::r8_hspi_cfg::RB_HSPI_HW_ACK_W
- hspi::r8_hspi_cfg::RB_HSPI_MODE_R
- hspi::r8_hspi_cfg::RB_HSPI_MODE_W
- hspi::r8_hspi_cfg::RB_HSPI_MSK_SIZE_R
- hspi::r8_hspi_cfg::RB_HSPI_MSK_SIZE_W
- hspi::r8_hspi_cfg::RB_HSPI_RX_TOG_EN_R
- hspi::r8_hspi_cfg::RB_HSPI_RX_TOG_EN_W
- hspi::r8_hspi_cfg::RB_HSPI_TX_TOG_EN_R
- hspi::r8_hspi_cfg::RB_HSPI_TX_TOG_EN_W
- hspi::r8_hspi_ctrl::RB_HSPI_ALL_CLR_R
- hspi::r8_hspi_ctrl::RB_HSPI_ALL_CLR_W
- hspi::r8_hspi_ctrl::RB_HSPI_DMA_EN_R
- hspi::r8_hspi_ctrl::RB_HSPI_DMA_EN_W
- hspi::r8_hspi_ctrl::RB_HSPI_ENABLE_R
- hspi::r8_hspi_ctrl::RB_HSPI_ENABLE_W
- hspi::r8_hspi_ctrl::RB_HSPI_SW_ACT_R
- hspi::r8_hspi_ctrl::RB_HSPI_SW_ACT_W
- hspi::r8_hspi_ctrl::RB_HSPI_TRX_RST_R
- hspi::r8_hspi_ctrl::RB_HSPI_TRX_RST_W
- hspi::r8_hspi_int_en::RB_HSPI_IE_B_DONE_R
- hspi::r8_hspi_int_en::RB_HSPI_IE_B_DONE_W
- hspi::r8_hspi_int_en::RB_HSPI_IE_FIFO_OV_R
- hspi::r8_hspi_int_en::RB_HSPI_IE_FIFO_OV_W
- hspi::r8_hspi_int_en::RB_HSPI_IE_R_DONE_R
- hspi::r8_hspi_int_en::RB_HSPI_IE_R_DONE_W
- hspi::r8_hspi_int_en::RB_HSPI_IE_T_DONE_R
- hspi::r8_hspi_int_en::RB_HSPI_IE_T_DONE_W
- hspi::r8_hspi_int_flag::RB_HSPI_IF_B_DONE_R
- hspi::r8_hspi_int_flag::RB_HSPI_IF_B_DONE_W
- hspi::r8_hspi_int_flag::RB_HSPI_IF_FIFO_OV_R
- hspi::r8_hspi_int_flag::RB_HSPI_IF_FIFO_OV_W
- hspi::r8_hspi_int_flag::RB_HSPI_IF_R_DONE_R
- hspi::r8_hspi_int_flag::RB_HSPI_IF_R_DONE_W
- hspi::r8_hspi_int_flag::RB_HSPI_IF_T_DONE_R
- hspi::r8_hspi_int_flag::RB_HSPI_IF_T_DONE_W
- hspi::r8_hspi_rtx_status::RB_HSPI_CRC_ERR_R
- hspi::r8_hspi_rtx_status::RB_HSPI_CRC_ERR_W
- hspi::r8_hspi_rtx_status::RB_HSPI_NUM_MIS_R
- hspi::r8_hspi_rtx_status::RB_HSPI_NUM_MIS_W
- hspi::r8_hspi_tx_sc::RB_HSPI_TX_NUM_R
- hspi::r8_hspi_tx_sc::RB_HSPI_TX_NUM_W
- hspi::r8_hspi_tx_sc::RB_HSPI_TX_TOG_R
- hspi::r8_hspi_tx_sc::RB_HSPI_TX_TOG_W
- pfic::R32_PFIC_CFGR
- pfic::R32_PFIC_FIBADDRR
- pfic::R32_PFIC_FIFOADDRR0
- pfic::R32_PFIC_FIFOADDRR1
- pfic::R32_PFIC_FIFOADDRR2
- pfic::R32_PFIC_FIFOADDRR3
- pfic::R32_PFIC_GISR
- pfic::R32_PFIC_IACTR1
- pfic::R32_PFIC_IACTR2
- pfic::R32_PFIC_IENR1
- pfic::R32_PFIC_IENR2
- pfic::R32_PFIC_IPR1
- pfic::R32_PFIC_IPR2
- pfic::R32_PFIC_IPRIOR0
- pfic::R32_PFIC_IPRIOR1
- pfic::R32_PFIC_IPRIOR10
- pfic::R32_PFIC_IPRIOR11
- pfic::R32_PFIC_IPRIOR12
- pfic::R32_PFIC_IPRIOR13
- pfic::R32_PFIC_IPRIOR14
- pfic::R32_PFIC_IPRIOR15
- pfic::R32_PFIC_IPRIOR16
- pfic::R32_PFIC_IPRIOR17
- pfic::R32_PFIC_IPRIOR18
- pfic::R32_PFIC_IPRIOR19
- pfic::R32_PFIC_IPRIOR2
- pfic::R32_PFIC_IPRIOR20
- pfic::R32_PFIC_IPRIOR21
- pfic::R32_PFIC_IPRIOR22
- pfic::R32_PFIC_IPRIOR23
- pfic::R32_PFIC_IPRIOR24
- pfic::R32_PFIC_IPRIOR25
- pfic::R32_PFIC_IPRIOR26
- pfic::R32_PFIC_IPRIOR27
- pfic::R32_PFIC_IPRIOR28
- pfic::R32_PFIC_IPRIOR29
- pfic::R32_PFIC_IPRIOR3
- pfic::R32_PFIC_IPRIOR30
- pfic::R32_PFIC_IPRIOR31
- pfic::R32_PFIC_IPRIOR32
- pfic::R32_PFIC_IPRIOR33
- pfic::R32_PFIC_IPRIOR34
- pfic::R32_PFIC_IPRIOR35
- pfic::R32_PFIC_IPRIOR36
- pfic::R32_PFIC_IPRIOR37
- pfic::R32_PFIC_IPRIOR38
- pfic::R32_PFIC_IPRIOR39
- pfic::R32_PFIC_IPRIOR4
- pfic::R32_PFIC_IPRIOR40
- pfic::R32_PFIC_IPRIOR41
- pfic::R32_PFIC_IPRIOR42
- pfic::R32_PFIC_IPRIOR43
- pfic::R32_PFIC_IPRIOR44
- pfic::R32_PFIC_IPRIOR45
- pfic::R32_PFIC_IPRIOR46
- pfic::R32_PFIC_IPRIOR47
- pfic::R32_PFIC_IPRIOR48
- pfic::R32_PFIC_IPRIOR49
- pfic::R32_PFIC_IPRIOR5
- pfic::R32_PFIC_IPRIOR50
- pfic::R32_PFIC_IPRIOR51
- pfic::R32_PFIC_IPRIOR52
- pfic::R32_PFIC_IPRIOR53
- pfic::R32_PFIC_IPRIOR54
- pfic::R32_PFIC_IPRIOR55
- pfic::R32_PFIC_IPRIOR56
- pfic::R32_PFIC_IPRIOR57
- pfic::R32_PFIC_IPRIOR58
- pfic::R32_PFIC_IPRIOR59
- pfic::R32_PFIC_IPRIOR6
- pfic::R32_PFIC_IPRIOR60
- pfic::R32_PFIC_IPRIOR61
- pfic::R32_PFIC_IPRIOR62
- pfic::R32_PFIC_IPRIOR63
- pfic::R32_PFIC_IPRIOR7
- pfic::R32_PFIC_IPRIOR8
- pfic::R32_PFIC_IPRIOR9
- pfic::R32_PFIC_IPRR1
- pfic::R32_PFIC_IPRR2
- pfic::R32_PFIC_IPSR1
- pfic::R32_PFIC_IPSR2
- pfic::R32_PFIC_IRER1
- pfic::R32_PFIC_IRER2
- pfic::R32_PFIC_ISR1
- pfic::R32_PFIC_ISR2
- pfic::R32_PFIC_ITHRESDR
- pfic::R32_PFIC_SCTLR
- pfic::r32_pfic_cfgr::EXCRESET_W
- pfic::r32_pfic_cfgr::EXCSET_W
- pfic::r32_pfic_cfgr::HWSTKCTRL_R
- pfic::r32_pfic_cfgr::HWSTKCTRL_W
- pfic::r32_pfic_cfgr::KEYCODE_W
- pfic::r32_pfic_cfgr::NESTCTRL_R
- pfic::r32_pfic_cfgr::NESTCTRL_W
- pfic::r32_pfic_cfgr::NMIRESET_W
- pfic::r32_pfic_cfgr::NMISET_W
- pfic::r32_pfic_cfgr::PFICRESET_W
- pfic::r32_pfic_cfgr::SYSRESET_W
- pfic::r32_pfic_fibaddrr::BASEADDR_R
- pfic::r32_pfic_fibaddrr::BASEADDR_W
- pfic::r32_pfic_fifoaddrr0::IRQID0_R
- pfic::r32_pfic_fifoaddrr0::IRQID0_W
- pfic::r32_pfic_fifoaddrr0::OFFADDR0_R
- pfic::r32_pfic_fifoaddrr0::OFFADDR0_W
- pfic::r32_pfic_fifoaddrr1::IRQID1_R
- pfic::r32_pfic_fifoaddrr1::IRQID1_W
- pfic::r32_pfic_fifoaddrr1::OFFADDR1_R
- pfic::r32_pfic_fifoaddrr1::OFFADDR1_W
- pfic::r32_pfic_fifoaddrr2::IRQID2_R
- pfic::r32_pfic_fifoaddrr2::IRQID2_W
- pfic::r32_pfic_fifoaddrr2::OFFADDR2_R
- pfic::r32_pfic_fifoaddrr2::OFFADDR2_W
- pfic::r32_pfic_fifoaddrr3::IRQID3_R
- pfic::r32_pfic_fifoaddrr3::IRQID3_W
- pfic::r32_pfic_fifoaddrr3::OFFADDR3_R
- pfic::r32_pfic_fifoaddrr3::OFFADDR3_W
- pfic::r32_pfic_gisr::GACTSTA_R
- pfic::r32_pfic_gisr::GPENDSTA_R
- pfic::r32_pfic_gisr::NESTSTA_R
- pfic::r32_pfic_iactr1::IACTS_R
- pfic::r32_pfic_iactr1::IACTS_W
- pfic::r32_pfic_iactr2::IACTS_R
- pfic::r32_pfic_iactr2::IACTS_W
- pfic::r32_pfic_ienr1::INTEN_R
- pfic::r32_pfic_ienr1::INTEN_W
- pfic::r32_pfic_ienr2::INTEN_R
- pfic::r32_pfic_ienr2::INTEN_W
- pfic::r32_pfic_ipr1::PENDSTA_R
- pfic::r32_pfic_ipr2::PENDSTA_R
- pfic::r32_pfic_iprior0::IPRIOR0_R
- pfic::r32_pfic_iprior0::IPRIOR0_W
- pfic::r32_pfic_iprior10::IPRIOR10_R
- pfic::r32_pfic_iprior10::IPRIOR10_W
- pfic::r32_pfic_iprior11::IPRIOR11_R
- pfic::r32_pfic_iprior11::IPRIOR11_W
- pfic::r32_pfic_iprior12::IPRIOR12_R
- pfic::r32_pfic_iprior12::IPRIOR12_W
- pfic::r32_pfic_iprior13::IPRIOR13_R
- pfic::r32_pfic_iprior13::IPRIOR13_W
- pfic::r32_pfic_iprior14::IPRIOR14_R
- pfic::r32_pfic_iprior14::IPRIOR14_W
- pfic::r32_pfic_iprior15::IPRIOR15_R
- pfic::r32_pfic_iprior15::IPRIOR15_W
- pfic::r32_pfic_iprior16::IPRIOR16_R
- pfic::r32_pfic_iprior16::IPRIOR16_W
- pfic::r32_pfic_iprior17::IPRIOR17_R
- pfic::r32_pfic_iprior17::IPRIOR17_W
- pfic::r32_pfic_iprior18::IPRIOR18_R
- pfic::r32_pfic_iprior18::IPRIOR18_W
- pfic::r32_pfic_iprior19::IPRIOR19_R
- pfic::r32_pfic_iprior19::IPRIOR19_W
- pfic::r32_pfic_iprior1::IPRIOR1_R
- pfic::r32_pfic_iprior1::IPRIOR1_W
- pfic::r32_pfic_iprior20::IPRIOR20_R
- pfic::r32_pfic_iprior20::IPRIOR20_W
- pfic::r32_pfic_iprior21::IPRIOR21_R
- pfic::r32_pfic_iprior21::IPRIOR21_W
- pfic::r32_pfic_iprior22::IPRIOR22_R
- pfic::r32_pfic_iprior22::IPRIOR22_W
- pfic::r32_pfic_iprior23::IPRIOR23_R
- pfic::r32_pfic_iprior23::IPRIOR23_W
- pfic::r32_pfic_iprior24::IPRIOR24_R
- pfic::r32_pfic_iprior24::IPRIOR24_W
- pfic::r32_pfic_iprior25::IPRIOR25_R
- pfic::r32_pfic_iprior25::IPRIOR25_W
- pfic::r32_pfic_iprior26::IPRIOR26_R
- pfic::r32_pfic_iprior26::IPRIOR26_W
- pfic::r32_pfic_iprior27::IPRIOR27_R
- pfic::r32_pfic_iprior27::IPRIOR27_W
- pfic::r32_pfic_iprior28::IPRIOR28_R
- pfic::r32_pfic_iprior28::IPRIOR28_W
- pfic::r32_pfic_iprior29::IPRIOR29_R
- pfic::r32_pfic_iprior29::IPRIOR29_W
- pfic::r32_pfic_iprior2::IPRIOR2_R
- pfic::r32_pfic_iprior2::IPRIOR2_W
- pfic::r32_pfic_iprior30::IPRIOR30_R
- pfic::r32_pfic_iprior30::IPRIOR30_W
- pfic::r32_pfic_iprior31::IPRIOR31_R
- pfic::r32_pfic_iprior31::IPRIOR31_W
- pfic::r32_pfic_iprior32::IPRIOR32_R
- pfic::r32_pfic_iprior32::IPRIOR32_W
- pfic::r32_pfic_iprior33::IPRIOR33_R
- pfic::r32_pfic_iprior33::IPRIOR33_W
- pfic::r32_pfic_iprior34::IPRIOR34_R
- pfic::r32_pfic_iprior34::IPRIOR34_W
- pfic::r32_pfic_iprior35::IPRIOR35_R
- pfic::r32_pfic_iprior35::IPRIOR35_W
- pfic::r32_pfic_iprior36::IPRIOR36_R
- pfic::r32_pfic_iprior36::IPRIOR36_W
- pfic::r32_pfic_iprior37::IPRIOR37_R
- pfic::r32_pfic_iprior37::IPRIOR37_W
- pfic::r32_pfic_iprior38::IPRIOR38_R
- pfic::r32_pfic_iprior38::IPRIOR38_W
- pfic::r32_pfic_iprior39::IPRIOR39_R
- pfic::r32_pfic_iprior39::IPRIOR39_W
- pfic::r32_pfic_iprior3::IPRIOR3_R
- pfic::r32_pfic_iprior3::IPRIOR3_W
- pfic::r32_pfic_iprior40::IPRIOR40_R
- pfic::r32_pfic_iprior40::IPRIOR40_W
- pfic::r32_pfic_iprior41::IPRIOR41_R
- pfic::r32_pfic_iprior41::IPRIOR41_W
- pfic::r32_pfic_iprior42::IPRIOR42_R
- pfic::r32_pfic_iprior42::IPRIOR42_W
- pfic::r32_pfic_iprior43::IPRIOR43_R
- pfic::r32_pfic_iprior43::IPRIOR43_W
- pfic::r32_pfic_iprior44::IPRIOR44_R
- pfic::r32_pfic_iprior44::IPRIOR44_W
- pfic::r32_pfic_iprior45::IPRIOR45_R
- pfic::r32_pfic_iprior45::IPRIOR45_W
- pfic::r32_pfic_iprior46::IPRIOR46_R
- pfic::r32_pfic_iprior46::IPRIOR46_W
- pfic::r32_pfic_iprior47::IPRIOR47_R
- pfic::r32_pfic_iprior47::IPRIOR47_W
- pfic::r32_pfic_iprior48::IPRIOR48_R
- pfic::r32_pfic_iprior48::IPRIOR48_W
- pfic::r32_pfic_iprior49::IPRIOR49_R
- pfic::r32_pfic_iprior49::IPRIOR49_W
- pfic::r32_pfic_iprior4::IPRIOR4_R
- pfic::r32_pfic_iprior4::IPRIOR4_W
- pfic::r32_pfic_iprior50::IPRIOR50_R
- pfic::r32_pfic_iprior50::IPRIOR50_W
- pfic::r32_pfic_iprior51::IPRIOR51_R
- pfic::r32_pfic_iprior51::IPRIOR51_W
- pfic::r32_pfic_iprior52::IPRIOR52_R
- pfic::r32_pfic_iprior52::IPRIOR52_W
- pfic::r32_pfic_iprior53::IPRIOR53_R
- pfic::r32_pfic_iprior53::IPRIOR53_W
- pfic::r32_pfic_iprior54::IPRIOR54_R
- pfic::r32_pfic_iprior54::IPRIOR54_W
- pfic::r32_pfic_iprior55::IPRIOR55_R
- pfic::r32_pfic_iprior55::IPRIOR55_W
- pfic::r32_pfic_iprior56::IPRIOR56_R
- pfic::r32_pfic_iprior56::IPRIOR56_W
- pfic::r32_pfic_iprior57::IPRIOR57_R
- pfic::r32_pfic_iprior57::IPRIOR57_W
- pfic::r32_pfic_iprior58::IPRIOR58_R
- pfic::r32_pfic_iprior58::IPRIOR58_W
- pfic::r32_pfic_iprior59::IPRIOR59_R
- pfic::r32_pfic_iprior59::IPRIOR59_W
- pfic::r32_pfic_iprior5::IPRIOR5_R
- pfic::r32_pfic_iprior5::IPRIOR5_W
- pfic::r32_pfic_iprior60::IPRIOR60_R
- pfic::r32_pfic_iprior60::IPRIOR60_W
- pfic::r32_pfic_iprior61::IPRIOR61_R
- pfic::r32_pfic_iprior61::IPRIOR61_W
- pfic::r32_pfic_iprior62::IPRIOR62_R
- pfic::r32_pfic_iprior62::IPRIOR62_W
- pfic::r32_pfic_iprior63::IPRIOR63_R
- pfic::r32_pfic_iprior63::IPRIOR63_W
- pfic::r32_pfic_iprior6::IPRIOR6_R
- pfic::r32_pfic_iprior6::IPRIOR6_W
- pfic::r32_pfic_iprior7::IPRIOR7_R
- pfic::r32_pfic_iprior7::IPRIOR7_W
- pfic::r32_pfic_iprior8::IPRIOR8_R
- pfic::r32_pfic_iprior8::IPRIOR8_W
- pfic::r32_pfic_iprior9::IPRIOR9_R
- pfic::r32_pfic_iprior9::IPRIOR9_W
- pfic::r32_pfic_iprr1::PENDRESET_R
- pfic::r32_pfic_iprr1::PENDRESET_W
- pfic::r32_pfic_iprr2::PENDRESET_R
- pfic::r32_pfic_iprr2::PENDRESET_W
- pfic::r32_pfic_ipsr1::PENDSET_R
- pfic::r32_pfic_ipsr1::PENDSET_W
- pfic::r32_pfic_ipsr2::PENDSET_R
- pfic::r32_pfic_ipsr2::PENDSET_W
- pfic::r32_pfic_irer1::INTRESET_R
- pfic::r32_pfic_irer1::INTRESET_W
- pfic::r32_pfic_irer2::INTRESET_R
- pfic::r32_pfic_irer2::INTRESET_W
- pfic::r32_pfic_isr1::INTSTA_R
- pfic::r32_pfic_isr2::INTENSTA_R
- pfic::r32_pfic_ithresdr::THRESHOLD_R
- pfic::r32_pfic_ithresdr::THRESHOLD_W
- pfic::r32_pfic_sctlr::SETEVENT_R
- pfic::r32_pfic_sctlr::SETEVENT_W
- pfic::r32_pfic_sctlr::SEVONPEND_R
- pfic::r32_pfic_sctlr::SEVONPEND_W
- pfic::r32_pfic_sctlr::SLEEPDEEP_R
- pfic::r32_pfic_sctlr::SLEEPDEEP_W
- pfic::r32_pfic_sctlr::SLEEPONEXIT_R
- pfic::r32_pfic_sctlr::SLEEPONEXIT_W
- pfic::r32_pfic_sctlr::WFITOWFE_R
- pfic::r32_pfic_sctlr::WFITOWFE_W
- pwmx::R8_PWM0_DATA
- pwmx::R8_PWM1_DATA
- pwmx::R8_PWM2_DATA
- pwmx::R8_PWM3_DATA
- pwmx::R8_PWM_CLOCK_DIV
- pwmx::R8_PWM_CTRL_CFG
- pwmx::R8_PWM_CTRL_MOD
- pwmx::r8_pwm0_data::R8_PWM0_DATA_R
- pwmx::r8_pwm0_data::R8_PWM0_DATA_W
- pwmx::r8_pwm1_data::R8_PWM1_DATA_R
- pwmx::r8_pwm1_data::R8_PWM1_DATA_W
- pwmx::r8_pwm2_data::R8_PWM2_DATA_R
- pwmx::r8_pwm2_data::R8_PWM2_DATA_W
- pwmx::r8_pwm3_data::R8_PWM3_DATA_R
- pwmx::r8_pwm3_data::R8_PWM3_DATA_W
- pwmx::r8_pwm_clock_div::R8_PWM_CLOCK_DIV_R
- pwmx::r8_pwm_clock_div::R8_PWM_CLOCK_DIV_W
- pwmx::r8_pwm_ctrl_cfg::RB_PWM_CYCLE_SEL_R
- pwmx::r8_pwm_ctrl_cfg::RB_PWM_CYCLE_SEL_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM0_OUT_EN_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM0_OUT_EN_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM0_POLAR_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM0_POLAR_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM1_OUT_EN_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM1_OUT_EN_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM1_POLAR_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM1_POLAR_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM2_OUT_EN_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM2_OUT_EN_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM2_POLAR_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM2_POLAR_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM3_OUT_EN_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM3_OUT_EN_W
- pwmx::r8_pwm_ctrl_mod::RB_PWM3_POLAR_R
- pwmx::r8_pwm_ctrl_mod::RB_PWM3_POLAR_W
- spi0::R16_SPI0_TOTAL_CNT
- spi0::R32_SPI0_DMA_BEG
- spi0::R32_SPI0_DMA_END
- spi0::R32_SPI0_DMA_NOW
- spi0::R8_SPI0_BUFFER
- spi0::R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE
- spi0::R8_SPI0_CTRL_CFG
- spi0::R8_SPI0_CTRL_MOD
- spi0::R8_SPI0_FIFO
- spi0::R8_SPI0_FIFO_COUNT
- spi0::R8_SPI0_FIFO_COUNT1
- spi0::R8_SPI0_INTER_EN
- spi0::R8_SPI0_INT_FLAG
- spi0::R8_SPI0_RUN_FLAG
- spi0::r16_spi0_total_cnt::R16_SPI0_TOTAL_CNT_R
- spi0::r16_spi0_total_cnt::R16_SPI0_TOTAL_CNT_W
- spi0::r32_spi0_dma_beg::R16_SPI0_DMA_BEG_R
- spi0::r32_spi0_dma_beg::R16_SPI0_DMA_BEG_W
- spi0::r32_spi0_dma_end::R16_SPI0_DMA_END_R
- spi0::r32_spi0_dma_end::R16_SPI0_DMA_END_W
- spi0::r32_spi0_dma_now::R16_SPI0_DMA_NOW_R
- spi0::r32_spi0_dma_now::R16_SPI0_DMA_NOW_W
- spi0::r8_spi0_buffer::R8_SPI0_BUFFER_R
- spi0::r8_spi0_clock_div_r8_spi0_slave_pre::R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_R
- spi0::r8_spi0_clock_div_r8_spi0_slave_pre::R8_SPI0_CLOCK_DIV_R8_SPI0_SLAVE_PRE_W
- spi0::r8_spi0_ctrl_cfg::RB_SPI_AUTO_IF_R
- spi0::r8_spi0_ctrl_cfg::RB_SPI_AUTO_IF_W
- spi0::r8_spi0_ctrl_cfg::RB_SPI_BIT_ORDER_R
- spi0::r8_spi0_ctrl_cfg::RB_SPI_BIT_ORDER_W
- spi0::r8_spi0_ctrl_cfg::RB_SPI_DMA_ENABLE_R
- spi0::r8_spi0_ctrl_cfg::RB_SPI_DMA_ENABLE_W
- spi0::r8_spi0_ctrl_cfg::RB_SPI_DMA_LOOP_R
- spi0::r8_spi0_ctrl_cfg::RB_SPI_DMA_LOOP_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_2WIRE_MOD_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_2WIRE_MOD_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_ALL_CLEAR_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_ALL_CLEAR_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_FIFO_DIR_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_FIFO_DIR_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_MISO_OE_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_MISO_OE_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_MODE_SLAVE_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_MODE_SLAVE_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_MOSI_OE_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_MOSI_OE_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W
- spi0::r8_spi0_ctrl_mod::RB_SPI_SCK_OE_R
- spi0::r8_spi0_ctrl_mod::RB_SPI_SCK_OE_W
- spi0::r8_spi0_fifo::R8_SPI0_FIFO_R
- spi0::r8_spi0_fifo::R8_SPI0_FIFO_W
- spi0::r8_spi0_fifo_count1::R8_SPI0_FIFO_COUNT1_R
- spi0::r8_spi0_fifo_count1::R8_SPI0_FIFO_COUNT1_W
- spi0::r8_spi0_fifo_count::R8_SPI0_FIFO_COUNT_R
- spi0::r8_spi0_fifo_count::R8_SPI0_FIFO_COUNT_W
- spi0::r8_spi0_int_flag::RB_SPI_FREE_R
- spi0::r8_spi0_int_flag::RB_SPI_FREE_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_BYTE_END_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_BYTE_END_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_CNT_END_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_CNT_END_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_DMA_END_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_DMA_END_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_FIFO_HF_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_FIFO_HF_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_FIFO_OV_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_FIFO_OV_W
- spi0::r8_spi0_int_flag::RB_SPI_IF_FST_BYTE_R
- spi0::r8_spi0_int_flag::RB_SPI_IF_FST_BYTE_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_BYTE_END_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_BYTE_END_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_CNT_END_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_CNT_END_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_DMA_END_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_DMA_END_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_FIFO_HF_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_FIFO_HF_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_FIFO_OV_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_FIFO_OV_W
- spi0::r8_spi0_inter_en::RB_SPI_IE_FST_BYTE_R
- spi0::r8_spi0_inter_en::RB_SPI_IE_FST_BYTE_W
- spi0::r8_spi0_run_flag::RB_SPI_FIFO_READY_R
- spi0::r8_spi0_run_flag::RB_SPI_SLV_CMD_ACT_R
- spi0::r8_spi0_run_flag::RB_SPI_SLV_CS_LOAD_R
- spi0::r8_spi0_run_flag::RB_SPI_SLV_SELECT_R
- spi1::R16_SPI1_TOTAL_CNT
- spi1::R32_SPI1_DMA_BEG
- spi1::R32_SPI1_DMA_END
- spi1::R32_SPI1_DMA_NOW
- spi1::R8_SPI1_BUFFER
- spi1::R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE
- spi1::R8_SPI1_CTRL_CFG
- spi1::R8_SPI1_CTRL_MOD
- spi1::R8_SPI1_FIFO
- spi1::R8_SPI1_FIFO_COUNT
- spi1::R8_SPI1_FIFO_COUNT1
- spi1::R8_SPI1_INTER_EN
- spi1::R8_SPI1_INT_FLAG
- spi1::R8_SPI1_RUN_FLAG
- spi1::r16_spi1_total_cnt::R16_SPI1_TOTAL_CNT_R
- spi1::r16_spi1_total_cnt::R16_SPI1_TOTAL_CNT_W
- spi1::r32_spi1_dma_beg::R16_SPI1_DMA_BEG_R
- spi1::r32_spi1_dma_beg::R16_SPI1_DMA_BEG_W
- spi1::r32_spi1_dma_end::R16_SPI1_DMA_END_R
- spi1::r32_spi1_dma_end::R16_SPI1_DMA_END_W
- spi1::r32_spi1_dma_now::R16_SPI1_DMA_NOW_R
- spi1::r32_spi1_dma_now::R16_SPI1_DMA_NOW_W
- spi1::r8_spi1_buffer::R8_SPI1_BUFFER_R
- spi1::r8_spi1_clock_div_r8_spi1_slave_pre::R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_R
- spi1::r8_spi1_clock_div_r8_spi1_slave_pre::R8_SPI1_CLOCK_DIV_R8_SPI1_SLAVE_PRE_W
- spi1::r8_spi1_ctrl_cfg::RB_SPI_AUTO_IF_R
- spi1::r8_spi1_ctrl_cfg::RB_SPI_AUTO_IF_W
- spi1::r8_spi1_ctrl_cfg::RB_SPI_BIT_ORDER_R
- spi1::r8_spi1_ctrl_cfg::RB_SPI_BIT_ORDER_W
- spi1::r8_spi1_ctrl_cfg::RB_SPI_DMA_ENABLE_R
- spi1::r8_spi1_ctrl_cfg::RB_SPI_DMA_ENABLE_W
- spi1::r8_spi1_ctrl_cfg::RB_SPI_DMA_LOOP_R
- spi1::r8_spi1_ctrl_cfg::RB_SPI_DMA_LOOP_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_2WIRE_MOD_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_2WIRE_MOD_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_ALL_CLEAR_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_ALL_CLEAR_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_FIFO_DIR_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_FIFO_DIR_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_MISO_OE_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_MISO_OE_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_MODE_SLAVE_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_MODE_SLAVE_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_MOSI_OE_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_MOSI_OE_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_MST_SCK_MOD_RB_SPI_SLV_CMD_MOD_W
- spi1::r8_spi1_ctrl_mod::RB_SPI_SCK_OE_R
- spi1::r8_spi1_ctrl_mod::RB_SPI_SCK_OE_W
- spi1::r8_spi1_fifo::R8_SPI1_FIFO_R
- spi1::r8_spi1_fifo::R8_SPI1_FIFO_W
- spi1::r8_spi1_fifo_count1::R8_SPI1_FIFO_COUNT1_R
- spi1::r8_spi1_fifo_count1::R8_SPI1_FIFO_COUNT1_W
- spi1::r8_spi1_fifo_count::R8_SPI1_FIFO_COUNT_R
- spi1::r8_spi1_fifo_count::R8_SPI1_FIFO_COUNT_W
- spi1::r8_spi1_int_flag::RB_SPI_FREE_R
- spi1::r8_spi1_int_flag::RB_SPI_FREE_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_BYTE_END_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_BYTE_END_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_CNT_END_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_CNT_END_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_DMA_END_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_DMA_END_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_FIFO_HF_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_FIFO_HF_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_FIFO_OV_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_FIFO_OV_W
- spi1::r8_spi1_int_flag::RB_SPI_IF_FST_BYTE_R
- spi1::r8_spi1_int_flag::RB_SPI_IF_FST_BYTE_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_BYTE_END_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_BYTE_END_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_CNT_END_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_CNT_END_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_DMA_END_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_DMA_END_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_FIFO_HF_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_FIFO_HF_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_FIFO_OV_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_FIFO_OV_W
- spi1::r8_spi1_inter_en::RB_SPI_IE_FST_BYTE_R
- spi1::r8_spi1_inter_en::RB_SPI_IE_FST_BYTE_W
- spi1::r8_spi1_run_flag::RB_SPI_FIFO_READY_R
- spi1::r8_spi1_run_flag::RB_SPI_SLV_CMD_ACT_R
- spi1::r8_spi1_run_flag::RB_SPI_SLV_CS_LOAD_R
- spi1::r8_spi1_run_flag::RB_SPI_SLV_SELECT_R
- sys::R16_SERD_ANA_CFG1
- sys::R32_PA_CLR
- sys::R32_PA_DIR
- sys::R32_PA_DRV
- sys::R32_PA_OUT
- sys::R32_PA_PD
- sys::R32_PA_PIN
- sys::R32_PA_PU
- sys::R32_PA_SMT
- sys::R32_PB_CLR
- sys::R32_PB_DIR
- sys::R32_PB_DRV
- sys::R32_PB_OUT
- sys::R32_PB_PD
- sys::R32_PB_PIN
- sys::R32_PB_PU
- sys::R32_PB_SMT
- sys::R32_SERD_ANA_CFG2
- sys::R8_CHIP_ID
- sys::R8_CLK_CFG_CTRL
- sys::R8_CLK_MOD_AUX
- sys::R8_CLK_PLL_DIV
- sys::R8_GLOB_RESET_KEEP
- sys::R8_GLOB_ROM_CFG
- sys::R8_GPIO_INT_ENABLE
- sys::R8_GPIO_INT_FLAG
- sys::R8_GPIO_INT_MODE
- sys::R8_GPIO_INT_POLAR
- sys::R8_PIN_ALTERNATE
- sys::R8_RST_BOOT_STAT
- sys::R8_RST_WDOG_CTRL
- sys::R8_SAFE_ACCESS_ID
- sys::R8_SAFE_ACCESS_SIG
- sys::R8_SLP_CLK_OFF0
- sys::R8_SLP_CLK_OFF1
- sys::R8_SLP_POWER_CTRL
- sys::R8_SLP_WAKE_CTRL
- sys::R8_WDOG_COUNT
- sys::r16_serd_ana_cfg1::RB_SERD_30M_SEL_R
- sys::r16_serd_ana_cfg1::RB_SERD_30M_SEL_W
- sys::r16_serd_ana_cfg1::RB_SERD_DN_SEL_R
- sys::r16_serd_ana_cfg1::RB_SERD_DN_SEL_W
- sys::r16_serd_ana_cfg1::RB_SERD_PLL_CFG_R
- sys::r16_serd_ana_cfg1::RB_SERD_PLL_CFG_W
- sys::r32_pa_clr::R32_PA_CLR_W
- sys::r32_pa_dir::R32_PA_DIR_R
- sys::r32_pa_dir::R32_PA_DIR_W
- sys::r32_pa_drv::R32_PA_DRV_R
- sys::r32_pa_drv::R32_PA_DRV_W
- sys::r32_pa_out::R32_PA_OUT_R
- sys::r32_pa_out::R32_PA_OUT_W
- sys::r32_pa_pd::R32_PA_PD_R
- sys::r32_pa_pd::R32_PA_PD_W
- sys::r32_pa_pin::R32_PA_PIN_R
- sys::r32_pa_pu::R32_PA_PU_R
- sys::r32_pa_pu::R32_PA_PU_W
- sys::r32_pa_smt::R32_PA_SMT_R
- sys::r32_pa_smt::R32_PA_SMT_W
- sys::r32_pb_clr::R32_PB_CLR_W
- sys::r32_pb_dir::R32_PB_DIR_R
- sys::r32_pb_dir::R32_PB_DIR_W
- sys::r32_pb_drv::R32_PB_DRV_R
- sys::r32_pb_drv::R32_PB_DRV_W
- sys::r32_pb_out::R32_PB_OUT_R
- sys::r32_pb_out::R32_PB_OUT_W
- sys::r32_pb_pd::R32_PB_PD_R
- sys::r32_pb_pd::R32_PB_PD_W
- sys::r32_pb_pin::R32_PB_PIN_R
- sys::r32_pb_pu::R32_PB_PU_R
- sys::r32_pb_pu::R32_PB_PU_W
- sys::r32_pb_smt::R32_PB_SMT_R
- sys::r32_pb_smt::R32_PB_SMT_W
- sys::r32_serd_ana_cfg2::RB_SERD_TRX_CFG_R
- sys::r32_serd_ana_cfg2::RB_SERD_TRX_CFG_W
- sys::r8_chip_id::R8_CHIP_ID_R
- sys::r8_clk_cfg_ctrl::RB_CLK_PLL_SLEEP_R
- sys::r8_clk_cfg_ctrl::RB_CLK_PLL_SLEEP_W
- sys::r8_clk_cfg_ctrl::RB_CLK_SEL_PLL_R
- sys::r8_clk_cfg_ctrl::RB_CLK_SEL_PLL_W
- sys::r8_clk_mod_aux::RB_EXT_125M_EN_R
- sys::r8_clk_mod_aux::RB_EXT_125M_EN_W
- sys::r8_clk_mod_aux::RB_INT_125M_EN_R
- sys::r8_clk_mod_aux::RB_INT_125M_EN_W
- sys::r8_clk_mod_aux::RB_MCO_EN_R
- sys::r8_clk_mod_aux::RB_MCO_EN_W
- sys::r8_clk_mod_aux::RB_MCO_SEL_MSK_R
- sys::r8_clk_mod_aux::RB_MCO_SEL_MSK_W
- sys::r8_clk_pll_div::R8_CLK_PLL_DIV_R
- sys::r8_clk_pll_div::R8_CLK_PLL_DIV_W
- sys::r8_glob_reset_keep::R8_GLOB_RESET_KEEP_R
- sys::r8_glob_reset_keep::R8_GLOB_RESET_KEEP_W
- sys::r8_glob_rom_cfg::RB_CODE_RAM_WE_R
- sys::r8_glob_rom_cfg::RB_CODE_RAM_WE_W
- sys::r8_glob_rom_cfg::RB_ROM_CODE_OFS_R
- sys::r8_glob_rom_cfg::RB_ROM_CODE_OFS_W
- sys::r8_glob_rom_cfg::RB_ROM_CODE_WE_R
- sys::r8_glob_rom_cfg::RB_ROM_CODE_WE_W
- sys::r8_glob_rom_cfg::RB_ROM_DATA_WE_R
- sys::r8_glob_rom_cfg::RB_ROM_DATA_WE_W
- sys::r8_glob_rom_cfg::RB_ROM_EXT_RE_R
- sys::r8_glob_rom_cfg::RB_ROM_EXT_RE_W
- sys::r8_gpio_int_enable::RB_GPIO_PA2_IE_R
- sys::r8_gpio_int_enable::RB_GPIO_PA2_IE_W
- sys::r8_gpio_int_flag::RB_GPIO_PA2_IF_R
- sys::r8_gpio_int_flag::RB_GPIO_PA2_IF_W
- sys::r8_gpio_int_mode::RB_GPIO_PA2_IM_R
- sys::r8_gpio_int_mode::RB_GPIO_PA2_IM_W
- sys::r8_gpio_int_polar::RB_GPIO_PA2_IP_R
- sys::r8_gpio_int_polar::RB_GPIO_PA2_IP_W
- sys::r8_pin_alternate::RB_PIN_MII_R
- sys::r8_pin_alternate::RB_PIN_MII_W
- sys::r8_pin_alternate::RB_PIN_TMR1_R
- sys::r8_pin_alternate::RB_PIN_TMR1_W
- sys::r8_pin_alternate::RB_PIN_TMR2_R
- sys::r8_pin_alternate::RB_PIN_TMR2_W
- sys::r8_pin_alternate::RB_PIN_UART0_R
- sys::r8_pin_alternate::RB_PIN_UART0_W
- sys::r8_rst_boot_stat::RB_BOOT_LOADER_R
- sys::r8_rst_boot_stat::RB_CFG_BOOT_EN_R
- sys::r8_rst_boot_stat::RB_CFG_DEBUG_EN_R
- sys::r8_rst_boot_stat::RB_CFG_RESET_EN_R
- sys::r8_rst_boot_stat::RB_RESET_FLAG_R
- sys::r8_rst_wdog_ctrl::RB_SOFTWARE_RESET_R
- sys::r8_rst_wdog_ctrl::RB_SOFTWARE_RESET_W
- sys::r8_rst_wdog_ctrl::RB_WDOG_INT_EN_R
- sys::r8_rst_wdog_ctrl::RB_WDOG_INT_EN_W
- sys::r8_rst_wdog_ctrl::RB_WDOG_INT_FLAG_R
- sys::r8_rst_wdog_ctrl::RB_WDOG_INT_FLAG_W
- sys::r8_rst_wdog_ctrl::RB_WDOG_RST_EN_R
- sys::r8_rst_wdog_ctrl::RB_WDOG_RST_EN_W
- sys::r8_safe_access_id::R8_SAFE_ACCESS_ID_R
- sys::r8_safe_access_sig::RB_SAFE_ACC_MODE_R
- sys::r8_safe_access_sig::RB_SAFE_ACC_MODE_W
- sys::r8_safe_access_sig::RB_SAFE_ACC_TIMER_R
- sys::r8_safe_access_sig::RB_SAFE_ACC_TIMER_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_PWMX_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_PWMX_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR0_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR0_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR1_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR1_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR2_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_TMR2_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART0_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART0_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART1_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART1_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART2_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART2_W
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART3_R
- sys::r8_slp_clk_off0::RB_SLP_CLK_UART3_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_DVP_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_DVP_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_EMMC_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_EMMC_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_HSPI_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_HSPI_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_SERD_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_SERD_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_SPI0_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_SPI0_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_SPI1_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_SPI1_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_USBHS_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_USBHS_W
- sys::r8_slp_clk_off1::RB_SLP_CLK_USBSS_R
- sys::r8_slp_clk_off1::RB_SLP_CLK_USBSS_W
- sys::r8_slp_power_ctrl::RB_SLP_USBHS_PWRDN_R
- sys::r8_slp_power_ctrl::RB_SLP_USBHS_PWRDN_W
- sys::r8_slp_wake_ctrl::RB_SLP_CLK_ECDC_R
- sys::r8_slp_wake_ctrl::RB_SLP_CLK_ECDC_W
- sys::r8_slp_wake_ctrl::RB_SLP_CLK_ETH_R
- sys::r8_slp_wake_ctrl::RB_SLP_CLK_ETH_W
- sys::r8_slp_wake_ctrl::RB_SLP_ETH_WAKE_R
- sys::r8_slp_wake_ctrl::RB_SLP_ETH_WAKE_W
- sys::r8_slp_wake_ctrl::RB_SLP_GPIO_WAKE_R
- sys::r8_slp_wake_ctrl::RB_SLP_GPIO_WAKE_W
- sys::r8_slp_wake_ctrl::RB_SLP_USBHS_WAKE_R
- sys::r8_slp_wake_ctrl::RB_SLP_USBHS_WAKE_W
- sys::r8_slp_wake_ctrl::RB_SLP_USBSS_WAKE_R
- sys::r8_slp_wake_ctrl::RB_SLP_USBSS_WAKE_W
- sys::r8_wdog_count::R8_WDOG_COUNT_R
- sys::r8_wdog_count::R8_WDOG_COUNT_W
- systick::R32_STK_CMPHR
- systick::R32_STK_CMPLR
- systick::R32_STK_CNTFG
- systick::R32_STK_CNTH
- systick::R32_STK_CNTL
- systick::R32_STK_CTLR
- systick::r32_stk_cmphr::CMPH_R
- systick::r32_stk_cmphr::CMPH_W
- systick::r32_stk_cmplr::CMPL_R
- systick::r32_stk_cmplr::CMPL_W
- systick::r32_stk_cntfg::CNTIF_R
- systick::r32_stk_cntfg::CNTIF_W
- systick::r32_stk_cntfg::SWIE_R
- systick::r32_stk_cntfg::SWIE_W
- systick::r32_stk_cnth::CNTH_R
- systick::r32_stk_cnth::CNTH_W
- systick::r32_stk_cntl::CNTL_R
- systick::r32_stk_cntl::CNTL_W
- systick::r32_stk_ctlr::STCLK_R
- systick::r32_stk_ctlr::STCLK_W
- systick::r32_stk_ctlr::STE_R
- systick::r32_stk_ctlr::STE_W
- systick::r32_stk_ctlr::STIE_R
- systick::r32_stk_ctlr::STIE_W
- systick::r32_stk_ctlr::STRELOAD_R
- systick::r32_stk_ctlr::STRELOAD_W
- tmr0::R32_TMR0_CNT_END
- tmr0::R32_TMR0_COUNT
- tmr0::R32_TMR0_FIFO
- tmr0::R8_TMR0_CTRL_MOD
- tmr0::R8_TMR0_FIFO_COUNT
- tmr0::R8_TMR0_INTER_EN
- tmr0::R8_TMR0_INT_FLAG
- tmr0::r32_tmr0_cnt_end::R32_TMR0_COUNT_R
- tmr0::r32_tmr0_cnt_end::R32_TMR0_COUNT_W
- tmr0::r32_tmr0_count::R32_TMR0_COUNT_R
- tmr0::r32_tmr0_fifo::R32_TMR0_FIFO_R
- tmr0::r32_tmr0_fifo::R32_TMR0_FIFO_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_ALL_CLEAR_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_ALL_CLEAR_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_COUNT_EN_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_COUNT_EN_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_MODE_IN_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_MODE_IN_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_OUT_EN_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_OUT_EN_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R
- tmr0::r8_tmr0_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W
- tmr0::r8_tmr0_fifo_count::R8_TMR0_FIFO_COUNT_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_CYC_END_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_CYC_END_W
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_DATA_ACT_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_DATA_ACT_W
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_DMA_END_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_DMA_END_W
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_FIFO_HF_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_FIFO_HF_W
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_FIFO_OV_R
- tmr0::r8_tmr0_int_flag::RB_TMR_IF_FIFO_OV_W
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_CYC_END_R
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_CYC_END_W
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_DATA_ACT_R
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_DATA_ACT_W
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_DMA_END_R
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_DMA_END_W
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_FIFO_HF_R
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_FIFO_HF_W
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_FIFO_OV_R
- tmr0::r8_tmr0_inter_en::RB_TMR_IE_FIFO_OV_W
- tmr1::R32_TMR1_CNT_END
- tmr1::R32_TMR1_COUNT
- tmr1::R32_TMR1_DMA_BEG
- tmr1::R32_TMR1_DMA_END
- tmr1::R32_TMR1_DMA_NOW
- tmr1::R32_TMR1_FIFO
- tmr1::R8_TMR1_CTRL_DMA
- tmr1::R8_TMR1_CTRL_MOD
- tmr1::R8_TMR1_FIFO_COUNT
- tmr1::R8_TMR1_INTER_EN
- tmr1::R8_TMR1_INT_FLAG
- tmr1::r32_tmr1_cnt_end::R32_TMR1_CNT_END_R
- tmr1::r32_tmr1_cnt_end::R32_TMR1_CNT_END_W
- tmr1::r32_tmr1_count::R32_TMR1_COUNT_R
- tmr1::r32_tmr1_dma_beg::R16_TMR1_DMA_BEG_R
- tmr1::r32_tmr1_dma_beg::R16_TMR1_DMA_BEG_W
- tmr1::r32_tmr1_dma_end::R16_TMR1_DMA_END_R
- tmr1::r32_tmr1_dma_end::R16_TMR1_DMA_END_W
- tmr1::r32_tmr1_dma_now::R16_TMR1_DMA_NOW_R
- tmr1::r32_tmr1_dma_now::R16_TMR1_DMA_NOW_W
- tmr1::r32_tmr1_fifo::R32_TMR1_FIFO_R
- tmr1::r32_tmr1_fifo::R32_TMR1_FIFO_W
- tmr1::r8_tmr1_ctrl_dma::RB_TMR_DMA_ENABLE_R
- tmr1::r8_tmr1_ctrl_dma::RB_TMR_DMA_ENABLE_W
- tmr1::r8_tmr1_ctrl_dma::RB_TMR_DMA_LOOP_R
- tmr1::r8_tmr1_ctrl_dma::RB_TMR_DMA_LOOP_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_ALL_CLEAR_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_ALL_CLEAR_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_COUNT_EN_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_COUNT_EN_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_MODE_IN_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_MODE_IN_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_OUT_EN_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_OUT_EN_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R
- tmr1::r8_tmr1_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W
- tmr1::r8_tmr1_fifo_count::R8_TMR1_FIFO_COUNT_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_CYC_END_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_CYC_END_W
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_DATA_ACT_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_DATA_ACT_W
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_DMA_END_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_DMA_END_W
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_FIFO_HF_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_FIFO_HF_W
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_FIFO_OV_R
- tmr1::r8_tmr1_int_flag::RB_TMR_IF_FIFO_OV_W
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_CYC_END_R
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_CYC_END_W
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_DATA_ACT_R
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_DATA_ACT_W
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_DMA_END_R
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_DMA_END_W
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_FIFO_HF_R
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_FIFO_HF_W
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_FIFO_OV_R
- tmr1::r8_tmr1_inter_en::RB_TMR_IE_FIFO_OV_W
- tmr2::R32_TMR2_CNT_END
- tmr2::R32_TMR2_COUNT
- tmr2::R32_TMR2_DMA_BEG
- tmr2::R32_TMR2_DMA_END
- tmr2::R32_TMR2_DMA_NOW
- tmr2::R32_TMR2_FIFO
- tmr2::R8_TMR2_CTRL_DMA
- tmr2::R8_TMR2_CTRL_MOD
- tmr2::R8_TMR2_FIFO_COUNT
- tmr2::R8_TMR2_INTER_EN
- tmr2::R8_TMR2_INT_FLAG
- tmr2::r32_tmr2_cnt_end::R32_TMR2_CNT_END_R
- tmr2::r32_tmr2_cnt_end::R32_TMR2_CNT_END_W
- tmr2::r32_tmr2_count::R32_TMR2_COUNT_R
- tmr2::r32_tmr2_dma_beg::R16_TMR2_DMA_BEG_R
- tmr2::r32_tmr2_dma_beg::R16_TMR2_DMA_BEG_W
- tmr2::r32_tmr2_dma_end::R16_TMR2_DMA_END_R
- tmr2::r32_tmr2_dma_end::R16_TMR2_DMA_END_W
- tmr2::r32_tmr2_dma_now::R16_TMR2_DMA_NOW_R
- tmr2::r32_tmr2_dma_now::R16_TMR2_DMA_NOW_W
- tmr2::r32_tmr2_fifo::R32_TMR2_FIFO_R
- tmr2::r32_tmr2_fifo::R32_TMR2_FIFO_W
- tmr2::r8_tmr2_ctrl_dma::RB_TMR_DMA_ENABLE_R
- tmr2::r8_tmr2_ctrl_dma::RB_TMR_DMA_ENABLE_W
- tmr2::r8_tmr2_ctrl_dma::RB_TMR_DMA_LOOP_R
- tmr2::r8_tmr2_ctrl_dma::RB_TMR_DMA_LOOP_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_ALL_CLEAR_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_ALL_CLEAR_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_COUNT_EN_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_COUNT_EN_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_MODE_IN_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_MODE_IN_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_OUT_EN_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_OUT_EN_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_OUT_POLAR_RB_TMR_CAP_COUNT_W
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_R
- tmr2::r8_tmr2_ctrl_mod::RB_TMR_PWM_REPEAT_RB_TMR_CAP_EDGE_W
- tmr2::r8_tmr2_fifo_count::R8_TMR2_FIFO_COUNT_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_CYC_END_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_CYC_END_W
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_DATA_ACT_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_DATA_ACT_W
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_DMA_END_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_DMA_END_W
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_FIFO_HF_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_FIFO_HF_W
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_FIFO_OV_R
- tmr2::r8_tmr2_int_flag::RB_TMR_IF_FIFO_OV_W
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_CYC_END_R
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_CYC_END_W
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_DATA_ACT_R
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_DATA_ACT_W
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_DMA_END_R
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_DMA_END_W
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_FIFO_HF_R
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_FIFO_HF_W
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_FIFO_OV_R
- tmr2::r8_tmr2_inter_en::RB_TMR_IE_FIFO_OV_W
- uart0::R16_UART0_DL
- uart0::R8_UART0_ADR
- uart0::R8_UART0_DIV
- uart0::R8_UART0_FCR
- uart0::R8_UART0_IER
- uart0::R8_UART0_IIR
- uart0::R8_UART0_LCR
- uart0::R8_UART0_LSR
- uart0::R8_UART0_MCR
- uart0::R8_UART0_MSR
- uart0::R8_UART0_RBR_R8_UART0_THR
- uart0::R8_UART0_RFC
- uart0::R8_UART0_TFC
- uart0::r16_uart0_dl::R16_UART0_DL_R
- uart0::r16_uart0_dl::R16_UART0_DL_W
- uart0::r8_uart0_adr::R8_UART0_ADR_R
- uart0::r8_uart0_adr::R8_UART0_ADR_W
- uart0::r8_uart0_div::R8_UART0_ADR_R
- uart0::r8_uart0_div::R8_UART0_ADR_W
- uart0::r8_uart0_fcr::RB_FCR_FIFO_EN_R
- uart0::r8_uart0_fcr::RB_FCR_FIFO_EN_W
- uart0::r8_uart0_fcr::RB_FCR_FIFO_TRIG_R
- uart0::r8_uart0_fcr::RB_FCR_FIFO_TRIG_W
- uart0::r8_uart0_fcr::RB_FCR_RX_FIFO_CLR_R
- uart0::r8_uart0_fcr::RB_FCR_RX_FIFO_CLR_W
- uart0::r8_uart0_fcr::RB_FCR_TX_FIFO_CLR_R
- uart0::r8_uart0_fcr::RB_FCR_TX_FIFO_CLR_W
- uart0::r8_uart0_ier::RB_IER_DTR_EN_R
- uart0::r8_uart0_ier::RB_IER_DTR_EN_W
- uart0::r8_uart0_ier::RB_IER_LINE_STAT_R
- uart0::r8_uart0_ier::RB_IER_LINE_STAT_W
- uart0::r8_uart0_ier::RB_IER_MODEM_CHG_R
- uart0::r8_uart0_ier::RB_IER_MODEM_CHG_W
- uart0::r8_uart0_ier::RB_IER_RECV_RDY_R
- uart0::r8_uart0_ier::RB_IER_RECV_RDY_W
- uart0::r8_uart0_ier::RB_IER_RESET_R
- uart0::r8_uart0_ier::RB_IER_RESET_W
- uart0::r8_uart0_ier::RB_IER_RTS_EN_R
- uart0::r8_uart0_ier::RB_IER_RTS_EN_W
- uart0::r8_uart0_ier::RB_IER_THR_EMPTY_R
- uart0::r8_uart0_ier::RB_IER_THR_EMPTY_W
- uart0::r8_uart0_ier::RB_IER_TXD_EN_R
- uart0::r8_uart0_ier::RB_IER_TXD_EN_W
- uart0::r8_uart0_iir::RB_IIR_FIFO_ID_R
- uart0::r8_uart0_iir::RB_IIR_INT_MASK_R
- uart0::r8_uart0_iir::RB_IIR_NO_INT_R
- uart0::r8_uart0_lcr::RB_LCR_BREAK_EN_R
- uart0::r8_uart0_lcr::RB_LCR_BREAK_EN_W
- uart0::r8_uart0_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_R
- uart0::r8_uart0_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_W
- uart0::r8_uart0_lcr::RB_LCR_PAR_EN_R
- uart0::r8_uart0_lcr::RB_LCR_PAR_EN_W
- uart0::r8_uart0_lcr::RB_LCR_PAR_MOD_R
- uart0::r8_uart0_lcr::RB_LCR_PAR_MOD_W
- uart0::r8_uart0_lcr::RB_LCR_STOP_BIT_R
- uart0::r8_uart0_lcr::RB_LCR_STOP_BIT_W
- uart0::r8_uart0_lcr::RB_LCR_WORD_SZ_R
- uart0::r8_uart0_lcr::RB_LCR_WORD_SZ_W
- uart0::r8_uart0_lsr::RB_LSR_BREAK_ERR_R
- uart0::r8_uart0_lsr::RB_LSR_DATA_RDY_R
- uart0::r8_uart0_lsr::RB_LSR_ERR_RX_FIFO_R
- uart0::r8_uart0_lsr::RB_LSR_FRAME_ERR_R
- uart0::r8_uart0_lsr::RB_LSR_OVER_ERR_R
- uart0::r8_uart0_lsr::RB_LSR_PAR_ERR_R
- uart0::r8_uart0_lsr::RB_LSR_TX_ALL_EMP_R
- uart0::r8_uart0_lsr::RB_LSR_TX_FIFO_EMP_R
- uart0::r8_uart0_mcr::RB_MCR_AU_FLOW_EN_R
- uart0::r8_uart0_mcr::RB_MCR_AU_FLOW_EN_W
- uart0::r8_uart0_mcr::RB_MCR_DTR_R
- uart0::r8_uart0_mcr::RB_MCR_DTR_W
- uart0::r8_uart0_mcr::RB_MCR_HALF_R
- uart0::r8_uart0_mcr::RB_MCR_HALF_W
- uart0::r8_uart0_mcr::RB_MCR_LOOP_R
- uart0::r8_uart0_mcr::RB_MCR_LOOP_W
- uart0::r8_uart0_mcr::RB_MCR_OUT1_R
- uart0::r8_uart0_mcr::RB_MCR_OUT1_W
- uart0::r8_uart0_mcr::RB_MCR_OUT2_R
- uart0::r8_uart0_mcr::RB_MCR_OUT2_W
- uart0::r8_uart0_mcr::RB_MCR_RTS_R
- uart0::r8_uart0_mcr::RB_MCR_RTS_W
- uart0::r8_uart0_mcr::RB_MCR_TNOW_R
- uart0::r8_uart0_mcr::RB_MCR_TNOW_W
- uart0::r8_uart0_msr::RB_MSR_CTS_CHG_R
- uart0::r8_uart0_msr::RB_MSR_CTS_R
- uart0::r8_uart0_msr::RB_MSR_DCD_CHG_R
- uart0::r8_uart0_msr::RB_MSR_DCD_R
- uart0::r8_uart0_msr::RB_MSR_DSR_CHG_R
- uart0::r8_uart0_msr::RB_MSR_DSR_R
- uart0::r8_uart0_msr::RB_MSR_RI_CHG_R
- uart0::r8_uart0_msr::RB_MSR_RI_R
- uart0::r8_uart0_rbr_r8_uart0_thr::R8_UART0_RBR_R8_UART0_THR_R
- uart0::r8_uart0_rbr_r8_uart0_thr::R8_UART0_RBR_R8_UART0_THR_W
- uart0::r8_uart0_rfc::R8_UART_RFC_R
- uart0::r8_uart0_tfc::R8_UART0_TFC_R
- uart1::R16_UART1_DL
- uart1::R8_UART1_DIV
- uart1::R8_UART1_FCR
- uart1::R8_UART1_IER
- uart1::R8_UART1_IIR
- uart1::R8_UART1_LCR
- uart1::R8_UART1_LSR
- uart1::R8_UART1_MCR
- uart1::R8_UART1_RBR_R8_UART1_THR
- uart1::R8_UART1_RFC
- uart1::R8_UART1_TFC
- uart1::r16_uart1_dl::R16_UART1_DL_R
- uart1::r16_uart1_dl::R16_UART1_DL_W
- uart1::r8_uart1_div::R8_UART1_DIV_R
- uart1::r8_uart1_div::R8_UART1_DIV_W
- uart1::r8_uart1_fcr::RB_FCR_FIFO_EN_R
- uart1::r8_uart1_fcr::RB_FCR_FIFO_EN_W
- uart1::r8_uart1_fcr::RB_FCR_FIFO_TRIG_R
- uart1::r8_uart1_fcr::RB_FCR_FIFO_TRIG_W
- uart1::r8_uart1_fcr::RB_FCR_RX_FIFO_CLR_R
- uart1::r8_uart1_fcr::RB_FCR_RX_FIFO_CLR_W
- uart1::r8_uart1_fcr::RB_FCR_TX_FIFO_CLR_R
- uart1::r8_uart1_fcr::RB_FCR_TX_FIFO_CLR_W
- uart1::r8_uart1_ier::RB_IER_LINE_STAT_R
- uart1::r8_uart1_ier::RB_IER_LINE_STAT_W
- uart1::r8_uart1_ier::RB_IER_RECV_RDY_R
- uart1::r8_uart1_ier::RB_IER_RECV_RDY_W
- uart1::r8_uart1_ier::RB_IER_RESET_R
- uart1::r8_uart1_ier::RB_IER_RESET_W
- uart1::r8_uart1_ier::RB_IER_THR_EMPTY_R
- uart1::r8_uart1_ier::RB_IER_THR_EMPTY_W
- uart1::r8_uart1_ier::RB_IER_TXD_EN_R
- uart1::r8_uart1_ier::RB_IER_TXD_EN_W
- uart1::r8_uart1_iir::RB_IIR_FIFO_ID_R
- uart1::r8_uart1_iir::RB_IIR_INT_MASK_R
- uart1::r8_uart1_iir::RB_IIR_NO_INT_R
- uart1::r8_uart1_lcr::RB_LCR_BREAK_EN_R
- uart1::r8_uart1_lcr::RB_LCR_BREAK_EN_W
- uart1::r8_uart1_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_R
- uart1::r8_uart1_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_W
- uart1::r8_uart1_lcr::RB_LCR_PAR_EN_R
- uart1::r8_uart1_lcr::RB_LCR_PAR_EN_W
- uart1::r8_uart1_lcr::RB_LCR_PAR_MOD_R
- uart1::r8_uart1_lcr::RB_LCR_PAR_MOD_W
- uart1::r8_uart1_lcr::RB_LCR_STOP_BIT_R
- uart1::r8_uart1_lcr::RB_LCR_STOP_BIT_W
- uart1::r8_uart1_lcr::RB_LCR_WORD_SZ_R
- uart1::r8_uart1_lcr::RB_LCR_WORD_SZ_W
- uart1::r8_uart1_lsr::RB_LSR_BREAK_ERR_R
- uart1::r8_uart1_lsr::RB_LSR_DATA_RDY_R
- uart1::r8_uart1_lsr::RB_LSR_ERR_RX_FIFO_R
- uart1::r8_uart1_lsr::RB_LSR_FRAME_ERR_R
- uart1::r8_uart1_lsr::RB_LSR_OVER_ERR_R
- uart1::r8_uart1_lsr::RB_LSR_PAR_ERR_R
- uart1::r8_uart1_lsr::RB_LSR_TX_ALL_EMP_R
- uart1::r8_uart1_lsr::RB_LSR_TX_FIFO_EMP_R
- uart1::r8_uart1_mcr::RB_MCR_OUT2_R
- uart1::r8_uart1_mcr::RB_MCR_OUT2_W
- uart1::r8_uart1_rbr_r8_uart1_thr::R8_UART1_RBR_R8_UART1_THR_R
- uart1::r8_uart1_rbr_r8_uart1_thr::R8_UART1_RBR_R8_UART1_THR_W
- uart1::r8_uart1_rfc::R8_UART1_RFC_R
- uart1::r8_uart1_tfc::R8_UART1_TFC_R
- uart2::R16_UART2_DL
- uart2::R8_UART2_DIV
- uart2::R8_UART2_FCR
- uart2::R8_UART2_IER
- uart2::R8_UART2_IIR
- uart2::R8_UART2_LCR
- uart2::R8_UART2_LSR
- uart2::R8_UART2_MCR
- uart2::R8_UART2_RBR_R8_UART2_THR
- uart2::R8_UART2_RFC
- uart2::R8_UART2_TFC
- uart2::r16_uart2_dl::R16_UART2_DL_R
- uart2::r16_uart2_dl::R16_UART2_DL_W
- uart2::r8_uart2_div::R8_UART2_DIV_R
- uart2::r8_uart2_div::R8_UART2_DIV_W
- uart2::r8_uart2_fcr::RB_FCR_FIFO_EN_R
- uart2::r8_uart2_fcr::RB_FCR_FIFO_EN_W
- uart2::r8_uart2_fcr::RB_FCR_FIFO_TRIG_R
- uart2::r8_uart2_fcr::RB_FCR_FIFO_TRIG_W
- uart2::r8_uart2_fcr::RB_FCR_RX_FIFO_CLR_R
- uart2::r8_uart2_fcr::RB_FCR_RX_FIFO_CLR_W
- uart2::r8_uart2_fcr::RB_FCR_TX_FIFO_CLR_R
- uart2::r8_uart2_fcr::RB_FCR_TX_FIFO_CLR_W
- uart2::r8_uart2_ier::RB_IER_LINE_STAT_R
- uart2::r8_uart2_ier::RB_IER_LINE_STAT_W
- uart2::r8_uart2_ier::RB_IER_RECV_RDY_R
- uart2::r8_uart2_ier::RB_IER_RECV_RDY_W
- uart2::r8_uart2_ier::RB_IER_RESET_R
- uart2::r8_uart2_ier::RB_IER_RESET_W
- uart2::r8_uart2_ier::RB_IER_THR_EMPTY_R
- uart2::r8_uart2_ier::RB_IER_THR_EMPTY_W
- uart2::r8_uart2_ier::RB_IER_TXD_EN_R
- uart2::r8_uart2_ier::RB_IER_TXD_EN_W
- uart2::r8_uart2_iir::RB_IIR_FIFO_ID_R
- uart2::r8_uart2_iir::RB_IIR_INT_MASK_R
- uart2::r8_uart2_iir::RB_IIR_NO_INT_R
- uart2::r8_uart2_lcr::RB_LCR_BREAK_EN_R
- uart2::r8_uart2_lcr::RB_LCR_BREAK_EN_W
- uart2::r8_uart2_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_R
- uart2::r8_uart2_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_W
- uart2::r8_uart2_lcr::RB_LCR_PAR_EN_R
- uart2::r8_uart2_lcr::RB_LCR_PAR_EN_W
- uart2::r8_uart2_lcr::RB_LCR_PAR_MOD_R
- uart2::r8_uart2_lcr::RB_LCR_PAR_MOD_W
- uart2::r8_uart2_lcr::RB_LCR_STOP_BIT_R
- uart2::r8_uart2_lcr::RB_LCR_STOP_BIT_W
- uart2::r8_uart2_lcr::RB_LCR_WORD_SZ_R
- uart2::r8_uart2_lcr::RB_LCR_WORD_SZ_W
- uart2::r8_uart2_lsr::RB_LSR_BREAK_ERR_R
- uart2::r8_uart2_lsr::RB_LSR_DATA_RDY_R
- uart2::r8_uart2_lsr::RB_LSR_ERR_RX_FIFO_R
- uart2::r8_uart2_lsr::RB_LSR_FRAME_ERR_R
- uart2::r8_uart2_lsr::RB_LSR_OVER_ERR_R
- uart2::r8_uart2_lsr::RB_LSR_PAR_ERR_R
- uart2::r8_uart2_lsr::RB_LSR_TX_ALL_EMP_R
- uart2::r8_uart2_lsr::RB_LSR_TX_FIFO_EMP_R
- uart2::r8_uart2_mcr::RB_MCR_OUT2_R
- uart2::r8_uart2_mcr::RB_MCR_OUT2_W
- uart2::r8_uart2_rbr_r8_uart2_thr::R8_UART_RBR_R8_UART_THR_R
- uart2::r8_uart2_rbr_r8_uart2_thr::R8_UART_RBR_R8_UART_THR_W
- uart2::r8_uart2_rfc::R8_UART2_RFC_R
- uart2::r8_uart2_tfc::R8_UART2_TFC_R
- uart3::R16_UART3_DL
- uart3::R8_UART3_DIV
- uart3::R8_UART3_FCR
- uart3::R8_UART3_IER
- uart3::R8_UART3_IIR
- uart3::R8_UART3_LCR
- uart3::R8_UART3_LSR
- uart3::R8_UART3_MCR
- uart3::R8_UART3_RBR_R8_UART3_THR
- uart3::R8_UART3_RFC
- uart3::R8_UART3_TFC
- uart3::r16_uart3_dl::R16_UART3_DL_R
- uart3::r16_uart3_dl::R16_UART3_DL_W
- uart3::r8_uart3_div::R8_UART3_DIV_R
- uart3::r8_uart3_div::R8_UART3_DIV_W
- uart3::r8_uart3_fcr::RB_FCR_FIFO_EN_R
- uart3::r8_uart3_fcr::RB_FCR_FIFO_EN_W
- uart3::r8_uart3_fcr::RB_FCR_FIFO_TRIG_R
- uart3::r8_uart3_fcr::RB_FCR_FIFO_TRIG_W
- uart3::r8_uart3_fcr::RB_FCR_RX_FIFO_CLR_R
- uart3::r8_uart3_fcr::RB_FCR_RX_FIFO_CLR_W
- uart3::r8_uart3_fcr::RB_FCR_TX_FIFO_CLR_R
- uart3::r8_uart3_fcr::RB_FCR_TX_FIFO_CLR_W
- uart3::r8_uart3_ier::RB_IER_LINE_STAT_R
- uart3::r8_uart3_ier::RB_IER_LINE_STAT_W
- uart3::r8_uart3_ier::RB_IER_RECV_RDY_R
- uart3::r8_uart3_ier::RB_IER_RECV_RDY_W
- uart3::r8_uart3_ier::RB_IER_RESET_R
- uart3::r8_uart3_ier::RB_IER_RESET_W
- uart3::r8_uart3_ier::RB_IER_THR_EMPTY_R
- uart3::r8_uart3_ier::RB_IER_THR_EMPTY_W
- uart3::r8_uart3_ier::RB_IER_TXD_EN_R
- uart3::r8_uart3_ier::RB_IER_TXD_EN_W
- uart3::r8_uart3_iir::RB_IIR_FIFO_ID_R
- uart3::r8_uart3_iir::RB_IIR_INT_MASK_R
- uart3::r8_uart3_iir::RB_IIR_NO_INT_R
- uart3::r8_uart3_lcr::RB_LCR_BREAK_EN_R
- uart3::r8_uart3_lcr::RB_LCR_BREAK_EN_W
- uart3::r8_uart3_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_R
- uart3::r8_uart3_lcr::RB_LCR_DLAB_RB_LCR_GP_BIT_W
- uart3::r8_uart3_lcr::RB_LCR_PAR_EN_R
- uart3::r8_uart3_lcr::RB_LCR_PAR_EN_W
- uart3::r8_uart3_lcr::RB_LCR_PAR_MOD_R
- uart3::r8_uart3_lcr::RB_LCR_PAR_MOD_W
- uart3::r8_uart3_lcr::RB_LCR_STOP_BIT_R
- uart3::r8_uart3_lcr::RB_LCR_STOP_BIT_W
- uart3::r8_uart3_lcr::RB_LCR_WORD_SZ_R
- uart3::r8_uart3_lcr::RB_LCR_WORD_SZ_W
- uart3::r8_uart3_lsr::RB_LSR_BREAK_ERR_R
- uart3::r8_uart3_lsr::RB_LSR_DATA_RDY_R
- uart3::r8_uart3_lsr::RB_LSR_ERR_RX_FIFO_R
- uart3::r8_uart3_lsr::RB_LSR_FRAME_ERR_R
- uart3::r8_uart3_lsr::RB_LSR_OVER_ERR_R
- uart3::r8_uart3_lsr::RB_LSR_PAR_ERR_R
- uart3::r8_uart3_lsr::RB_LSR_TX_ALL_EMP_R
- uart3::r8_uart3_lsr::RB_LSR_TX_FIFO_EMP_R
- uart3::r8_uart3_mcr::RB_MCR_OUT2_R
- uart3::r8_uart3_mcr::RB_MCR_OUT2_W
- uart3::r8_uart3_rbr_r8_uart3_thr::R8_UART3_RBR_R8_UART3_THR_R
- uart3::r8_uart3_rbr_r8_uart3_thr::R8_UART3_RBR_R8_UART3_THR_W
- uart3::r8_uart3_rfc::R8_UART3_RFC_R
- uart3::r8_uart3_tfc::R8_UART3_TFC_R
- usbhs::R16_UEP0_MAX_LEN
- usbhs::R16_UEP0_T_LEN
- usbhs::R16_UEP1_MAX_LEN
- usbhs::R16_UEP1_T_LEN
- usbhs::R16_UEP2_MAX_LEN_R16_UH_MAX_LEN
- usbhs::R16_UEP2_T_LEN_R16_UH_EP_PID
- usbhs::R16_UEP3_MAX_LEN
- usbhs::R16_UEP3_T_LEN_R16_UH_TX_LEN
- usbhs::R16_UEP4_MAX_LEN
- usbhs::R16_UEP4_T_LEN_R16_UH_SPLIT_DATA
- usbhs::R16_UEP5_MAX_LEN
- usbhs::R16_UEP5_T_LEN
- usbhs::R16_UEP6_MAX_LEN
- usbhs::R16_UEP6_T_LEN
- usbhs::R16_UEP7_MAX_LEN
- usbhs::R16_UEP7_T_LEN
- usbhs::R16_USB_FRAME_NO
- usbhs::R32_UEP0_RT_DMA
- usbhs::R32_UEP1_RX_DMA
- usbhs::R32_UEP1_TX_DMA
- usbhs::R32_UEP2_RX_DMA_R32_UH_RX_DMA
- usbhs::R32_UEP2_TX_DMA
- usbhs::R32_UEP3_RX_DMA
- usbhs::R32_UEP3_TX_DMA_R32_UH_TX_DMA
- usbhs::R32_UEP4_RX_DMA
- usbhs::R32_UEP4_TX_DMA
- usbhs::R32_UEP5_RX_DMA
- usbhs::R32_UEP5_TX_DMA
- usbhs::R32_UEP6_RX_DMA
- usbhs::R32_UEP6_TX_DMA
- usbhs::R32_UEP7_RX_DMA
- usbhs::R32_UEP7_TX_DMA
- usbhs::R6_USB_RX_LEN
- usbhs::R8_UEP0_RX_CTRL
- usbhs::R8_UEP0_TX_CTRL
- usbhs::R8_UEP1_RX_CTRL
- usbhs::R8_UEP1_TX_CTRL
- usbhs::R8_UEP2_3_MOD_R8_UH_EP_MOD
- usbhs::R8_UEP2_RX_CTRL_R8_UH_RX_CTRL
- usbhs::R8_UEP2_TX_CTRL
- usbhs::R8_UEP3_RX_CTRL
- usbhs::R8_UEP3_TX_CTRL_R8_UH_TX_CTRL
- usbhs::R8_UEP4_1_MOD
- usbhs::R8_UEP4_RX_CTRL
- usbhs::R8_UEP4_TX_CTRL
- usbhs::R8_UEP5_6_MOD
- usbhs::R8_UEP5_RX_CTRL
- usbhs::R8_UEP5_TX_CTRL
- usbhs::R8_UEP6_RX_CTRL
- usbhs::R8_UEP6_TX_CTRL
- usbhs::R8_UEP7_MOD
- usbhs::R8_UEP7_RX_CTRL
- usbhs::R8_UEP7_TX_CTRL
- usbhs::R8_UHOST_CTRL
- usbhs::R8_USB_CTRL
- usbhs::R8_USB_DEV_AD
- usbhs::R8_USB_INT_EN
- usbhs::R8_USB_INT_FG
- usbhs::R8_USB_INT_ST
- usbhs::R8_USB_MIS_ST
- usbhs::R8_USB_SPD_TYPE
- usbhs::R8_USB_SUSPEND
- usbhs::r16_uep0_max_len::UEP0_MAX_LEN_R
- usbhs::r16_uep0_max_len::UEP0_MAX_LEN_W
- usbhs::r16_uep0_t_len::UEP0_T_LEN_R
- usbhs::r16_uep0_t_len::UEP0_T_LEN_W
- usbhs::r16_uep1_max_len::UEP1_MAX_LEN_R
- usbhs::r16_uep1_max_len::UEP1_MAX_LEN_W
- usbhs::r16_uep1_t_len::UEP1_T_LEN_R
- usbhs::r16_uep1_t_len::UEP1_T_LEN_W
- usbhs::r16_uep2_max_len_r16_uh_max_len::UEP2_MAX_LEN_UH_MAX_LEN_R
- usbhs::r16_uep2_max_len_r16_uh_max_len::UEP2_MAX_LEN_UH_MAX_LEN_W
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::RB_UH_EPNUM_MASK_R
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::RB_UH_EPNUM_MASK_W
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::RB_UH_TOKEN_MASK_R
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::RB_UH_TOKEN_MASK_W
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::UEP2_T_LEN_R
- usbhs::r16_uep2_t_len_r16_uh_ep_pid::UEP2_T_LEN_W
- usbhs::r16_uep3_max_len::UEP3_MAX_LEN_R
- usbhs::r16_uep3_max_len::UEP3_MAX_LEN_W
- usbhs::r16_uep3_t_len_r16_uh_tx_len::UEP3_T_LEN_UH_TX_LEN_R
- usbhs::r16_uep3_t_len_r16_uh_tx_len::UEP3_T_LEN_UH_TX_LEN_W
- usbhs::r16_uep4_max_len::UEP4_MAX_LEN_R
- usbhs::r16_uep4_max_len::UEP4_MAX_LEN_W
- usbhs::r16_uep4_t_len_r16_uh_split_data::UEP4_T_LEN_UH_SPLIT_DATA_R
- usbhs::r16_uep4_t_len_r16_uh_split_data::UEP4_T_LEN_UH_SPLIT_DATA_W
- usbhs::r16_uep5_max_len::UEP5_MAX_LEN_R
- usbhs::r16_uep5_max_len::UEP5_MAX_LEN_W
- usbhs::r16_uep5_t_len::UEP5_T_LEN_R
- usbhs::r16_uep5_t_len::UEP5_T_LEN_W
- usbhs::r16_uep6_max_len::UEP6_MAX_LEN_R
- usbhs::r16_uep6_max_len::UEP6_MAX_LEN_W
- usbhs::r16_uep6_t_len::UEP6_T_LEN_R
- usbhs::r16_uep6_t_len::UEP6_T_LEN_W
- usbhs::r16_uep7_max_len::UEP7_MAX_LEN_R
- usbhs::r16_uep7_max_len::UEP7_MAX_LEN_W
- usbhs::r16_uep7_t_len::UEP7_T_LEN_R
- usbhs::r16_uep7_t_len::UEP7_T_LEN_W
- usbhs::r16_usb_frame_no::USB_FRAME_NO_R
- usbhs::r32_uep0_rt_dma::UEP0_RT_DMA_R
- usbhs::r32_uep0_rt_dma::UEP0_RT_DMA_W
- usbhs::r32_uep1_rx_dma::UEP1_RX_DMA_R
- usbhs::r32_uep1_rx_dma::UEP1_RX_DMA_W
- usbhs::r32_uep1_tx_dma::UEP1_TX_DMA_R
- usbhs::r32_uep1_tx_dma::UEP1_TX_DMA_W
- usbhs::r32_uep2_rx_dma_r32_uh_rx_dma::UEP2_RX_DMA_UH_RX_DMA_R
- usbhs::r32_uep2_rx_dma_r32_uh_rx_dma::UEP2_RX_DMA_UH_RX_DMA_W
- usbhs::r32_uep2_tx_dma::UEP2_TX_DMA_R
- usbhs::r32_uep2_tx_dma::UEP2_TX_DMA_W
- usbhs::r32_uep3_rx_dma::UEP3_RX_DMA_R
- usbhs::r32_uep3_rx_dma::UEP3_RX_DMA_W
- usbhs::r32_uep3_tx_dma_r32_uh_tx_dma::UEP3_TX_DMA_UH_TX_DMA_R
- usbhs::r32_uep3_tx_dma_r32_uh_tx_dma::UEP3_TX_DMA_UH_TX_DMA_W
- usbhs::r32_uep4_rx_dma::UEP4_RX_DMA_R
- usbhs::r32_uep4_rx_dma::UEP4_RX_DMA_W
- usbhs::r32_uep4_tx_dma::UEP4_TX_DMA_R
- usbhs::r32_uep4_tx_dma::UEP4_TX_DMA_W
- usbhs::r32_uep5_rx_dma::UEP5_RX_DMA_R
- usbhs::r32_uep5_rx_dma::UEP5_RX_DMA_W
- usbhs::r32_uep5_tx_dma::UEP5_TX_DMA_R
- usbhs::r32_uep5_tx_dma::UEP5_TX_DMA_W
- usbhs::r32_uep6_rx_dma::UEP6_RX_DMA_R
- usbhs::r32_uep6_rx_dma::UEP6_RX_DMA_W
- usbhs::r32_uep6_tx_dma::UEP6_TX_DMA_R
- usbhs::r32_uep6_tx_dma::UEP6_TX_DMA_W
- usbhs::r32_uep7_rx_dma::UEP7_RX_DMA_R
- usbhs::r32_uep7_rx_dma::UEP7_RX_DMA_W
- usbhs::r32_uep7_tx_dma::UEP7_TX_DMA_R
- usbhs::r32_uep7_tx_dma::UEP7_TX_DMA_W
- usbhs::r6_usb_rx_len::USB_RX_LEN_R
- usbhs::r8_uep0_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep0_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep0_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep0_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep0_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep0_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep0_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep0_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep0_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep0_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep0_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep0_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep0_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep0_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep0_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep0_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep1_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep1_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep1_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep1_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep1_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep1_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep1_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep1_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep1_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep1_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep1_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep1_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep1_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep1_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep1_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep1_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_BUF_MOD_RB_UH_RX_EN_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_BUF_MOD_RB_UH_RX_EN_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_RX_EN_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_RX_EN_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_TX_EN_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP2_TX_EN_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_BUF_MOD_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_BUF_MOD_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_RX_EN_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_RX_EN_W
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_TX_EN_RB_UH_TX_EN_R
- usbhs::r8_uep2_3_mod_r8_uh_ep_mod::RB_UEP3_TX_EN_RB_UH_TX_EN_W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_RRES_NO_RB_UH_RRES_NO_R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_RRES_NO_RB_UH_RRES_NO_W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UH_RDATA_NO_R
- usbhs::r8_uep2_rx_ctrl_r8_uh_rx_ctrl::RB_UH_RDATA_NO_W
- usbhs::r8_uep2_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep2_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep2_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep2_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep2_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep2_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep2_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep2_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep3_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep3_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep3_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep3_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep3_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep3_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep3_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep3_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_TRES_MASK_RB_UH_TRES_MASK_R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_TRES_MASK_RB_UH_TRES_MASK_W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_TRES_NO_RB_UH_TRES_NO_R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_TRES_NO_RB_UH_TRES_NO_W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_T_AUTOTOG_RB_UH_T_AUTOTOG_W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UEP_T_TOG_MASK_RB_UH_T_TOG_MASK_W
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UH_TDATA_NO_R
- usbhs::r8_uep3_tx_ctrl_r8_uh_tx_ctrl::RB_UH_TDATA_NO_W
- usbhs::r8_uep4_1_mod::RB_UEP1_BUF_MOD_R
- usbhs::r8_uep4_1_mod::RB_UEP1_BUF_MOD_W
- usbhs::r8_uep4_1_mod::RB_UEP1_RX_EN_R
- usbhs::r8_uep4_1_mod::RB_UEP1_RX_EN_W
- usbhs::r8_uep4_1_mod::RB_UEP1_TX_EN_R
- usbhs::r8_uep4_1_mod::RB_UEP1_TX_EN_W
- usbhs::r8_uep4_1_mod::RB_UEP4_BUF_MOD_R
- usbhs::r8_uep4_1_mod::RB_UEP4_BUF_MOD_W
- usbhs::r8_uep4_1_mod::RB_UEP4_RX_EN_R
- usbhs::r8_uep4_1_mod::RB_UEP4_RX_EN_W
- usbhs::r8_uep4_1_mod::RB_UEP4_TX_EN_R
- usbhs::r8_uep4_1_mod::RB_UEP4_TX_EN_W
- usbhs::r8_uep4_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep4_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep4_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep4_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep4_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep4_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep4_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep4_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep4_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep4_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep4_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep4_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep4_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep4_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep4_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep4_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep5_6_mod::RB_UEP5_BUF_MOD_R
- usbhs::r8_uep5_6_mod::RB_UEP5_BUF_MOD_W
- usbhs::r8_uep5_6_mod::RB_UEP5_RX_EN_R
- usbhs::r8_uep5_6_mod::RB_UEP5_RX_EN_W
- usbhs::r8_uep5_6_mod::RB_UEP5_TX_EN_R
- usbhs::r8_uep5_6_mod::RB_UEP5_TX_EN_W
- usbhs::r8_uep5_6_mod::RB_UEP6_BUF_MOD_R
- usbhs::r8_uep5_6_mod::RB_UEP6_BUF_MOD_W
- usbhs::r8_uep5_6_mod::RB_UEP6_RX_EN_R
- usbhs::r8_uep5_6_mod::RB_UEP6_RX_EN_W
- usbhs::r8_uep5_6_mod::RB_UEP6_TX_EN_R
- usbhs::r8_uep5_6_mod::RB_UEP6_TX_EN_W
- usbhs::r8_uep5_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep5_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep5_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep5_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep5_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep5_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep5_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep5_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep5_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep5_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep5_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep5_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep5_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep5_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep5_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep5_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep6_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep6_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep6_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep6_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep6_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep6_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep6_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep6_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep6_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep6_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep6_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep6_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep6_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep6_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep6_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep6_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uep7_mod::RB_UEP7_BUF_MOD_R
- usbhs::r8_uep7_mod::RB_UEP7_BUF_MOD_W
- usbhs::r8_uep7_mod::RB_UEP7_RX_EN_R
- usbhs::r8_uep7_mod::RB_UEP7_RX_EN_W
- usbhs::r8_uep7_mod::RB_UEP7_TX_EN_R
- usbhs::r8_uep7_mod::RB_UEP7_TX_EN_W
- usbhs::r8_uep7_rx_ctrl::RB_UEP_RRES_MASK_R
- usbhs::r8_uep7_rx_ctrl::RB_UEP_RRES_MASK_W
- usbhs::r8_uep7_rx_ctrl::RB_UEP_RRES_NO_R
- usbhs::r8_uep7_rx_ctrl::RB_UEP_RRES_NO_W
- usbhs::r8_uep7_rx_ctrl::RB_UEP_R_AUTOTOG_R
- usbhs::r8_uep7_rx_ctrl::RB_UEP_R_AUTOTOG_W
- usbhs::r8_uep7_rx_ctrl::RB_UEP_R_TOG_MASK_R
- usbhs::r8_uep7_rx_ctrl::RB_UEP_R_TOG_MASK_W
- usbhs::r8_uep7_tx_ctrl::RB_UEP_TRES_MASK_R
- usbhs::r8_uep7_tx_ctrl::RB_UEP_TRES_MASK_W
- usbhs::r8_uep7_tx_ctrl::RB_UEP_TRES_NO_R
- usbhs::r8_uep7_tx_ctrl::RB_UEP_TRES_NO_W
- usbhs::r8_uep7_tx_ctrl::RB_UEP_T_AUTOTOG_R
- usbhs::r8_uep7_tx_ctrl::RB_UEP_T_AUTOTOG_W
- usbhs::r8_uep7_tx_ctrl::RB_UEP_T_TOG_MASK_R
- usbhs::r8_uep7_tx_ctrl::RB_UEP_T_TOG_MASK_W
- usbhs::r8_uhost_ctrl::RB_UH_AUTOSOF_EN_R
- usbhs::r8_uhost_ctrl::RB_UH_AUTOSOF_EN_W
- usbhs::r8_uhost_ctrl::RB_UH_BUS_RESET_R
- usbhs::r8_uhost_ctrl::RB_UH_BUS_RESET_W
- usbhs::r8_uhost_ctrl::RB_UH_BUS_RESUME_R
- usbhs::r8_uhost_ctrl::RB_UH_BUS_RESUME_W
- usbhs::r8_uhost_ctrl::RB_UH_BUS_SUSPEND_R
- usbhs::r8_uhost_ctrl::RB_UH_BUS_SUSPEND_W
- usbhs::r8_usb_ctrl::RB_DEV_PU_EN_R
- usbhs::r8_usb_ctrl::RB_DEV_PU_EN_W
- usbhs::r8_usb_ctrl::RB_USB_CLR_ALL_R
- usbhs::r8_usb_ctrl::RB_USB_CLR_ALL_W
- usbhs::r8_usb_ctrl::RB_USB_DMA_EN_R
- usbhs::r8_usb_ctrl::RB_USB_DMA_EN_W
- usbhs::r8_usb_ctrl::RB_USB_INT_BUSY_R
- usbhs::r8_usb_ctrl::RB_USB_INT_BUSY_W
- usbhs::r8_usb_ctrl::RB_USB_MODE_R
- usbhs::r8_usb_ctrl::RB_USB_MODE_W
- usbhs::r8_usb_ctrl::RB_USB_RESET_SIE_R
- usbhs::r8_usb_ctrl::RB_USB_RESET_SIE_W
- usbhs::r8_usb_ctrl::RB_USB_SPTP_MASK_R
- usbhs::r8_usb_ctrl::RB_USB_SPTP_MASK_W
- usbhs::r8_usb_dev_ad::USB_ADDR_MASK_R
- usbhs::r8_usb_dev_ad::USB_ADDR_MASK_W
- usbhs::r8_usb_int_en::RB_USB_IE_BUSRST_RB_USB_IE_DETECT_R
- usbhs::r8_usb_int_en::RB_USB_IE_BUSRST_RB_USB_IE_DETECT_W
- usbhs::r8_usb_int_en::RB_USB_IE_DEV_NAK_R
- usbhs::r8_usb_int_en::RB_USB_IE_DEV_NAK_W
- usbhs::r8_usb_int_en::RB_USB_IE_FIFOOV_R
- usbhs::r8_usb_int_en::RB_USB_IE_FIFOOV_W
- usbhs::r8_usb_int_en::RB_USB_IE_ISOACT_R
- usbhs::r8_usb_int_en::RB_USB_IE_ISOACT_W
- usbhs::r8_usb_int_en::RB_USB_IE_SETUPACT_R
- usbhs::r8_usb_int_en::RB_USB_IE_SETUPACT_W
- usbhs::r8_usb_int_en::RB_USB_IE_SOF_R
- usbhs::r8_usb_int_en::RB_USB_IE_SOF_W
- usbhs::r8_usb_int_en::RB_USB_IE_SUSPEND_R
- usbhs::r8_usb_int_en::RB_USB_IE_SUSPEND_W
- usbhs::r8_usb_int_en::RB_USB_IE_TRANS_R
- usbhs::r8_usb_int_en::RB_USB_IE_TRANS_W
- usbhs::r8_usb_int_fg::RB_USB_IF_BUSRST_RB_USB_IF_DETECT_R
- usbhs::r8_usb_int_fg::RB_USB_IF_BUSRST_RB_USB_IF_DETECT_W
- usbhs::r8_usb_int_fg::RB_USB_IF_FIFOOV_R
- usbhs::r8_usb_int_fg::RB_USB_IF_FIFOOV_W
- usbhs::r8_usb_int_fg::RB_USB_IF_HST_SOF_R
- usbhs::r8_usb_int_fg::RB_USB_IF_HST_SOF_W
- usbhs::r8_usb_int_fg::RB_USB_IF_ISOACT_R
- usbhs::r8_usb_int_fg::RB_USB_IF_ISOACT_W
- usbhs::r8_usb_int_fg::RB_USB_IF_SETUOACT_R
- usbhs::r8_usb_int_fg::RB_USB_IF_SETUOACT_W
- usbhs::r8_usb_int_fg::RB_USB_IF_SUSPEND_R
- usbhs::r8_usb_int_fg::RB_USB_IF_SUSPEND_W
- usbhs::r8_usb_int_fg::RB_USB_IF_TRANSFER_R
- usbhs::r8_usb_int_fg::RB_USB_IF_TRANSFER_W
- usbhs::r8_usb_int_st::RB_DEV_TOKEN_MASK_R
- usbhs::r8_usb_int_st::RB_HOST_RES_MASK_RB_DEV_ENDP_MASK_R
- usbhs::r8_usb_int_st::RB_USB_ST_NAK_R
- usbhs::r8_usb_int_st::RB_USB_ST_TOGOK_R
- usbhs::r8_usb_mis_st::RB_USBBUS_RESET_R
- usbhs::r8_usb_mis_st::RB_USBBUS_SUSPEND_R
- usbhs::r8_usb_mis_st::RB_USB_ATTACH_R
- usbhs::r8_usb_mis_st::RB_USB_FIFO_RDY_R
- usbhs::r8_usb_mis_st::RB_USB_SIE_FREE_R
- usbhs::r8_usb_mis_st::RB_USB_SOF_ACT_R
- usbhs::r8_usb_mis_st::RB_USB_SOF_PRES_R
- usbhs::r8_usb_mis_st::RB_USB_SPLIT_EN_R
- usbhs::r8_usb_spd_type::RB_USBSPEED_MASK_R
- usbhs::r8_usb_suspend::RB_DEV_WAKEUP_R
- usbhs::r8_usb_suspend::RB_DEV_WAKEUP_W