Module cc3220sf::gpioa4::dr8r

0x4000 5508 0x4000 6508 0x4000 7508 0x4002 4508 GPIO 8-mA Drive Select (GPIODR8R)@@ offset 0x508 The GPIODR8R register is the 8-mA drive control register. Each GPIO signal in the port can be individually configured without affecting the other pads. When setting the DRV8 bit for a GPIO signal@@ the corresponding DRV2 bit in the GPIODR2R register and DRV4 bit in the GPIODR4R register are automatically cleared by hardware. The 8-mA setting is also used for high-current operation. Note: There is no configuration difference between 8-mA and high-current operation. The additional current capacity results from a shift in the VOH/VOL levels.

Type Definitions

R	Reader of register DR8R
W	Writer for register DR8R