Module cc3220sf::gpioa0::odr

0x4000 550C 0x4000 650C 0x4000 750C 0x4002 450C GPIO Open Drain Select (GPIOODR)@@ offset 0x50C The GPIOODR register is the open drain control register. Setting a bit in this register enables the open-drain configuration of the corresponding GPIO pad. When open-drain mode is enabled@@ the corresponding bit should also be set in the GPIO Digital Input Enable (GPIODEN) register . Corresponding bits in the drive strength and slew rate control registers (GPIODR2R@@ GPIODR4R@@ GPIODR8R@@ and GPIOSLR) can be set to achieve the desired rise and fall times. The GPIO acts as an open-drain input if the corresponding bit in the GPIODIR register is cleared. If open drain is selected while the GPIO is configured as an input@@ the GPIO will remain an input and the open-drain selection has no effect until the GPIO is changed to an output. When using the I2C module@@ in addition to configuring the pin to open drain@@ the GPIO Alternate Function Select (GPIOAFSEL) register bits for the I2C clock and data pins should be set

Type Definitions

R	Reader of register ODR
W	Writer for register ODR