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#[doc = r" Value read from the register"] pub struct R { bits: u32, } #[doc = r" Value to write to the register"] pub struct W { bits: u32, } impl super::MIMR { #[doc = r" Modifies the contents of the register"] #[inline] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); let r = R { bits: bits }; let mut w = W { bits: bits }; f(&r, &mut w); self.register.set(w.bits); } #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get() } } #[doc = r" Writes to the register"] #[inline] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } #[doc = r" Writes the reset value to the register"] #[inline] pub fn reset(&self) { self.write(|w| w) } } #[doc = r" Value of the field"] pub struct RESERVED1R { bits: u32, } impl RESERVED1R { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } } #[doc = "Possible values of the field `IM`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum IMR { #[doc = "Enable Interrupt"] EN, #[doc = "Disable Interrupt"] DIS, } impl IMR { #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { match *self { IMR::EN => true, IMR::DIS => false, } } #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _from(value: bool) -> IMR { match value { true => IMR::EN, false => IMR::DIS, } } #[doc = "Checks if the value of the field is `EN`"] #[inline] pub fn is_en(&self) -> bool { *self == IMR::EN } #[doc = "Checks if the value of the field is `DIS`"] #[inline] pub fn is_dis(&self) -> bool { *self == IMR::DIS } } #[doc = "Values that can be written to the field `IM`"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum IMW { #[doc = "Enable Interrupt"] EN, #[doc = "Disable Interrupt"] DIS, } impl IMW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { IMW::EN => true, IMW::DIS => false, } } } #[doc = r" Proxy"] pub struct _IMW<'a> { w: &'a mut W, } impl<'a> _IMW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: IMW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "Enable Interrupt"] #[inline] pub fn en(self) -> &'a mut W { self.variant(IMW::EN) } #[doc = "Disable Interrupt"] #[inline] pub fn dis(self) -> &'a mut W { self.variant(IMW::DIS) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 0; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bits 1:31 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."] #[inline] pub fn reserved1(&self) -> RESERVED1R { let bits = { const MASK: u32 = 2147483647; const OFFSET: u8 = 1; ((self.bits >> OFFSET) & MASK as u32) as u32 }; RESERVED1R { bits } } #[doc = "Bit 0 - Interrupt mask 0: The MRIS.RIS interrupt is suppressed and not sent to the interrupt controller. 1: The master interrupt is sent to the interrupt controller when the MRIS.RIS is set."] #[inline] pub fn im(&self) -> IMR { IMR::_from({ const MASK: bool = true; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) != 0 }) } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 0 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - Interrupt mask 0: The MRIS.RIS interrupt is suppressed and not sent to the interrupt controller. 1: The master interrupt is sent to the interrupt controller when the MRIS.RIS is set."] #[inline] pub fn im(&mut self) -> _IMW { _IMW { w: self } } }