#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CTL {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RESERVED16R {
bits: u16,
}
impl RESERVED16R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = "Possible values of the field `CTSEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSENR {
#[doc = "CTS hardware flow control enabled"]
EN,
#[doc = "CTS hardware flow control disabled"]
DIS,
}
impl CTSENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
CTSENR::EN => true,
CTSENR::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> CTSENR {
match value {
true => CTSENR::EN,
false => CTSENR::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == CTSENR::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == CTSENR::DIS
}
}
#[doc = "Possible values of the field `RTSEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTSENR {
#[doc = "RTS hardware flow control enabled"]
EN,
#[doc = "RTS hardware flow control disabled"]
DIS,
}
impl RTSENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTSENR::EN => true,
RTSENR::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTSENR {
match value {
true => RTSENR::EN,
false => RTSENR::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == RTSENR::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == RTSENR::DIS
}
}
#[doc = r" Value of the field"]
pub struct RESERVED12R {
bits: u8,
}
impl RESERVED12R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RTSR {
bits: bool,
}
impl RTSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = r" Value of the field"]
pub struct RESERVED10R {
bits: bool,
}
impl RESERVED10R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
#[doc = "Possible values of the field `RXE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RXER {
#[doc = "UART Receive enabled"]
EN,
#[doc = "UART Receive disabled"]
DIS,
}
impl RXER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RXER::EN => true,
RXER::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RXER {
match value {
true => RXER::EN,
false => RXER::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == RXER::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == RXER::DIS
}
}
#[doc = "Possible values of the field `TXE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TXER {
#[doc = "UART Transmit enabled"]
EN,
#[doc = "UART Transmit disabled"]
DIS,
}
impl TXER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TXER::EN => true,
TXER::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TXER {
match value {
true => TXER::EN,
false => TXER::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == TXER::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == TXER::DIS
}
}
#[doc = "Possible values of the field `LBE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LBER {
#[doc = "Loop Back enabled"]
EN,
#[doc = "Loop Back disabled"]
DIS,
}
impl LBER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
LBER::EN => true,
LBER::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> LBER {
match value {
true => LBER::EN,
false => LBER::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == LBER::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == LBER::DIS
}
}
#[doc = r" Value of the field"]
pub struct RESERVED1R {
bits: u8,
}
impl RESERVED1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `UARTEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UARTENR {
#[doc = "UART enabled"]
EN,
#[doc = "UART disabled"]
DIS,
}
impl UARTENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
UARTENR::EN => true,
UARTENR::DIS => false,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> UARTENR {
match value {
true => UARTENR::EN,
false => UARTENR::DIS,
}
}
#[doc = "Checks if the value of the field is `EN`"]
#[inline]
pub fn is_en(&self) -> bool {
*self == UARTENR::EN
}
#[doc = "Checks if the value of the field is `DIS`"]
#[inline]
pub fn is_dis(&self) -> bool {
*self == UARTENR::DIS
}
}
#[doc = "Values that can be written to the field `CTSEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSENW {
#[doc = "CTS hardware flow control enabled"]
EN,
#[doc = "CTS hardware flow control disabled"]
DIS,
}
impl CTSENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
CTSENW::EN => true,
CTSENW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _CTSENW<'a> {
w: &'a mut W,
}
impl<'a> _CTSENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: CTSENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "CTS hardware flow control enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(CTSENW::EN)
}
#[doc = "CTS hardware flow control disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(CTSENW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 15;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTSEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTSENW {
#[doc = "RTS hardware flow control enabled"]
EN,
#[doc = "RTS hardware flow control disabled"]
DIS,
}
impl RTSENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTSENW::EN => true,
RTSENW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _RTSENW<'a> {
w: &'a mut W,
}
impl<'a> _RTSENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTSENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "RTS hardware flow control enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(RTSENW::EN)
}
#[doc = "RTS hardware flow control disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(RTSENW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 14;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RESERVED12W<'a> {
w: &'a mut W,
}
impl<'a> _RESERVED12W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RTSW<'a> {
w: &'a mut W,
}
impl<'a> _RTSW<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 11;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RESERVED10W<'a> {
w: &'a mut W,
}
impl<'a> _RESERVED10W<'a> {
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RXE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RXEW {
#[doc = "UART Receive enabled"]
EN,
#[doc = "UART Receive disabled"]
DIS,
}
impl RXEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RXEW::EN => true,
RXEW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _RXEW<'a> {
w: &'a mut W,
}
impl<'a> _RXEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RXEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "UART Receive enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(RXEW::EN)
}
#[doc = "UART Receive disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(RXEW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TXE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TXEW {
#[doc = "UART Transmit enabled"]
EN,
#[doc = "UART Transmit disabled"]
DIS,
}
impl TXEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TXEW::EN => true,
TXEW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _TXEW<'a> {
w: &'a mut W,
}
impl<'a> _TXEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TXEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "UART Transmit enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(TXEW::EN)
}
#[doc = "UART Transmit disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(TXEW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `LBE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LBEW {
#[doc = "Loop Back enabled"]
EN,
#[doc = "Loop Back disabled"]
DIS,
}
impl LBEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
LBEW::EN => true,
LBEW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _LBEW<'a> {
w: &'a mut W,
}
impl<'a> _LBEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: LBEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Loop Back enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(LBEW::EN)
}
#[doc = "Loop Back disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(LBEW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RESERVED1W<'a> {
w: &'a mut W,
}
impl<'a> _RESERVED1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 63;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `UARTEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UARTENW {
#[doc = "UART enabled"]
EN,
#[doc = "UART disabled"]
DIS,
}
impl UARTENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
UARTENW::EN => true,
UARTENW::DIS => false,
}
}
}
#[doc = r" Proxy"]
pub struct _UARTENW<'a> {
w: &'a mut W,
}
impl<'a> _UARTENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: UARTENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "UART enabled"]
#[inline]
pub fn en(self) -> &'a mut W {
self.variant(UARTENW::EN)
}
#[doc = "UART disabled"]
#[inline]
pub fn dis(self) -> &'a mut W {
self.variant(UARTENW::DIS)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 16:31 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved16(&self) -> RESERVED16R {
let bits = {
const MASK: u16 = 65535;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u16
};
RESERVED16R { bits }
}
#[doc = "Bit 15 - CTS hardware flow control enable"]
#[inline]
pub fn ctsen(&self) -> CTSENR {
CTSENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 15;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 14 - RTS hardware flow control enable"]
#[inline]
pub fn rtsen(&self) -> RTSENR {
RTSENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 12:13 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved12(&self) -> RESERVED12R {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RESERVED12R { bits }
}
#[doc = "Bit 11 - Request to Send This bit is the complement of the active-low UART RTS output. That is, when the bit is programmed to a 1 then RTS output on the pins is LOW."]
#[inline]
pub fn rts(&self) -> RTSR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 11;
((self.bits >> OFFSET) & MASK as u32) != 0
};
RTSR { bits }
}
#[doc = "Bit 10 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved10(&self) -> RESERVED10R {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) != 0
};
RESERVED10R { bits }
}
#[doc = "Bit 9 - UART Receive Enable If the UART is disabled in the middle of reception, it completes the current character before stopping."]
#[inline]
pub fn rxe(&self) -> RXER {
RXER::_from({
const MASK: bool = true;
const OFFSET: u8 = 9;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 8 - UART Transmit Enable If the UART is disabled in the middle of transmission, it completes the current character before stopping."]
#[inline]
pub fn txe(&self) -> TXER {
TXER::_from({
const MASK: bool = true;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - UART Loop Back Enable: Enabling the loop-back mode connects the UARTTXD output from the UART to UARTRXD input of the UART."]
#[inline]
pub fn lbe(&self) -> LBER {
LBER::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 1:6 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved1(&self) -> RESERVED1R {
let bits = {
const MASK: u8 = 63;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RESERVED1R { bits }
}
#[doc = "Bit 0 - UART Enable"]
#[inline]
pub fn uarten(&self) -> UARTENR {
UARTENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 15 - CTS hardware flow control enable"]
#[inline]
pub fn ctsen(&mut self) -> _CTSENW {
_CTSENW { w: self }
}
#[doc = "Bit 14 - RTS hardware flow control enable"]
#[inline]
pub fn rtsen(&mut self) -> _RTSENW {
_RTSENW { w: self }
}
#[doc = "Bits 12:13 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved12(&mut self) -> _RESERVED12W {
_RESERVED12W { w: self }
}
#[doc = "Bit 11 - Request to Send This bit is the complement of the active-low UART RTS output. That is, when the bit is programmed to a 1 then RTS output on the pins is LOW."]
#[inline]
pub fn rts(&mut self) -> _RTSW {
_RTSW { w: self }
}
#[doc = "Bit 10 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved10(&mut self) -> _RESERVED10W {
_RESERVED10W { w: self }
}
#[doc = "Bit 9 - UART Receive Enable If the UART is disabled in the middle of reception, it completes the current character before stopping."]
#[inline]
pub fn rxe(&mut self) -> _RXEW {
_RXEW { w: self }
}
#[doc = "Bit 8 - UART Transmit Enable If the UART is disabled in the middle of transmission, it completes the current character before stopping."]
#[inline]
pub fn txe(&mut self) -> _TXEW {
_TXEW { w: self }
}
#[doc = "Bit 7 - UART Loop Back Enable: Enabling the loop-back mode connects the UARTTXD output from the UART to UARTRXD input of the UART."]
#[inline]
pub fn lbe(&mut self) -> _LBEW {
_LBEW { w: self }
}
#[doc = "Bits 1:6 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
#[inline]
pub fn reserved1(&mut self) -> _RESERVED1W {
_RESERVED1W { w: self }
}
#[doc = "Bit 0 - UART Enable"]
#[inline]
pub fn uarten(&mut self) -> _UARTENW {
_UARTENW { w: self }
}
}