Module cc2650::cpu_scs::nvic_ipr3

Irq 12 to 15 Priority This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the setting in AIRCR.PRIGROUP.

Structs

PRI_12R	Value of the field
PRI_13R	Value of the field
PRI_14R	Value of the field
PRI_15R	Value of the field
R	Value read from the register
W	Value to write to the register
_PRI_12W	Proxy
_PRI_13W	Proxy
_PRI_14W	Proxy
_PRI_15W	Proxy