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#[doc = "Reader of register DR"] pub type R = crate::R<u32, super::DR>; #[doc = "Writer for register DR"] pub type W = crate::W<u32, super::DR>; #[doc = "Register DR `reset()`'s with value 0"] impl crate::ResetValue for super::DR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `Reserved20`"] pub type RESERVED20_R = crate::R<u32, u32>; #[doc = "Write proxy for field `Reserved20`"] pub struct RESERVED20_W<'a> { w: &'a mut W, } impl<'a> RESERVED20_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !(0x000f_ffff << 12)) | (((value as u32) & 0x000f_ffff) << 12); self.w } } #[doc = "Reader of field `OE`"] pub type OE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `OE`"] pub struct OE_W<'a> { w: &'a mut W, } impl<'a> OE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `BE`"] pub type BE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BE`"] pub struct BE_W<'a> { w: &'a mut W, } impl<'a> BE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Reader of field `PE`"] pub type PE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PE`"] pub struct PE_W<'a> { w: &'a mut W, } impl<'a> PE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `FE`"] pub type FE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FE`"] pub struct FE_W<'a> { w: &'a mut W, } impl<'a> FE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `DATA`"] pub type DATA_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DATA`"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff); self.w } } impl R { #[doc = "Bits 12:31 - 31:12\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved20(&self) -> RESERVED20_R { RESERVED20_R::new(((self.bits >> 12) & 0x000f_ffff) as u32) } #[doc = "Bit 11 - 11:11\\] UART overrun error 1: New data was received when the FIFO was full, resulting in data loss. 0: No data has been lost due to a FIFO overrun."] #[inline(always)] pub fn oe(&self) -> OE_R { OE_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - 10:10\\] UART break error 1: A break condition has been detected, indicating that the receive data input was held low for longer than a full-word transmission time (defined as start, data, parity, and stop bits). 0: No break condition has occurred. In FIFO mode, this error is associated with the character at the top of the FIFO. When a break occurs, only the one 0 character is loaded into the FIFO. The next character is only enabled after the received data input goes to a 1 (marking state), and the next valid start bit is received."] #[inline(always)] pub fn be(&self) -> BE_R { BE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - 9:9\\] UART parity error 1: The parity of the received data character does not match the parity defined by bits 2 and 7 of the UARTLCRH register 0: No parity error has occurred. In FIFO mode, this error is associated with the character at the top of the FIFO."] #[inline(always)] pub fn pe(&self) -> PE_R { PE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - 8:8\\] UART framing error 1: The received character does not have a valid stop bit (a valid stop bit is 1). 0: No framing error has occurred."] #[inline(always)] pub fn fe(&self) -> FE_R { FE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:7 - 7:0\\] Data transmitted or received Data that is to be transmitted via the UART is written to this field. When read, this field contains the data that was received by the UART."] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 12:31 - 31:12\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved20(&mut self) -> RESERVED20_W { RESERVED20_W { w: self } } #[doc = "Bit 11 - 11:11\\] UART overrun error 1: New data was received when the FIFO was full, resulting in data loss. 0: No data has been lost due to a FIFO overrun."] #[inline(always)] pub fn oe(&mut self) -> OE_W { OE_W { w: self } } #[doc = "Bit 10 - 10:10\\] UART break error 1: A break condition has been detected, indicating that the receive data input was held low for longer than a full-word transmission time (defined as start, data, parity, and stop bits). 0: No break condition has occurred. In FIFO mode, this error is associated with the character at the top of the FIFO. When a break occurs, only the one 0 character is loaded into the FIFO. The next character is only enabled after the received data input goes to a 1 (marking state), and the next valid start bit is received."] #[inline(always)] pub fn be(&mut self) -> BE_W { BE_W { w: self } } #[doc = "Bit 9 - 9:9\\] UART parity error 1: The parity of the received data character does not match the parity defined by bits 2 and 7 of the UARTLCRH register 0: No parity error has occurred. In FIFO mode, this error is associated with the character at the top of the FIFO."] #[inline(always)] pub fn pe(&mut self) -> PE_W { PE_W { w: self } } #[doc = "Bit 8 - 8:8\\] UART framing error 1: The received character does not have a valid stop bit (a valid stop bit is 1). 0: No framing error has occurred."] #[inline(always)] pub fn fe(&mut self) -> FE_W { FE_W { w: self } } #[doc = "Bits 0:7 - 7:0\\] Data transmitted or received Data that is to be transmitted via the UART is written to this field. When read, this field contains the data that was received by the UART."] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } }