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#[doc = "Reader of register CR"] pub type R = crate::R<u32, super::CR>; #[doc = "Writer for register CR"] pub type W = crate::W<u32, super::CR>; #[doc = "Register CR `reset()`'s with value 0"] impl crate::ResetValue for super::CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `Reserved26`"] pub type RESERVED26_R = crate::R<u32, u32>; #[doc = "Write proxy for field `Reserved26`"] pub struct RESERVED26_W<'a> { w: &'a mut W, } impl<'a> RESERVED26_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff_ffff << 6)) | (((value as u32) & 0x03ff_ffff) << 6); self.w } } #[doc = "Reader of field `SFE`"] pub type SFE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SFE`"] pub struct SFE_W<'a> { w: &'a mut W, } impl<'a> SFE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `MFE`"] pub type MFE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MFE`"] pub struct MFE_W<'a> { w: &'a mut W, } impl<'a> MFE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `Reserved3`"] pub type RESERVED3_R = crate::R<u8, u8>; #[doc = "Write proxy for field `Reserved3`"] pub struct RESERVED3_W<'a> { w: &'a mut W, } impl<'a> RESERVED3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 1)) | (((value as u32) & 0x07) << 1); self.w } } #[doc = "Reader of field `LPBK`"] pub type LPBK_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LPBK`"] pub struct LPBK_W<'a> { w: &'a mut W, } impl<'a> LPBK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bits 6:31 - 31:6\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved26(&self) -> RESERVED26_R { RESERVED26_R::new(((self.bits >> 6) & 0x03ff_ffff) as u32) } #[doc = "Bit 5 - 5:5\\] I2C slave function enable 1: Slave mode is enabled. 0: Slave mode is disabled."] #[inline(always)] pub fn sfe(&self) -> SFE_R { SFE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - 4:4\\] I2C master function enable 1: Master mode is enabled. 0: Master mode is disabled."] #[inline(always)] pub fn mfe(&self) -> MFE_R { MFE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bits 1:3 - 3:1\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved3(&self) -> RESERVED3_R { RESERVED3_R::new(((self.bits >> 1) & 0x07) as u8) } #[doc = "Bit 0 - 0:0\\] I2C loopback 1: The controller in a test mode loopback configuration. 0: Normal operation"] #[inline(always)] pub fn lpbk(&self) -> LPBK_R { LPBK_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 6:31 - 31:6\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved26(&mut self) -> RESERVED26_W { RESERVED26_W { w: self } } #[doc = "Bit 5 - 5:5\\] I2C slave function enable 1: Slave mode is enabled. 0: Slave mode is disabled."] #[inline(always)] pub fn sfe(&mut self) -> SFE_W { SFE_W { w: self } } #[doc = "Bit 4 - 4:4\\] I2C master function enable 1: Master mode is enabled. 0: Master mode is disabled."] #[inline(always)] pub fn mfe(&mut self) -> MFE_W { MFE_W { w: self } } #[doc = "Bits 1:3 - 3:1\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."] #[inline(always)] pub fn reserved3(&mut self) -> RESERVED3_W { RESERVED3_W { w: self } } #[doc = "Bit 0 - 0:0\\] I2C loopback 1: The controller in a test mode loopback configuration. 0: Normal operation"] #[inline(always)] pub fn lpbk(&mut self) -> LPBK_W { LPBK_W { w: self } } }