[][src]Module cc2538::rfcore_sfr

RF Core SFR.

Modules

mtcspcfg

MAC Timer event configuration

mtctrl

MAC Timer control register

mtirqf

MAC Timer interrupt flags

mtirqm

MAC Timer interrupt mask

mtm0

MAC Timer multiplexed register 0

mtm1

MAC Timer multiplexed register 1

mtmovf0

MAC Timer multiplexed overflow register 0

mtmovf1

MAC Timer multiplexed overflow register 1

mtmovf2

MAC Timer multiplexed overflow register 2

mtmsel

MAC Timer multiplex select

rfdata

The TX FIFO and RX FIFO may be accessed through this register. Data is written to the TX FIFO when writing to the RFD register. Data is read from the RX FIFO when the RFD register is read. The XREG registers RXFIFOCNT and TXFIFOCNT provide information on the amount of data in the FIFOs. The FIFO contents can be cleared by issuing SFLUSHRX and SFLUSHTX.

rferrf

RF error interrupt flags

rfirqf0

RF interrupt flags

rfirqf1

RF interrupt flags

rfst

RF CSMA-CA/strobe processor

Structs

RegisterBlock

Register block

Type Definitions

MTCSPCFG

MAC Timer event configuration

MTCTRL

MAC Timer control register

MTIRQF

MAC Timer interrupt flags

MTIRQM

MAC Timer interrupt mask

MTM0

MAC Timer multiplexed register 0

MTM1

MAC Timer multiplexed register 1

MTMOVF0

MAC Timer multiplexed overflow register 0

MTMOVF1

MAC Timer multiplexed overflow register 1

MTMOVF2

MAC Timer multiplexed overflow register 2

MTMSEL

MAC Timer multiplex select

RFDATA

The TX FIFO and RX FIFO may be accessed through this register. Data is written to the TX FIFO when writing to the RFD register. Data is read from the RX FIFO when the RFD register is read. The XREG registers RXFIFOCNT and TXFIFOCNT provide information on the amount of data in the FIFOs. The FIFO contents can be cleared by issuing SFLUSHRX and SFLUSHTX.

RFERRF

RF error interrupt flags

RFIRQF0

RF interrupt flags

RFIRQF1

RF interrupt flags

RFST

RF CSMA-CA/strobe processor