[−][src]Struct cc13x2_cc26x2_pac::aux_aiodio1::RegisterBlock
Register block
Fields
iomode: IOMODE
0x00 - Input Output Mode This register controls pull-up, pull-down, and output mode for AUXIO that are controlled by instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
gpiodie: GPIODIE
0x04 - General Purpose Input Output Digital Input Enable This register controls input buffers for AUXIO that are controlled by instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
iopoe: IOPOE
0x08 - Input Output Peripheral Output Enable This register selects the output source for AUXIO that are controlled by instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
gpiodout: GPIODOUT
0x0c - General Purpose Input Output Data Out The output data register is used to set data on AUXIO that are controlled by instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
gpiodin: GPIODIN
0x10 - General Purpose Input Output Data In This register provides synchronized input data for AUXIO that are controlled by instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth
gpiodoutset: GPIODOUTSET
0x14 - General Purpose Input Output Data Out Set Set bits in GPIODOUT in instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
gpiodoutclr: GPIODOUTCLR
0x18 - General Purpose Input Output Data Out Clear Clear bits in GPIODOUT instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
gpiodouttgl: GPIODOUTTGL
0x1c - General Purpose Input Output Data Out Toggle Toggle bits in GPIODOUT in instance i of AUX_AIODIO. Hence, in formulas below i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io0psel: IO0PSEL
0x20 - Input Output 0 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+0] when IOPOE bit 0 is 1. To avoid glitches on AUXIO[8i+0] you must configure this register while IOPOE bit 0 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io1psel: IO1PSEL
0x24 - Input Output 1 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+1] when IOPOE bit 1 is 1. To avoid glitches on AUXIO[8i+1] you must configure this register while IOPOE bit 1 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io2psel: IO2PSEL
0x28 - Input Output 2 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+2] when IOPOE bit 2 is 1. To avoid glitches on AUXIO[8i+2] you must configure this register while IOPOE bit 2 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io3psel: IO3PSEL
0x2c - Input Output 3 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+3] when IOPOE bit 3 is 1. To avoid glitches on AUXIO[8i+3] you must configure this register while IOPOE bit 3 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io4psel: IO4PSEL
0x30 - Input Output 4 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+4] when IOPOE bit 4 is 1. To avoid glitches on AUXIO[8i+4] you must configure this register while IOPOE bit 4 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io5psel: IO5PSEL
0x34 - Input Output 5 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+5] when IOPOE bit 5 is 1. To avoid glitches on AUXIO[8i+5] you must configure this register while IOPOE bit 5 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io6psel: IO6PSEL
0x38 - Input Output 6 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+6] when IOPOE bit 6 is 1. To avoid glitches on AUXIO[8i+6] you must configure this register while IOPOE bit 6 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
io7psel: IO7PSEL
0x3c - Input Output 7 Peripheral Select This register selects a peripheral signal that connects to AUXIO[8i+7] when IOPOE bit 7 is 1. To avoid glitches on AUXIO[8i+7] you must configure this register while IOPOE bit 7 is 0. In the formulas i = 0 for AUX_AIODIO0, i = 1 for AUX_AIODIO1, and so forth.
iomodel: IOMODEL
0x40 - Input Output Mode Low This is an alias register for IOMODE.IO0 thru IOMODE.IO3.
iomodeh: IOMODEH
0x44 - Input Output Mode High This is an alias register for IOMODE.IO4 thru IOMODE.IO7.
Auto Trait Implementations
impl Send for RegisterBlock
impl !Sync for RegisterBlock
Blanket Implementations
impl<T> From for T
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The type returned in the event of a conversion error.
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The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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T: ?Sized,
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Should always be Self