Module cc13x2_cc26x2_pac::cpu_scs::nvic_ipr0

Irq 0 to 3 Priority This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the setting in AIRCR.PRIGROUP.

Structs

PRI_0R	Value of the field
PRI_1R	Value of the field
PRI_2R	Value of the field
PRI_3R	Value of the field
R	Value read from the register
W	Value to write to the register
_PRI_0W	Proxy
_PRI_1W	Proxy
_PRI_2W	Proxy
_PRI_3W	Proxy