Module cc13x2_cc26x2_pac::aux_mac

The AUX Multiply-Accumulate (AUX_MAC) peripheral enables AUX_SCE with power-efficient and flexible mathematical operations: - 2's complement signed and unsigned sequential multiplication (MUL) with optional accumulation of the result (MAC). - 16 or 32-bit 2's complement signed and unsigned addition of configurable term and accumulator (ADD). - Results of ADD, MUL and MAC operations are always stored in the accumulator (ACC). Software can easily: - Access arbitrary 16-bit slice of the 40-bit accumulator. - Find the number of leading zero or sign bits. - Perform shift operations on the accumulator. AUX_SCE must set AUX_SYSIF:PEROPRATE.MAC_OP_RATE to SCE_RATE to access and use AUX_MAC. System CPU must set AUX_SYSIF:PEROPRATE.MAC_OP_RATE to BUS_RATE to access and use AUX_MAC. This guarantees constant execution times for ADD, MUL, and MAC operations. The ADD operation requires a single peripheral clock cycle to finish. MUL and MAC operations require four peripheral clock periods to finish. An unfinished ADD, MUL, or MAC operation stalls register access to this peripheral. AUX_SCE becomes clock gated if it encounters a bus stall. Software can use this to reduce power consumption during back to back accesses. Only full word access is supported by the peripheral. An attempt to write a single byte will have no effect.

Modules

acc15_0	Accumulator Bits 15:0
acc16_1	Accumulator Bits 16:1
acc17_2	Accumulator Bits 17:2
acc18_3	Accumulator Bits 18:3
acc19_4	Accumulator Bits 19:4
acc20_5	Accumulator Bits 20:5
acc21_6	Accumulator Bits 21:6
acc22_7	Accumulator Bits 22:7
acc23_8	Accumulator Bits 23:8
acc24_9	Accumulator Bits 24:9
acc25_10	Accumulator Bits 25:10
acc26_11	Accumulator Bits 26:11
acc27_12	Accumulator Bits 27:12
acc28_13	Accumulator Bits 28:13
acc29_14	Accumulator Bits 29:14
acc30_15	Accumulator Bits 30:15
acc31_16	Accumulator Bits 31:16
acc32_17	Accumulator Bits 32:17
acc33_18	Accumulator Bits 33:18
acc34_19	Accumulator Bits 34:19
acc35_20	Accumulator Bits 35:20
acc36_21	Accumulator Bits 36:21
acc37_22	Accumulator Bits 37:22
acc38_23	Accumulator Bits 38:23
acc39_24	Accumulator Bits 39:24
acc39_32	Accumulator Bits 39:32
accreset	Accumulator Reset
accshift	Accumulator Shift Only one shift operation can be triggered per register write.
cls	Count Leading Sign
clz	Count Leading Zero
op0s	Signed Operand 0
op0u	Unsigned Operand 0
op1smul	Signed Operand 1 and Multiply
op1umul	Unsigned Operand 1 and Multiply
op1smac	Signed Operand 1 and Multiply-Accumulate
op1umac	Unsigned Operand 1 and Multiply-Accumulate
op1sadd16	Signed Operand 1 and 16-bit Addition
op1sadd32	Signed Operand 1 and 32-bit Addition
op1uadd16	Unsigned Operand 1 and 16-bit Addition
op1uadd32	Unsigned Operand 1 and 32-bit Addition

Structs

ACC15_0	Accumulator Bits 15:0
ACC16_1	Accumulator Bits 16:1
ACC17_2	Accumulator Bits 17:2
ACC18_3	Accumulator Bits 18:3
ACC19_4	Accumulator Bits 19:4
ACC20_5	Accumulator Bits 20:5
ACC21_6	Accumulator Bits 21:6
ACC22_7	Accumulator Bits 22:7
ACC23_8	Accumulator Bits 23:8
ACC24_9	Accumulator Bits 24:9
ACC25_10	Accumulator Bits 25:10
ACC26_11	Accumulator Bits 26:11
ACC27_12	Accumulator Bits 27:12
ACC28_13	Accumulator Bits 28:13
ACC29_14	Accumulator Bits 29:14
ACC30_15	Accumulator Bits 30:15
ACC31_16	Accumulator Bits 31:16
ACC32_17	Accumulator Bits 32:17
ACC33_18	Accumulator Bits 33:18
ACC34_19	Accumulator Bits 34:19
ACC35_20	Accumulator Bits 35:20
ACC36_21	Accumulator Bits 36:21
ACC37_22	Accumulator Bits 37:22
ACC38_23	Accumulator Bits 38:23
ACC39_24	Accumulator Bits 39:24
ACC39_32	Accumulator Bits 39:32
ACCRESET	Accumulator Reset
ACCSHIFT	Accumulator Shift Only one shift operation can be triggered per register write.
CLS	Count Leading Sign
CLZ	Count Leading Zero
OP0S	Signed Operand 0
OP0U	Unsigned Operand 0
OP1SMUL	Signed Operand 1 and Multiply
OP1UMUL	Unsigned Operand 1 and Multiply
OP1SMAC	Signed Operand 1 and Multiply-Accumulate
OP1UMAC	Unsigned Operand 1 and Multiply-Accumulate
OP1SADD16	Signed Operand 1 and 16-bit Addition
OP1SADD32	Signed Operand 1 and 32-bit Addition
OP1UADD16	Unsigned Operand 1 and 16-bit Addition
OP1UADD32	Unsigned Operand 1 and 32-bit Addition
RegisterBlock	Register block