[−][src]Module cc13x2_cc26x2_hal::aux_timer01
AUX Timer 0 and AUX Timer 1 (AUX_TIMER01) are two 16-bit timers capable of generating one event each: - AUX_EVCTL:EVSTAT3.AUX_TIMER0_EV. - AUX_EVCTL:EVSTAT3.AUX_TIMER1_EV. The events are described in T0TARGET and T1TARGET. Subscribers to the AUX event bus can use these events to sequence and trigger actions. AUX_SYSIF:PEROPRATE.TIMER01_OP_RATE sets the peripheral clock frequency used by the prescaler, timer, and event logic to SCE or AUX bus rate. To use AUX_TIMER01: - AUX_SCE must set AUX_SYSIF:PEROPRATE.TIMER01_OP_RATE to SCE_RATE. - System CPU must set AUX_SYSIF:PEROPRATE.TIMER01_OP_RATE to BUS_RATE. - The timers must only subscribe to events updated at the peripheral clock frequency or lower. Unexpected execution behavior can result if software does not obey these rules.
Modules
t0cfg | Timer 0 Configuration |
t0ctl | Timer 0 Control |
t0cntr | Timer 0 Counter |
t0target | Timer 0 Target |
t1cfg | Timer 1 Configuration |
t1ctl | Timer 1 Control |
t1target | Timer 1 Target Timer 1 counter target value |
t1cntr | Timer 1 Counter |
Structs
RegisterBlock | Register block |
T0CFG | Timer 0 Configuration |
T0CTL | Timer 0 Control |
T0CNTR | Timer 0 Counter |
T0TARGET | Timer 0 Target |
T1CFG | Timer 1 Configuration |
T1CTL | Timer 1 Control |
T1TARGET | Timer 1 Target Timer 1 counter target value |
T1CNTR | Timer 1 Counter |