Module cc13x2_cc26x2_hal::cpu_scs::nvic_ipr6

Irq 24 to 27 Priority This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the setting in AIRCR.PRIGROUP.

Structs

PRI_24R	Value of the field
PRI_25R	Value of the field
PRI_26R	Value of the field
PRI_27R	Value of the field
R	Value read from the register
W	Value to write to the register
_PRI_24W	Proxy
_PRI_25W	Proxy
_PRI_26W	Proxy
_PRI_27W	Proxy