Module cc13x2_cc26x2_hal::cpu_scs::nvic_ipr1

Irq 4 to 7 Priority This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the setting in AIRCR.PRIGROUP.

Structs

PRI_4R	Value of the field
PRI_5R	Value of the field
PRI_6R	Value of the field
PRI_7R	Value of the field
R	Value read from the register
W	Value to write to the register
_PRI_4W	Proxy
_PRI_5W	Proxy
_PRI_6W	Proxy
_PRI_7W	Proxy