[−][src]Module cc13x2_cc26x2_hal::cpu_scs::dhcsr
Debug Halting Control and Status The purpose of this register is to provide status information about the state of the processor, enable core debug, halt and step the processor. For writes, 0xA05F must be written to higher half-word of this register, otherwise the write operation is ignored and no bits are written into the register. If not enabled for Halting mode, C_DEBUGEN = 1, all other fields are disabled. This register is not reset on a core reset. It is reset by a power-on reset. However, C_HALT always clears on a core reset. To halt on a reset, the following bits must be enabled: DEMCR.VC_CORERESET and C_DEBUGEN. Note that writes to this register in any size other than word are unpredictable. It is acceptable to read in any size, and it can be used to avoid or intentionally change a sticky bit. Behavior of the system when writing to this register while CPU is halted (i.e. C_DEBUGEN = 1 and S_HALT= 1): C_HALT=0, C_STEP=0, C_MASKINTS=0 Exit Debug state and start instruction execution. Exceptions activate according to the exception configuration rules. C_HALT=0, C_STEP=0, C_MASKINTS=1 Exit Debug state and start instruction execution. PendSV, SysTick and external configurable interrupts are disabled, otherwise exceptions activate according to standard configuration rules. C_HALT=0, C_STEP=1, C_MASKINTS=0 Exit Debug state, step an instruction and halt. Exceptions activate according to the exception configuration rules. C_HALT=0, C_STEP=1, C_MASKINTS=1 Exit Debug state, step an instruction and halt. PendSV, SysTick and external configurable interrupts are disabled, otherwise exceptions activate according to standard configuration rules. C_HALT=1, C_STEP=x, C_MASKINTS=x Remain in Debug state
Structs
| C_DEBUGENR | Value of the field |
| C_HALTR | Value of the field |
| C_MASKINTSR | Value of the field |
| C_SNAPSTALLR | Value of the field |
| C_STEPR | Value of the field |
| R | Value read from the register |
| RESERVED4R | Value of the field |
| RESERVED6R | Value of the field |
| RESERVED20R | Value of the field |
| RESERVED26R | Value of the field |
| S_HALTR | Value of the field |
| S_LOCKUPR | Value of the field |
| S_REGRDYR | Value of the field |
| S_RESET_STR | Value of the field |
| S_RETIRE_STR | Value of the field |
| S_SLEEPR | Value of the field |
| W | Value to write to the register |
| _C_DEBUGENW | Proxy |
| _C_HALTW | Proxy |
| _C_MASKINTSW | Proxy |
| _C_SNAPSTALLW | Proxy |
| _C_STEPW | Proxy |
| _RESERVED4W | Proxy |
| _RESERVED6W | Proxy |
| _RESERVED20W | Proxy |
| _RESERVED26W | Proxy |
| _S_HALTW | Proxy |
| _S_LOCKUPW | Proxy |
| _S_REGRDYW | Proxy |
| _S_RESET_STW | Proxy |
| _S_RETIRE_STW | Proxy |
| _S_SLEEPW | Proxy |