Module cc13x2_cc26x2_hal::aon_pmctl

This component control the Power Management controller residing in the AON domain. Note: This module is only supporting 32 bit Read Write access from MCU

Modules

auxsceclk	AUX SCE Clock Management This register contains bitfields that are relevant for setting up the clock to the AUX domain.
jtagcfg	JTAG Configuration This register contains control for configuration of the JTAG domain. This includes permissions for each TAP.
jtagusercode	JTAG USERCODE Boot code copies the JTAG USERCODE to this register from where it is forwarded to the debug subsystem.
osccfg	Oscillator Configuration This register sets the period for Amplitude compensation requests sent to the oscillator control system. The amplitude compensations is only applicable when XOSC_HF is running in low power mode.
pwrctl	Power Management Control This register controls bitfields for setting low level power management features such as selection of regulator for VDDR supply and control of IO ring where certain segments can be enabled / disabled.
pwrstat	AON Power and Reset Status This register is used to monitor various power management related signals in AON. All other signals than JTAG_PD_ON, AUX_BUS_RESET_DONE, and AUX_RESET_DONE are for test, calibration and debug purpose only.
ramcfg	RAM Configuration This register contains power management related configuration for the SRAM in the MCU and AUX domain.
rechargecfg	Recharge Controller Configuration This register sets all relevant parameters for controlling the recharge algorithm.
rechargestat	Recharge Controller Status This register controls various status registers which are updated during recharge. The register is mostly intended for test and debug.
resetctl	Reset Management This register contains bitfields related to system reset such as reset source and reset request and control of brown out resets.
shutdown	Shutdown Control This register contains bitfields required for entering shutdown mode
sleepctl	Sleep Control This register is used to unfreeze the IO pad ring after waking up from SHUTDOWN

Structs

AUXSCECLK	AUX SCE Clock Management This register contains bitfields that are relevant for setting up the clock to the AUX domain.
JTAGCFG	JTAG Configuration This register contains control for configuration of the JTAG domain. This includes permissions for each TAP.
JTAGUSERCODE	JTAG USERCODE Boot code copies the JTAG USERCODE to this register from where it is forwarded to the debug subsystem.
OSCCFG	Oscillator Configuration This register sets the period for Amplitude compensation requests sent to the oscillator control system. The amplitude compensations is only applicable when XOSC_HF is running in low power mode.
PWRCTL	Power Management Control This register controls bitfields for setting low level power management features such as selection of regulator for VDDR supply and control of IO ring where certain segments can be enabled / disabled.
PWRSTAT	AON Power and Reset Status This register is used to monitor various power management related signals in AON. All other signals than JTAG_PD_ON, AUX_BUS_RESET_DONE, and AUX_RESET_DONE are for test, calibration and debug purpose only.
RAMCFG	RAM Configuration This register contains power management related configuration for the SRAM in the MCU and AUX domain.
RECHARGECFG	Recharge Controller Configuration This register sets all relevant parameters for controlling the recharge algorithm.
RECHARGESTAT	Recharge Controller Status This register controls various status registers which are updated during recharge. The register is mostly intended for test and debug.
RESETCTL	Reset Management This register contains bitfields related to system reset such as reset source and reset request and control of brown out resets.
RegisterBlock	Register block
SHUTDOWN	Shutdown Control This register contains bitfields required for entering shutdown mode
SLEEPCTL	Sleep Control This register is used to unfreeze the IO pad ring after waking up from SHUTDOWN