Expand description
L1 Cache control
Modules
cpu_clk_gate.
hit_cnt_lsb.
hit_cnt_msb.
irom1_misr_dataout_0.
irom1_misr_dataout_1.
l1c_bmx_err_addr.
l1c_bmx_err_addr_en.
l1c_config.
l1c_misc.
miss_cnt.
Structs
Register block
Type Definitions
cpu_clk_gate (rw) register accessor: an alias for
Reg<CPU_CLK_GATE_SPEC>hit_cnt_lsb (rw) register accessor: an alias for
Reg<HIT_CNT_LSB_SPEC>hit_cnt_msb (rw) register accessor: an alias for
Reg<HIT_CNT_MSB_SPEC>irom1_misr_dataout_0 (rw) register accessor: an alias for
Reg<IROM1_MISR_DATAOUT_0_SPEC>irom1_misr_dataout_1 (rw) register accessor: an alias for
Reg<IROM1_MISR_DATAOUT_1_SPEC>l1c_bmx_err_addr (rw) register accessor: an alias for
Reg<L1C_BMX_ERR_ADDR_SPEC>l1c_bmx_err_addr_en (rw) register accessor: an alias for
Reg<L1C_BMX_ERR_ADDR_EN_SPEC>l1c_config (rw) register accessor: an alias for
Reg<L1C_CONFIG_SPEC>l1c_misc (rw) register accessor: an alias for
Reg<L1C_MISC_SPEC>miss_cnt (rw) register accessor: an alias for
Reg<MISS_CNT_SPEC>