pub struct IrqEnableControl5 { /* private fields */ }Expand description
Interrupt Enable Control Register 5 (Timer and GPIO Input Edge Trigger IRQs).
Implementations§
Source§impl IrqEnableControl5
impl IrqEnableControl5
Sourcepub fn timer_timeout_irq_enable(&self) -> bool
pub fn timer_timeout_irq_enable(&self) -> bool
Read the timer_timeout_irq_enable field of the register.
Timer timeout interrupt.
Sourcepub fn gpio_2_input_edge_trigger_irq_enable(&self) -> bool
pub fn gpio_2_input_edge_trigger_irq_enable(&self) -> bool
Read the gpio_2_input_edge_trigger_irq_enable field of the register.
GPIO2 input edge trigger interrupt.
Sourcepub fn gpio_1_input_edge_trigger_irq_enable(&self) -> bool
pub fn gpio_1_input_edge_trigger_irq_enable(&self) -> bool
Read the gpio_1_input_edge_trigger_irq_enable field of the register.
GPIO1 input edge trigger interrupt.
Sourcepub fn gpio_0_input_edge_trigger_irq_enable(&self) -> bool
pub fn gpio_0_input_edge_trigger_irq_enable(&self) -> bool
Read the gpio_0_input_edge_trigger_irq_enable field of the register.
GPIO0 input edge trigger interrupt.
Sourcepub fn set_timer_timeout_irq_enable(&mut self, value: bool)
pub fn set_timer_timeout_irq_enable(&mut self, value: bool)
Write the timer_timeout_irq_enable field of the register.
Timer timeout interrupt.
Sourcepub fn set_gpio_2_input_edge_trigger_irq_enable(&mut self, value: bool)
pub fn set_gpio_2_input_edge_trigger_irq_enable(&mut self, value: bool)
Write the gpio_2_input_edge_trigger_irq_enable field of the register.
GPIO2 input edge trigger interrupt.
Sourcepub fn set_gpio_1_input_edge_trigger_irq_enable(&mut self, value: bool)
pub fn set_gpio_1_input_edge_trigger_irq_enable(&mut self, value: bool)
Write the gpio_1_input_edge_trigger_irq_enable field of the register.
GPIO1 input edge trigger interrupt.
Sourcepub fn set_gpio_0_input_edge_trigger_irq_enable(&mut self, value: bool)
pub fn set_gpio_0_input_edge_trigger_irq_enable(&mut self, value: bool)
Write the gpio_0_input_edge_trigger_irq_enable field of the register.
GPIO0 input edge trigger interrupt.
Trait Implementations§
Source§impl BitAnd for IrqEnableControl5
impl BitAnd for IrqEnableControl5
Source§impl BitAndAssign for IrqEnableControl5
impl BitAndAssign for IrqEnableControl5
Source§fn bitand_assign(&mut self, rhs: Self)
fn bitand_assign(&mut self, rhs: Self)
&= operation. Read moreSource§impl BitOr for IrqEnableControl5
impl BitOr for IrqEnableControl5
Source§impl BitOrAssign for IrqEnableControl5
impl BitOrAssign for IrqEnableControl5
Source§fn bitor_assign(&mut self, rhs: Self)
fn bitor_assign(&mut self, rhs: Self)
|= operation. Read moreSource§impl BitXor for IrqEnableControl5
impl BitXor for IrqEnableControl5
Source§impl BitXorAssign for IrqEnableControl5
impl BitXorAssign for IrqEnableControl5
Source§fn bitxor_assign(&mut self, rhs: Self)
fn bitxor_assign(&mut self, rhs: Self)
^= operation. Read moreSource§impl Clone for IrqEnableControl5
impl Clone for IrqEnableControl5
Source§fn clone(&self) -> IrqEnableControl5
fn clone(&self) -> IrqEnableControl5
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more