Module avrd::atmega4808::evsys_generator

Generator selector select

Constants

AC0_OUT	Analog Comparator 0 out.
ADC0_RESRDY	ADC 0 Result Ready Event.
CCL_LUT0	Configurable Custom Logic LUT0.
CCL_LUT1	Configurable Custom Logic LUT1.
CCL_LUT2	Configurable Custom Logic LUT2.
CCL_LUT3	Configurable Custom Logic LUT3.
OFF	Off.
PORT0_PIN0	Port 0 Pin 0.
PORT0_PIN1	Port 0 Pin 1.
PORT0_PIN2	Port 0 Pin 2.
PORT0_PIN3	Port 0 Pin 3.
PORT0_PIN4	Port 0 Pin 4.
PORT0_PIN5	Port 0 Pin 5.
PORT0_PIN6	Port 0 Pin 6.
PORT0_PIN7	Port 0 Pin 7.
PORT1_PIN0	Port 1 Pin 0.
PORT1_PIN1	Port 1 Pin 1.
PORT1_PIN2	Port 1 Pin 2.
PORT1_PIN3	Port 1 Pin 3.
PORT1_PIN4	Port 1 Pin 4.
PORT1_PIN5	Port 1 Pin 5.
PORT1_PIN6	Port 1 Pin 6.
PORT1_PIN7	Port 1 Pin 7.
RTC_CMP	Real Time Counter compare.
RTC_OVF	Real Time Counter overflow.
RTC_PIT0	Periodic Interrupt Timer output 0.
RTC_PIT1	Periodic Interrupt Timer output 1.
RTC_PIT2	Periodic Interrupt Timer output 2.
RTC_PIT3	Periodic Interrupt Timer output 3.
SPI0_SCK	SPI 0 Sclock.
TCA0_CMP0	Timer/Counter A0 compare 0.
TCA0_CMP1	Timer/Counter A0 compare 1.
TCA0_CMP2	Timer/Counter A0 compare 2.
TCA0_HUNF	Timer/Counter A0 high byte underflow (split mode).
TCA0_OVF_LUNF	Timer/Counter A0 overflow / low byte underflow.
TCB0_CAPT	Timer/Counter B0 capture.
TCB1_CAPT	Timer/Counter B1 capture.
TCB2_CAPT	Timer/Counter B2 capture.
TCB3_CAPT	Timer/Counter B3 capture.
UPDI	Unified Program and Debug Interface.
USART0_XCK	USART 0 Xclock.
USART1_XCK	USART 1 Xclock.
USART2_XCK	USART 2 Xclock.
USART3_XCK	USART 3 Xclock.