Module avrd::atxmega64a1u::ebi_rpdly [−][src]
SDRAM Row to Precharge Delay
Constants
_0CLK | 0 cycles. |
_1CLK | 1 cycle. |
_2CLK | 2 cycles. |
_3CLK | 3 cycles. |
_4CLK | 4 cycles. |
_5CLK | 5 cycles. |
_6CLK | 6 cycles. |
_7CLK | 7 cycles. |