Constant avrd::attiny85::enum_sut_cksel::PLLCLK_1KCK_14CK_4MS [−][src]
pub const PLLCLK_1KCK_14CK_4MS: u32 = 0x1;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms.
pub const PLLCLK_1KCK_14CK_4MS: u32 = 0x1;
PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms.